From 5f26d9081cb438685608fc5d12c0e858ec7d348e Mon Sep 17 00:00:00 2001
From: Johannes Wirth <wirth@esa.tu-darmstadt.de>
Date: Thu, 15 May 2025 20:11:55 +0200
Subject: [PATCH] add cache flush to cluster info

---
 include/ehrenberg/devices/fki_cluster_info.h | 29 +++++++++++++++++---
 1 file changed, 25 insertions(+), 4 deletions(-)

diff --git a/include/ehrenberg/devices/fki_cluster_info.h b/include/ehrenberg/devices/fki_cluster_info.h
index 93ba304..f8fdad7 100644
--- a/include/ehrenberg/devices/fki_cluster_info.h
+++ b/include/ehrenberg/devices/fki_cluster_info.h
@@ -13,6 +13,7 @@ static inline uint32_t fki_addr_sram2(uint8_t cluster);
 static inline uint32_t fki_addr_cntrl_cva5(uint8_t cluster);
 static inline uint32_t fki_addr_cntrl_tgc(uint8_t cluster);
 static inline uint32_t fki_addr_ccc_idxTasks(uint8_t cluster);
+static inline uint32_t fki_addr_cacheFlushControl(uint8_t cluster);
 static inline uint32_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster);
 static inline uint32_t fki_addr_ccc_idxJobs(uint8_t cluster);
 static inline uint32_t fki_addr_cntrl_cva5_clusterReg(uint8_t cluster);
@@ -56,8 +57,11 @@ static inline uint32_t fki_addr_sram3(uint8_t cluster);
 #define BYTES_Compute0_cntrl_tgc 8192
 #define HIGH_Compute0_cntrl_tgc 0x8000cfff
 #define ADDR_Compute0_ut_adapter 0x8000e000
-#define BYTES_Compute0_ut_adapter 8192
-#define HIGH_Compute0_ut_adapter 0x8000ffff
+#define BYTES_Compute0_ut_adapter 4096
+#define HIGH_Compute0_ut_adapter 0x8000efff
+#define ADDR_Compute0_cacheFlushControl 0x8000f000
+#define BYTES_Compute0_cacheFlushControl 4096
+#define HIGH_Compute0_cacheFlushControl 0x8000ffff
 #define ADDR_Compute0_sram0 0x80010000
 #define BYTES_Compute0_sram0 524288
 #define HIGH_Compute0_sram0 0x8008ffff
@@ -104,8 +108,11 @@ static inline uint32_t fki_addr_sram3(uint8_t cluster);
 #define BYTES_Compute1_cntrl_tgc 12288
 #define HIGH_Compute1_cntrl_tgc 0x9000dfff
 #define ADDR_Compute1_ut_adapter 0x9000e000
-#define BYTES_Compute1_ut_adapter 8192
-#define HIGH_Compute1_ut_adapter 0x9000ffff
+#define BYTES_Compute1_ut_adapter 4096
+#define HIGH_Compute1_ut_adapter 0x9000efff
+#define ADDR_Compute1_cacheFlushControl 0x9000f000
+#define BYTES_Compute1_cacheFlushControl 4096
+#define HIGH_Compute1_cacheFlushControl 0x9000ffff
 #define ADDR_Compute1_sram0 0x90010000
 #define BYTES_Compute1_sram0 524288
 #define HIGH_Compute1_sram0 0x9008ffff
@@ -273,6 +280,20 @@ static inline uint32_t fki_addr_ccc_idxTasks(uint8_t cluster) {
 	}
 }
 
+static inline uint32_t fki_addr_cacheFlushControl(uint8_t cluster) {
+	switch(cluster) {
+		case 3: {
+			return 0x9000f000;
+		}
+		case 2: {
+			return 0x8000f000;
+		}
+		default: {
+			return -1;
+		}
+	}
+}
+
 static inline uint32_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster) {
 	switch(cluster) {
 		case 3: {