 Eyck Jentzsch
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b1a18459e7
|
adds more flexible use of availabel targets
|
2022-09-26 13:57:24 +02:00 |
|
Eyck Jentzsch
|
6ba7c82f80
|
fixes wrapper definitions for hwl cores
|
2022-09-26 13:31:46 +02:00 |
|
Eyck Jentzsch
|
ad7bb28b4c
|
fixes write mask of clic memory mapped registers
|
2022-09-17 12:15:19 +02:00 |
|
Eyck Jentzsch
|
fa7eda0889
|
fixes wrong check for exception
|
2022-08-31 11:45:53 +02:00 |
|
Eyck Jentzsch
|
00e02bf565
|
adds support for different branch types in tracing
|
2022-08-08 06:30:37 +02:00 |
|
Eyck Jentzsch
|
1ad66a71d8
|
extends supported break point types
|
2022-08-06 09:53:24 +02:00 |
|
Eyck Jentzsch
|
e60fa3d5e6
|
adaptes to changes in dbt-rise-core
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2022-08-06 09:49:32 +02:00 |
|
Eyck Jentzsch
|
8407f6287f
|
replaces core_complex socket
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2022-07-24 20:52:28 +02:00 |
|
Eyck Jentzsch
|
0833198d34
|
aads missing windows compat firx to template
|
2022-07-23 14:36:23 +02:00 |
|
Eyck Jentzsch
|
57347ae4d9
|
fixes cppcheck flagged issues
|
2022-07-23 13:49:10 +02:00 |
|
Eyck Jentzsch
|
4876f18ba9
|
adds windows compatibility fixes
|
2022-07-18 11:43:42 +02:00 |
|
Eyck Jentzsch
|
a53ee42e13
|
updates TGC_C according to CoreDSL description update
|
2022-07-12 22:34:22 +02:00 |
|
Eyck Jentzsch
|
12ccfc055a
|
updates generate tgc_c definition
|
2022-07-11 22:58:10 +02:00 |
|
Eyck Jentzsch
|
feaa49d367
|
removes decoder again as there is some issue
|
2022-06-20 00:39:11 +02:00 |
|
Eyck Jentzsch
|
18f33b4a68
|
fixes ordering of instructions for decoding
|
2022-06-19 16:52:29 +02:00 |
|
Eyck Jentzsch
|
f096b15dbd
|
factors decoder into separate component
|
2022-06-19 13:17:31 +02:00 |
|
Eyck Jentzsch
|
cb5375258a
|
removes compilatioon of unneeded files
|
2022-06-10 07:19:46 +02:00 |
|
Eyck Jentzsch
|
076b5a39ad
|
fix class naming
|
2022-06-02 08:30:49 +02:00 |
|
Eyck Jentzsch
|
f40ab41899
|
fix left-over from layout refactoring
|
2022-06-02 08:30:02 +02:00 |
|
Eyck Jentzsch
|
e8fd5143bc
|
fix build options for standalone ISS
|
2022-05-31 11:05:26 +02:00 |
|
Eyck Jentzsch
|
31fb51de95
|
update tgc_c generated code
|
2022-05-30 22:15:44 +02:00 |
|
Eyck Jentzsch
|
5d481eb79d
|
fix generation of non-exception code
|
2022-05-30 22:04:16 +02:00 |
|
Eyck Jentzsch
|
1c90fe765d
|
Merge remote-tracking branch 'origin/Trace_enhancement' into develop
|
2022-05-30 14:18:09 +02:00 |
|
Eyck Jentzsch
|
52ed8b81a6
|
fixed template to work with previous code generator
|
2022-05-30 14:08:02 +02:00 |
|
Eyck Jentzsch
|
0703a0a845
|
update tgc-mapper
|
2022-05-30 07:45:32 +02:00 |
|
Eyck Jentzsch
|
0c542d42aa
|
separate generated sources
|
2022-05-21 12:48:28 +02:00 |
|
Eyck Jentzsch
|
966d1616c5
|
change source code to unified layout
|
2022-05-21 11:55:24 +02:00 |
 Eyck-Alexander Jentzsch
|
1720bd4aaa
|
adds support for compressed instructions
|
2022-05-20 15:17:58 +02:00 |
|
Eyck Jentzsch
|
df16378605
|
update template for changed code generator
|
2022-05-18 19:10:34 +02:00 |
|
Eyck Jentzsch
|
1438f0f373
|
add backannotation to pc trace plugin
|
2022-05-17 15:29:04 +02:00 |
|
Eyck Jentzsch
|
766f3ba9ee
|
fix assertion in compressed pctrace writer
|
2022-05-13 12:38:12 +02:00 |
|
Eyck Jentzsch
|
5da4e6b424
|
fix alignment check for unaligned debugger accesses
|
2022-05-13 12:37:47 +02:00 |
|
Eyck Jentzsch
|
e382217e04
|
update vm_tgc_c due reworked CoreDSL generator
|
2022-05-11 18:52:15 +02:00 |
|
Eyck Jentzsch
|
9db4e3fd87
|
fix assertion
|
2022-05-10 16:13:21 +02:00 |
|
Eyck-Alexander Jentzsch
|
bb658be3b4
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2022-05-08 15:25:56 +02:00 |
|
Eyck-Alexander Jentzsch
|
6579780dc9
|
add call column in output
|
2022-05-08 15:24:26 +02:00 |
|
Eyck Jentzsch
|
e56bc12788
|
fix non-lz4 build of plugin
|
2022-05-07 17:27:11 +02:00 |
|
Eyck Jentzsch
|
e88f309ea2
|
add lz4 compression to pctrace
|
2022-05-07 17:22:06 +02:00 |
|
Eyck Jentzsch
|
03bec27376
|
implement extended instrumentation interface
|
2022-04-26 17:14:33 +02:00 |
|
Eyck Jentzsch
|
9d9008a3a2
|
fix pointer mess
|
2022-04-26 15:35:17 +02:00 |
 Stanislaw Kaushanski
|
5f6d462973
|
check that no interrupts are pending before entering the wfi wait
|
2022-04-26 13:58:20 +02:00 |
|
Eyck Jentzsch
|
a92b84bef4
|
add code word access for ISS plugins
|
2022-04-25 14:18:19 +02:00 |
|
Eyck Jentzsch
|
477c530847
|
extend debug mode handling
|
2022-04-13 11:41:01 +02:00 |
|
Eyck Jentzsch
|
c054d75717
|
update to latest coredsl description
|
2022-04-10 18:55:44 +02:00 |
|
Eyck Jentzsch
|
15cd26f800
|
remove CoreDSL ISA repo
|
2022-04-10 12:15:40 +02:00 |
|
Eyck Jentzsch
|
9465cffe79
|
adapt to change in dbt-rise-core
|
2022-04-09 14:55:36 +02:00 |
|
Eyck Jentzsch
|
00d2d06cbd
|
adapt to privileged spec
|
2022-03-31 20:33:12 +02:00 |
|
Eyck Jentzsch
|
8e4e702cb9
|
Merge remote-tracking branch 'origin/feature/reduced_output' into develop
|
2022-03-28 14:09:06 +02:00 |
|
Eyck-Alexander Jentzsch
|
58311b37db
|
Merge branch 'feature/reduced_output' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into
feature/reduced_output
|
2022-03-28 11:16:09 +02:00 |
|
Eyck-Alexander Jentzsch
|
ad8dc09bee
|
Merge branch 'feature/reduced_output' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into feature/reduced_output
|
2022-03-28 11:15:45 +02:00 |