|  | f57f9f9177 | adds missing vector crypto functions to interp template | 2025-08-21 10:23:52 +02:00 |  | 
			
				
					|  | a768bde7f2 | adds all arithmetic Zvk extensions | 2025-06-30 10:53:48 +02:00 |  | 
			
				
					|  | a2e5405e25 | small changes regarding vector template | 2025-03-31 10:19:16 +02:00 |  | 
			
				
					|  | 453407568c | removes carry_t, moves functionality to own functions | 2025-03-31 10:19:16 +02:00 |  | 
			
				
					|  | 0fe9e6ebc8 | corrects error for narrowing fp dispatch | 2025-03-31 10:19:16 +02:00 |  | 
			
				
					|  | 7a7035f267 | adds support for half precision float | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | 7b35f45a48 | changes to make correct oversighst for XLEN=64 in Vector functions | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | fe9f2a5455 | corrects vectorslide, changes all loop index type | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | 6fcb3dbb66 | adds missing floating point instructions | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | c01eb39a76 | reworks merge instrs, adds fp comparisons | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | ae90adc854 | adds most fp functions | 2025-03-31 10:19:15 +02:00 |  | 
			
				
					|  | 8746003d3e | adds floating point reduction instrs, widening are untested | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | 60d2b45a81 | adds floating point Permutation Instructions | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | fd11ce18c4 | changes order of arguments to reflect assembly | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | 9b7a9fa273 | updates indexed load to use vreg_views | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | e24c1874c4 | Changes load_store to use vreg_views aswell | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | 221d2ee38c | adds whole register moves | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | 877cad27ba | adds gather instructions | 2025-03-31 10:19:14 +02:00 |  | 
			
				
					|  | a26505cb5c | adds more functions, up to slide | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | c1277b6528 | adds mask_mask logical instructions | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | 63889b02e7 | adds widening reductions | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | f049d8cbb3 | adds Integer Reduction Instructions | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | 28ac169cfe | adds narrowing fixed point instructions | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | 75d96bf18d | small cleanup, adds first fixed point instrs | 2025-03-31 10:19:13 +02:00 |  | 
			
				
					|  | 77807fec01 | adds merge and move instructions | 2025-03-31 10:18:10 +02:00 |  | 
			
				
					|  | ac1322d66b | changes to ternary functions for Multiply-Add Instructions | 2025-03-31 10:18:10 +02:00 |  | 
			
				
					|  | b3f189145f | adds funct3 to vector functions | 2025-03-31 10:18:10 +02:00 |  | 
			
				
					|  | 0027946f90 | renames mask operations to distinguish from vector integer compare instructions | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | feaff8c4a5 | adds support for narrowing shifts | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | af3e76cc98 | adds integer extension and add/substract with carry vector instructions | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | b5862039e7 | changes order of operands to more closely resemble assembly | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | 51f3802394 | adds vector_imm instructions to vector_functions, makes size of all involved registers a template parameter | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | 6ce0d97e81 | general improvements to vector_functions, adds functions to process arithmetic instructions (working add) | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | 2b85748279 | adds load_store_index to vector_functions | 2025-03-31 10:18:09 +02:00 |  | 
			
				
					|  | 512b79a3e7 | makes elem_count an explicit parameter for the softvector functions rather than calculating it from vtype | 2025-03-31 10:18:08 +02:00 |  | 
			
				
					|  | 947d353bbf | adds working vector (unit) stride (segmented) loads and stores | 2025-03-31 10:18:08 +02:00 |  | 
			
				
					|  | b95f518c91 | updates templates for interp to make extension specific includes conditonal | 2025-03-31 10:18:08 +02:00 |  | 
			
				
					|  | 4cef0f57c1 | updates templates and adds newly generated files | 2025-03-31 10:18:05 +02:00 |  | 
			
				
					|  | 2bb2e56310 | adds dependencies for K ISA (Cryptography) | 2025-03-31 09:54:26 +02:00 |  | 
			
				
					|  | a0eeae7dd6 | corrects template for new arch_if changes | 2025-03-30 19:12:22 +02:00 |  | 
			
				
					|  | 9a2df32d57 | updates templates | 2024-12-28 13:07:07 +01:00 |  | 
			
				
					|  | de79adc50d | updates debugger hook to stop before fetching instructions this relates to https://github.com/Minres/DBT-RISE-RISCV/issues/8 :
Debugger loses control when trap vector fetch fails
and https://github.com/Minres/DBT-RISE-RISCV/issues/7 : Two debugger
single-steps are required at reset vector | 2024-08-17 12:39:54 +02:00 |  | 
			
				
					|  | 9c51d6eade | improves interp, only calls decode once per instr | 2024-08-07 09:20:11 +02:00 |  | 
			
				
					|  | 2878dca6b5 | updates templates | 2024-08-06 08:32:05 +02:00 |  | 
			
				
					|  | 39d2518fdd | checkin: tgc5f builds and runs through | 2024-07-31 12:30:41 +02:00 |  | 
			
				
					|  | 72b11beac5 | moves decoder to dbt-rise-core | 2024-07-25 10:13:38 +02:00 |  | 
			
				
					|  | c6b99cd155 | introduces new decoder to interp backend | 2024-07-24 12:28:35 +02:00 |  | 
			
				
					|  | 8361f88718 | removes setting of NEXT_PC to max if trap | 2024-07-18 11:37:53 +02:00 |  | 
			
				
					|  | 375755999a | integrates new tval changes | 2024-07-16 15:32:35 +02:00 |  | 
			
				
					|  | 4cfb15c7cd | Asmjit and interp working | 2024-07-10 12:51:31 +02:00 |  |