makes elem_count an explicit parameter for the softvector functions rather than calculating it from vtype

This commit is contained in:
Eyck-Alexander Jentzsch 2025-02-04 21:52:59 +01:00
parent 7a048f8b93
commit 512b79a3e7
3 changed files with 25 additions and 23 deletions

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@ -165,21 +165,20 @@ if(vector != null) {%>
tval = new_tval;
}
<%if(vector != null) {%>
uint64_t vlseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size,
int8_t EMUL_pow, uint8_t segment_size){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_read, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, EMUL_pow, segment_size);
inline void lower(){
this->core.reg.trap_state = 0;
}
uint64_t vlseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size, uint16_t elem_count, int8_t EMUL_pow, uint8_t segment_size){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_read, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, elem_count, EMUL_pow, segment_size, 1);
}
uint64_t vsseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size,
int8_t EMUL_pow, uint8_t segment_size){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_write, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, EMUL_pow, segment_size);
uint64_t vsseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size, uint16_t elem_count, int8_t EMUL_pow, uint8_t segment_size){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_write, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, elem_count, EMUL_pow, segment_size, 1);
}
uint64_t vlsseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size,
int8_t EMUL_pow, uint8_t segment_size, int64_t stride){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_read, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, EMUL_pow, segment_size, stride);
uint64_t vlsseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size, uint16_t elem_count, int8_t EMUL_pow, uint8_t segment_size, int64_t stride){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_read, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, elem_count, EMUL_pow, segment_size, stride);
}
uint64_t vssseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size,
int8_t EMUL_pow, uint8_t segment_size, int64_t stride){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_write, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, EMUL_pow, segment_size, stride);
uint64_t vssseg(uint8_t* V, uint8_t vd, uint64_t rs1_val, uint64_t vl, uint64_t vstart, softvector::vtype_t vtype, bool vm, uint8_t elem_byte_size, uint16_t elem_count, int8_t EMUL_pow, uint8_t segment_size, int64_t stride){
return softvector::vector_load_store(this->get_arch(), softvector::softvec_write, V, traits::VLEN, vd, rs1_val, vl, vstart, vtype, vm, elem_byte_size, elem_count, EMUL_pow, segment_size, stride);
}
<%}%>
uint64_t fetch_count{0};

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@ -46,11 +46,13 @@ namespace softvector {
unsigned RFS = 32;
bool softvec_read(void* core, uint64_t addr, uint64_t length, uint8_t* data) {
// Read length bytes from addr into *data
iss::status status = static_cast<iss::arch_if*>(core)->read(iss::address_type::PHYSICAL, iss::access_type::READ,
0 /*traits<ARCH>::MEM*/, addr, length, data);
return status == iss::Ok;
}
bool softvec_write(void* core, uint64_t addr, uint64_t length, uint8_t* data) {
// Write length bytes from addr into *data
iss::status status = static_cast<iss::arch_if*>(core)->write(iss::address_type::PHYSICAL, iss::access_type::READ,
0 /*traits<ARCH>::MEM*/, addr, length, data);
return status == iss::Ok;
@ -83,24 +85,24 @@ double vtype_t::lmul() {
return pow(2, signed_vlmul);
}
vreg_view read_vmask(uint8_t* V, uint8_t VLEN, uint16_t num_elem, uint8_t reg_idx) {
vreg_view read_vmask(uint8_t* V, uint8_t VLEN, uint16_t elem_count, uint8_t reg_idx) {
uint8_t* mask_start = V + VLEN / 8 * reg_idx;
return {mask_start, num_elem / 8u}; // this can return size==0 as num_elem can be as low as 1
return {mask_start, elem_count / 8u}; // this can return size==0 as elem_count can be as low as 1
}
uint64_t vector_load_store(void* core, std::function<bool(void*, uint64_t, uint64_t, uint8_t*)> load_store_fn, uint8_t* V, uint8_t VLEN,
uint8_t vd, uint64_t base_addr, uint64_t vl, uint64_t vstart, vtype_t vtype, bool vm, uint8_t elem_byte_size,
int8_t EMUL_pow, uint8_t segment_size, int64_t stride) {
uint64_t elem_count, int8_t EMUL_pow, uint8_t segment_size, int64_t stride) {
assert(pow(2, EMUL_pow) * segment_size <= 8);
uint64_t num_elem = VLEN * vtype.lmul() / vtype.sew();
assert((num_elem & (num_elem - 1)) == 0); // check that num_elem is power of 2
assert((elem_count & (elem_count - 1)) == 0); // check that elem_count is power of 2
assert(elem_count <= VLEN / 8);
unsigned eew = elem_byte_size * 8;
unsigned emul_stride = EMUL_pow <= 0 ? 1 : pow(2, EMUL_pow);
assert(emul_stride * segment_size <= 8);
assert(!(vd % emul_stride));
vreg_view mask_view = read_vmask(V, VLEN, num_elem, 0);
vreg_view mask_view = read_vmask(V, VLEN, elem_count, 0);
// elements w/ index smaller than vstart are in the prestart and get skipped
// body is from vstart to min(num_elem, vl)
for(unsigned idx = vstart; idx < std::min(num_elem, vl); idx++) {
// body is from vstart to min(elem_count, vl)
for(unsigned idx = vstart; idx < std::min(elem_count, vl); idx++) {
unsigned trap_idx = idx;
// vm decides active body element
uint8_t current_mask_byte = mask_view.get<uint8_t>(idx / 8);
@ -119,9 +121,9 @@ uint64_t vector_load_store(void* core, std::function<bool(void*, uint64_t, uint6
}
}
}
// elements w/ index larger than num_elem are in the tail (fractional LMUL)
// elements w/ index larger than elem_count are in the tail (fractional LMUL)
// elements w/ index larger than vl are in the tail
for(unsigned idx = std::min(num_elem, vl); idx < VLEN / 8; idx++) {
for(unsigned idx = std::min(elem_count, vl); idx < VLEN / 8; idx++) {
for(unsigned s_idx = 0; s_idx < segment_size; s_idx++) {
// base + selected vd + current_elem + current_segment
uint8_t* dest_elem = V + (vd * VLEN / 8) + (eew / 8 * idx) + (VLEN / 8 * s_idx * emul_stride);

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@ -37,6 +37,7 @@
#include "iss/arch_if.h"
#include "iss/vm_types.h"
#include <cstdint>
#include <functional>
#include <stdint.h>
namespace softvector {
@ -55,6 +56,6 @@ bool softvec_read(void* core, uint64_t addr, uint64_t length, uint8_t* data);
bool softvec_write(void* core, uint64_t addr, uint64_t length, uint8_t* data);
uint64_t vector_load_store(void* core, std::function<bool(void*, uint64_t, uint64_t, uint8_t*)> load_store_fn, uint8_t* V, uint8_t VLEN,
uint8_t vd, uint64_t base_addr, uint64_t vl, uint64_t vstart, vtype_t vtype, bool vm, uint8_t elem_size_byte,
int8_t EMUL_pow, uint8_t segment_size, int64_t stride = 1);
uint64_t elem_count, int8_t EMUL_pow, uint8_t segment_size, int64_t stride);
} // namespace softvector
#endif /* _VM_VECTOR_FUNCTIONS_H_ */