DBT-RISE
/
DBT-RISE-TGC
11
0
Fork 0
Code Issues 1 Pull Requests 1 Projects Releases Wiki Activity
575 Commits 9 Branches 0 Tags 4.3 MiB
Commit Graph

575 Commits

Author SHA1 Message Date
Eyck Jentzsch f357e563f2 Merge branch 'tmp' into develop 2020-01-09 19:44:52 +01:00
Eyck Jentzsch 116ed9bb5c [WIP] started to add TinyCC backend 2020-01-09 19:43:17 +01:00
Eyck Jentzsch c39460ee34 [WIP] started to add TinyCC backend 2020-01-09 19:37:17 +01:00
Eyck Jentzsch 8b9775e06b Changed namespaces for LLVM related stuff 2020-01-07 16:38:31 +01:00
Eyck Jentzsch 3c30c47c90 Updated description and added reference to VP 2019-12-10 04:45:04 +00:00
Eyck Jentzsch d037141d98 Fixed C++11 compatibility 2019-07-16 15:52:34 +02:00
Eyck Jentzsch 1947a2114f Fixed FMT header define 2019-07-14 16:51:14 +02:00
Eyck Jentzsch 4ea6d73d86 Updated README to reflect latest cahnges 2019-06-29 13:00:58 +00:00
Eyck Jentzsch e999d95623 Merge branch 'develop' 
Conflicts:
	dbt-core
	platform/src/sysc/plic.cpp
	sc-components
 2019-06-28 21:29:35 +02:00
Eyck Jentzsch cc21afaaff Fixed CMakeLists.txt dependencies 2019-06-28 21:25:23 +02:00
Eyck Jentzsch 7f06bba239 Fixed time csr handling 2019-06-28 20:58:02 +02:00
Eyck Jentzsch d93c2feec4 Cleanup dependencies 2019-06-18 19:20:43 +00:00
Eyck Jentzsch 2758933c16 Modernized CMake 2019-06-11 19:22:07 +00:00
Eyck Jentzsch 67d9beb7bd reorganized layout to only contain risc-v stuff 2019-06-11 16:49:37 +00:00
Eyck Jentzsch eb8365f4c3 Updated SC-Components 2019-04-11 05:40:02 +00:00
Eyck Jentzsch cb3a0d8411 Merge branch 'develop' 2019-01-10 11:15:02 +00:00
eyck 3e8583977a Refactored core descriptions 2019-01-10 10:58:13 +00:00
eyck f69b529cab Fixed implementation of RV64 so that remaining riscv-test pass 2019-01-10 10:35:20 +00:00
Eyck Jentzsch d5d236bf10 Adapted changes in SCC 2018-11-24 21:38:02 +01:00
Eyck Jentzsch 769610d6fc Improved disassembly of running ISS 2018-11-24 20:29:24 +01:00
Eyck Jentzsch df03e90181 Adapted to vm_base refactoring (move into llvm package) 2018-11-22 20:28:36 +01:00
Eyck Jentzsch 58a446e6bc Refoctored to to move SystemC wrapper into riscv library 2018-11-19 20:39:11 +01:00
Eyck Jentzsch a576fdf8e5 Cleanup of templates 2018-11-19 10:45:50 +01:00
Eyck Jentzsch 976777a039 Updated submodules 2018-11-12 19:41:23 +01:00
Eyck Jentzsch dd7b0f380a Cleanup 2018-11-12 19:38:16 +01:00
Eyck Jentzsch d160a34c5d Refactored arch_if to save unneeded constructor calls 2018-11-12 19:36:45 +01:00
Eyck Jentzsch 8092326437 Changed name to get consistent 2018-11-12 19:36:44 +01:00
Eyck Jentzsch 20b3665003 Back-ported DVCon turorial changes 2018-11-12 19:36:44 +01:00
Eyck Jentzsch 124a308ffa Fixed a type which rendered a link useless 2018-07-28 08:10:26 +00:00
Eyck Jentzsch 62c4311c31 Updated repository references 2018-07-28 10:07:00 +02:00
Eyck Jentzsch 0bf4933372 Added link to original repo 2018-07-28 10:02:28 +02:00
Eyck Jentzsch 38099e3fc6 Added ADC, H-Bridge and motor models, refactored project structure 2018-07-28 09:45:49 +02:00
Eyck Jentzsch 100822810f Added entire system incl. terminal and MCP3008 ADC connected via SPI 2018-07-23 22:46:30 +02:00
Eyck Jentzsch a899d30556 Implemented basic HiFive1-like platform with PLL,tracing etc. 2018-07-13 20:04:07 +02:00
Eyck Jentzsch b28595445c Extended README and clenaed up lauch configurations 2018-07-12 17:44:06 +02:00
Eyck Jentzsch fede5b2af1 Changed SystemC model to model a platform in a system. Added dedicated 
UART Terminal connected via tlm_signals
 2018-07-12 15:27:36 +02:00
Eyck Jentzsch a3baa45b00 Updated SystemC CCI to 1.0 2018-07-11 19:19:41 +02:00
Eyck Jentzsch 22426ad2ff Removed poco package as it is not used 2018-07-11 19:12:24 +02:00
Eyck Jentzsch e2cb2aff20 Updated DBT-RISE library 2018-07-11 17:44:42 +02:00
Eyck Jentzsch 51bfb02c33 Changed Seasocks lib setting 2018-07-10 19:01:31 +02:00
Eyck Jentzsch bd60e4dbe1 Fixed missing check for unset CMAKE_BUILD_TYPE 2018-07-10 18:25:14 +02:00
Eyck Jentzsch 282ff6964b Fixed typo in CMakeList.txt 2018-05-15 20:10:13 +02:00
Eyck Jentzsch dfcc3ace66 Adapted generated code to support translation block linking 2018-05-15 18:50:11 +02:00
Eyck Jentzsch 5b6dc36c9d Fixed validation errors in core dsl files. 2018-05-09 12:14:59 +02:00
Eyck Jentzsch 19b660962b Adapted descriptions to improved Core DSL and regenerated code 2018-05-01 18:33:55 +02:00
Eyck Jentzsch 9ad29ddb64 Merge branch 'develop' 
Conflicts:
	.cproject
	dbt-core
	sc-components
 2018-04-27 20:24:19 +02:00
Eyck Jentzsch 483b28f8a0 Updated submodules 2018-04-27 20:21:43 +02:00
Eyck Jentzsch a451bc0855 Updated submodules 2018-04-27 20:20:20 +02:00
Eyck Jentzsch 371876e39a Moved to dbt-core latest 2018-04-27 20:10:47 +02:00
Eyck Jentzsch 2e26be362a Adapted plugin behavior obeying availabiltiy of instrumentation 
interface and updated CMake files

Conflicts:
	dbt-core
 2018-04-27 20:07:24 +02:00