Commit Graph

113 Commits

Author SHA1 Message Date
7f06bba239 Fixed time csr handling 2019-06-28 20:58:02 +02:00
d93c2feec4 Cleanup dependencies 2019-06-18 19:20:43 +00:00
2758933c16 Modernized CMake 2019-06-11 19:22:07 +00:00
67d9beb7bd reorganized layout to only contain risc-v stuff 2019-06-11 16:49:37 +00:00
eb8365f4c3 Updated SC-Components 2019-04-11 05:40:02 +00:00
eyck
3e8583977a Refactored core descriptions 2019-01-10 10:58:13 +00:00
eyck
f69b529cab Fixed implementation of RV64 so that remaining riscv-test pass 2019-01-10 10:35:20 +00:00
d5d236bf10 Adapted changes in SCC 2018-11-24 21:38:02 +01:00
769610d6fc Improved disassembly of running ISS 2018-11-24 20:29:24 +01:00
df03e90181 Adapted to vm_base refactoring (move into llvm package) 2018-11-22 20:28:36 +01:00
58a446e6bc Refoctored to to move SystemC wrapper into riscv library 2018-11-19 20:39:11 +01:00
a576fdf8e5 Cleanup of templates 2018-11-19 10:45:50 +01:00
dd7b0f380a Cleanup 2018-11-12 19:38:16 +01:00
d160a34c5d Refactored arch_if to save unneeded constructor calls 2018-11-12 19:36:45 +01:00
8092326437 Changed name to get consistent 2018-11-12 19:36:44 +01:00
20b3665003 Back-ported DVCon turorial changes 2018-11-12 19:36:44 +01:00
124a308ffa Fixed a type which rendered a link useless 2018-07-28 08:10:26 +00:00
62c4311c31 Updated repository references 2018-07-28 10:07:00 +02:00
0bf4933372 Added link to original repo 2018-07-28 10:02:28 +02:00
38099e3fc6 Added ADC, H-Bridge and motor models, refactored project structure 2018-07-28 09:45:49 +02:00
100822810f Added entire system incl. terminal and MCP3008 ADC connected via SPI 2018-07-23 22:46:30 +02:00
a899d30556 Implemented basic HiFive1-like platform with PLL,tracing etc. 2018-07-13 20:04:07 +02:00
b28595445c Extended README and clenaed up lauch configurations 2018-07-12 17:44:06 +02:00
fede5b2af1 Changed SystemC model to model a platform in a system. Added dedicated
UART Terminal connected via tlm_signals
2018-07-12 15:27:36 +02:00
a3baa45b00 Updated SystemC CCI to 1.0 2018-07-11 19:19:41 +02:00
22426ad2ff Removed poco package as it is not used 2018-07-11 19:12:24 +02:00
e2cb2aff20 Updated DBT-RISE library 2018-07-11 17:44:42 +02:00
51bfb02c33 Changed Seasocks lib setting 2018-07-10 19:01:31 +02:00
bd60e4dbe1 Fixed missing check for unset CMAKE_BUILD_TYPE 2018-07-10 18:25:14 +02:00
282ff6964b Fixed typo in CMakeList.txt 2018-05-15 20:10:13 +02:00
dfcc3ace66 Adapted generated code to support translation block linking 2018-05-15 18:50:11 +02:00
5b6dc36c9d Fixed validation errors in core dsl files. 2018-05-09 12:14:59 +02:00
19b660962b Adapted descriptions to improved Core DSL and regenerated code 2018-05-01 18:33:55 +02:00
9ad29ddb64 Merge branch 'develop'
Conflicts:
	.cproject
	dbt-core
	sc-components
2018-04-27 20:24:19 +02:00
483b28f8a0 Updated submodules 2018-04-27 20:21:43 +02:00
a451bc0855 Updated submodules 2018-04-27 20:20:20 +02:00
371876e39a Moved to dbt-core latest 2018-04-27 20:10:47 +02:00
2e26be362a Adapted plugin behavior obeying availabiltiy of instrumentation
interface and updated CMake files

Conflicts:
	dbt-core
2018-04-27 20:07:24 +02:00
fc17686ff1 Cleanup of settings 2018-04-27 19:53:52 +02:00
1102449d38 Made plugin call configurable 2018-04-24 23:12:07 +02:00
292e2dbb89 Cleanup of SC wrapper 2018-04-24 19:03:30 +02:00
cff4b1d33b template cleanup 2018-04-24 19:02:21 +02:00
142654b0a2 Streamline arch descriptions according to latest CoreDSL changes 2018-04-24 17:18:24 +02:00
65ceedd157 Updated compressed instructions for RV32D 2018-04-24 15:48:42 +02:00
96700d00f9 Merge remote-tracking branch 'origin/develop' into develop 2018-04-24 15:36:21 +02:00
c9e4730502 Updated sc-components 2018-04-24 15:33:43 +02:00
ce98e2ad31 Added RV32D extension 2018-04-24 15:33:21 +02:00
48ad30dcae Added RV32F extension, fixed RV32M bugs 2018-04-24 11:05:11 +02:00
bc7450dad2 Added softfloat library into top level build system 2018-04-24 10:26:55 +02:00
dcaf5467e8 Added Berkeley softfloat library
(http://www.jhauser.us/arithmetic/SoftFloat.html) with RISCV
specialization and cmake build
2018-04-24 10:25:37 +02:00