DBT-RISE/DBT-RISE-TGC
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template cleanup

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This commit is contained in:
Eyck Jentzsch
2018-04-24 19:02:21 +02:00
parent 142654b0a2
commit cff4b1d33b
1 changed files with 0 additions and 16 deletions
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16
riscv/gen_input/templates/vm-vm_CORENAME.cpp.gtl
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@@ -112,15 +112,10 @@ protected:
void gen_trap_check(llvm::BasicBlock *bb);
inline llvm::Value *gen_reg_load(unsigned i, unsigned level = 0) {
return this->builder.CreateLoad(get_reg_ptr(i), false);
}
llvm::Value* gen_fdispatch(std::string fname, const std::vector<llvm::Value*>& args);
llvm::Value* gen_dispatch(std::string name, llvm::Value*, llvm::Value*, llvm::Value*);
inline void gen_set_pc(virt_addr_t pc, unsigned reg_num) {
llvm::Value *next_pc_v = this->builder.CreateSExtOrTrunc(this->gen_const(traits<ARCH>::XLEN, pc.val),
this->get_type(traits<ARCH>::XLEN));
@@ -325,17 +320,6 @@ template <typename ARCH> inline void vm_impl<ARCH>::gen_trap_check(llvm::BasicBl
bb, this->trap_blk, 1);
}
template<typename ARCH>
inline llvm::Value* vm_impl<ARCH>::gen_fdispatch(std::string fname, const std::vector<llvm::Value*>& args) {
return this->builder.CreateCall(this->mod->getFunction(fname), args);
}
template<typename ARCH>
inline llvm::Value* vm_impl<ARCH>::gen_dispatch(std::string name, llvm::Value* val1, llvm::Value* val2, llvm::Value* val3) {
}
} // namespace rv32imacf
template <>
std::unique_ptr<vm_if> create<arch::${coreDef.name.toLowerCase()}>(arch::${coreDef.name.toLowerCase()} *core, unsigned short port, bool dump) {
std::unique_ptr<${coreDef.name.toLowerCase()}::vm_impl<arch::${coreDef.name.toLowerCase()}>> ret =