Eyck-Alexander Jentzsch alex
  • Joined on 2021-12-01
alex pushed to develop at DBT-RISE/DBT-RISE-TGC 2024-07-23 13:35:56 +01:00
86de536c8f changes jh globals to seperate riscv specifics
alex pushed to develop at TGFS/TGC-ISS 2024-07-23 12:48:00 +01:00
78245ec817 updates submodules
alex pushed to develop at DBT-RISE/DBT-RISE-TGC 2024-07-23 12:47:07 +01:00
051dd5e2d3 updates templates for decoder in seperate class, adds again generated templates
e3942be776 Introduces decoder in a seperate class
6ee484a771 moves instruction decoder into own class
60808c8649 corrects template since util fns are no longer vm_base members
Compare 4 commits »
alex pushed to develop at TGFS/TGC-ISS 2024-07-22 08:24:28 +01:00
4058eed106 updates submodules
alex pushed to develop at DBT-RISE/DBT-RISE-TGC 2024-07-22 08:23:55 +01:00
0432803d82 updates templates and vm impls for better LAST_BRANCH handling
alex pushed to develop at TGFS/TGC-ISS 2024-07-18 13:33:02 +01:00
1fee44c084 enables all cores in Jenkinsfile
497b1d33d4 updates submodules
db0d125651 adds Debug tools
Compare 3 commits »
alex pushed to develop at DBT-RISE/DBT-RISE-TGC 2024-07-18 13:31:53 +01:00
4f5d9214ed adds newly generated instr.yaml
d42d2ce533 corrects illegal instruction for llvm
236d12d7f5 integrates gen_bool for Conditions (was truncation) into llvm
e1b6cab890 removes setting of NEXT_PC to max when trapping in llvm and asmjit, adds default disass to llvm
8361f88718 removes setting of NEXT_PC to max if trap
Compare 16 commits »
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 21:05:09 +01:00
c365d4f822 removes TGC5B from testing as it is also not generated atm
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 15:37:24 +01:00
6ce8eada3e removes TGC5C from generation as it is already in TGC-ISS
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 14:47:02 +01:00
6ee4840d8d removes TGC5B from testing
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 11:59:45 +01:00
c0e557316f adds switch to mkdir
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 11:41:16 +01:00
c4a746d4c8 splits 32 and 64 bits, disables RVE for now
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 10:26:57 +01:00
45e5ab6133 cleans repo before checkout
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 10:23:20 +01:00
8811f13d1c checks out ISS explicitly
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:55:32 +01:00
c2056c30f3 fixes syntax for multiline command
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:54:01 +01:00
3da38170ff generates cores manually
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:24:51 +01:00
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:19:58 +01:00
99e36acbae fixes bugs
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:14:49 +01:00
21ca5aee7a different agents for different stages
alex pushed to develop at TGFS/TGC-ISS 2024-07-11 09:04:38 +01:00
c99a7982b7 adds seperate image for core gen