DBT-RISE/DBT-RISE-TGC
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renames core(s)

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This commit is contained in:
Eyck Jentzsch
2023-08-27 15:17:12 +02:00
parent 0b719a4b57
commit c8a4a4c736
11 changed files with 100 additions and 100 deletions
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2
src/sysc/core_complex.cpp
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@@ -145,7 +145,7 @@ public:
std::tie(cpu, vm) = f.create(type+"|"+backend);
} else {
auto base_isa = type.substr(0, 5);
if(base_isa=="tgc_d" || base_isa=="tgc_e") {
if(base_isa=="tgc5d" || base_isa=="tgc5e") {
std::tie(cpu, vm) = f.create(type + "|mu_p_clic_pmp|" + backend, gdb_port);
} else {
std::tie(cpu, vm) = f.create(type + "|m_p|" + backend, gdb_port);

6
src/sysc/core_complex.h
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@@ -96,7 +96,7 @@ public:
cci::cci_param<uint64_t> reset_address{"reset_address", 0ULL};
cci::cci_param<std::string> core_type{"core_type", "tgc_c"};
cci::cci_param<std::string> core_type{"core_type", "tgc5c"};
cci::cci_param<std::string> backend{"backend", "interp"};
@@ -121,7 +121,7 @@ public:
scml_property<unsigned long long> reset_address{"reset_address", 0ULL};
scml_property<std::string> core_type{"core_type", "tgc_c"};
scml_property<std::string> core_type{"core_type", "tgc5c"};
scml_property<std::string> backend{"backend", "interp"};
@@ -139,7 +139,7 @@ public:
, elf_file{"elf_file", ""}
, enable_disass{"enable_disass", false}
, reset_address{"reset_address", 0ULL}
, core_type{"core_type", "tgc_c"}
, core_type{"core_type", "tgc5c"}
, backend{"backend", "interp"}
, gdb_server_port{"gdb_server_port", 0}
, dump_ir{"dump_ir", false}

18
src/sysc/register_tgc_c.cpp
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@@ -31,7 +31,7 @@
*******************************************************************************/
#include <iss/factory.h>
#include <iss/arch/tgc_c.h>
#include <iss/arch/tgc5c.h>
#include <iss/arch/riscv_hart_m_p.h>
#include <iss/arch/riscv_hart_mu_p.h>
#include "sc_core_adapter.h"
@@ -40,14 +40,14 @@
namespace iss {
namespace interp {
volatile std::array<bool, 2> tgc_init = {
core_factory::instance().register_creator("tgc_c|m_p|interp", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
core_factory::instance().register_creator("tgc5c|m_p|interp", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
arch::tgc_c* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::tgc_c>>(cc);
arch::tgc5c* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::tgc5c>>(cc);
return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}};
}),
core_factory::instance().register_creator("tgc_c|mu_p|interp", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
core_factory::instance().register_creator("tgc5c|mu_p|interp", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
arch::tgc_c* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::tgc_c>>(cc);
arch::tgc5c* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::tgc5c>>(cc);
return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}};
})
};
@@ -55,14 +55,14 @@ volatile std::array<bool, 2> tgc_init = {
#if defined(WITH_TCC)
namespace tcc {
volatile std::array<bool, 2> tgc_init = {
core_factory::instance().register_creator("tgc_c|m_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
core_factory::instance().register_creator("tgc5c|m_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
arch::tgc_c* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::tgc_c>>(cc);
arch::tgc5c* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::tgc5c>>(cc);
return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}};
}),
core_factory::instance().register_creator("tgc_c|mu_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
core_factory::instance().register_creator("tgc5c|mu_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple<cpu_ptr, vm_ptr>{
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
arch::tgc_c* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::tgc_c>>(cc);
arch::tgc5c* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::tgc5c>>(cc);
return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}};
})
};