From c8a4a4c73633ae88900e5075746d4ca3636745f4 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 27 Aug 2023 15:17:12 +0200 Subject: [PATCH] renames core(s) --- CMakeLists.txt | 8 +-- gen_input/TGC_C.core_desc | 4 +- src/iss/arch/{tgc_c.cpp => tgc5c.cpp} | 24 ++++----- src/iss/arch/{tgc_c.h => tgc5c.h} | 32 ++++++------ src/iss/arch/tgc_mapper.h | 52 ++++++++++---------- src/sysc/core_complex.cpp | 2 +- src/sysc/core_complex.h | 6 +-- src/sysc/register_tgc_c.cpp | 18 +++---- src/vm/interp/{vm_tgc_c.cpp => vm_tgc5c.cpp} | 22 ++++----- src/vm/llvm/{vm_tgc_c.cpp => vm_tgc5c.cpp} | 10 ++-- src/vm/tcc/{vm_tgc_c.cpp => vm_tgc5c.cpp} | 22 ++++----- 11 files changed, 100 insertions(+), 100 deletions(-) rename src/iss/arch/{tgc_c.cpp => tgc5c.cpp} (84%) rename src/iss/arch/{tgc_c.h => tgc5c.h} (93%) rename src/vm/interp/{vm_tgc_c.cpp => vm_tgc5c.cpp} (99%) rename src/vm/llvm/{vm_tgc_c.cpp => vm_tgc5c.cpp} (99%) rename src/vm/tcc/{vm_tgc_c.cpp => vm_tgc5c.cpp} (99%) diff --git a/CMakeLists.txt b/CMakeLists.txt index d7977b3..fde9fdc 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -31,13 +31,13 @@ add_subdirectory(softfloat) set(LIB_SOURCES src/iss/plugin/instruction_count.cpp - src/iss/arch/tgc_c.cpp - src/vm/tcc/vm_tgc_c.cpp - src/vm/interp/vm_tgc_c.cpp + src/iss/arch/tgc5c.cpp + src/vm/tcc/vm_tgc5c.cpp + src/vm/interp/vm_tgc5c.cpp src/vm/fp_functions.cpp ) if(WITH_TCC) - list(APPEND LIB_SOURCES src/vm/tcc/vm_tgc_c.cpp) + list(APPEND LIB_SOURCES src/vm/tcc/vm_tgc5c.cpp) endif() # library files diff --git a/gen_input/TGC_C.core_desc b/gen_input/TGC_C.core_desc index 8377d41..f57a6c4 100644 --- a/gen_input/TGC_C.core_desc +++ b/gen_input/TGC_C.core_desc @@ -1,8 +1,8 @@ -import "ISA/RV32I.core_desc" +import "ISA/RVI.core_desc" import "ISA/RVM.core_desc" import "ISA/RVC.core_desc" -Core TGC_C provides RV32I, Zicsr, Zifencei, RV32M, RV32IC { +Core TGC5C provides RV32I, Zicsr, Zifencei, RV32M, RV32IC { architectural_state { XLEN=32; // definitions for the architecture wrapper diff --git a/src/iss/arch/tgc_c.cpp b/src/iss/arch/tgc5c.cpp similarity index 84% rename from src/iss/arch/tgc_c.cpp rename to src/iss/arch/tgc5c.cpp index e4fc905..2b9fc3f 100644 --- a/src/iss/arch/tgc_c.cpp +++ b/src/iss/arch/tgc5c.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include "tgc_c.h" +#include "tgc5c.h" #include "util/ities.h" #include #include @@ -39,18 +39,18 @@ using namespace iss::arch; -constexpr std::array iss::arch::traits::reg_names; -constexpr std::array iss::arch::traits::reg_aliases; -constexpr std::array iss::arch::traits::reg_bit_widths; -constexpr std::array iss::arch::traits::reg_byte_offsets; +constexpr std::array iss::arch::traits::reg_names; +constexpr std::array iss::arch::traits::reg_aliases; +constexpr std::array iss::arch::traits::reg_bit_widths; +constexpr std::array iss::arch::traits::reg_byte_offsets; -tgc_c::tgc_c() = default; +tgc5c::tgc5c() = default; -tgc_c::~tgc_c() = default; +tgc5c::~tgc5c() = default; -void tgc_c::reset(uint64_t address) { - auto base_ptr = reinterpret_cast::reg_t*>(get_regs_base_ptr()); - for(size_t i=0; i::NUM_REGS; ++i) +void tgc5c::reset(uint64_t address) { + auto base_ptr = reinterpret_cast::reg_t*>(get_regs_base_ptr()); + for(size_t i=0; i::NUM_REGS; ++i) *(base_ptr+i)=0; reg.PC=address; reg.NEXT_PC=reg.PC; @@ -59,11 +59,11 @@ void tgc_c::reset(uint64_t address) { reg.icount=0; } -uint8_t *tgc_c::get_regs_base_ptr() { +uint8_t *tgc5c::get_regs_base_ptr() { return reinterpret_cast(®); } -tgc_c::phys_addr_t tgc_c::virt2phys(const iss::addr_t &pc) { +tgc5c::phys_addr_t tgc5c::virt2phys(const iss::addr_t &pc) { return phys_addr_t(pc); // change logical address to physical address } diff --git a/src/iss/arch/tgc_c.h b/src/iss/arch/tgc5c.h similarity index 93% rename from src/iss/arch/tgc_c.h rename to src/iss/arch/tgc5c.h index 2f33ca5..38e2e31 100644 --- a/src/iss/arch/tgc_c.h +++ b/src/iss/arch/tgc5c.h @@ -30,8 +30,8 @@ * *******************************************************************************/ -#ifndef _TGC_C_H_ -#define _TGC_C_H_ +#ifndef _TGC5C_H_ +#define _TGC5C_H_ #include #include @@ -41,11 +41,11 @@ namespace iss { namespace arch { -struct tgc_c; +struct tgc5c; -template <> struct traits { +template <> struct traits { - constexpr static char const* const core_type = "TGC_C"; + constexpr static char const* const core_type = "TGC5C"; static constexpr std::array reg_names{ {"X0", "X1", "X2", "X3", "X4", "X5", "X6", "X7", "X8", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X27", "X28", "X29", "X30", "X31", "PC", "NEXT_PC", "PRIV", "DPC"}}; @@ -175,15 +175,15 @@ template <> struct traits { }; }; -struct tgc_c: public arch_if { +struct tgc5c: public arch_if { - using virt_addr_t = typename traits::virt_addr_t; - using phys_addr_t = typename traits::phys_addr_t; - using reg_t = typename traits::reg_t; - using addr_t = typename traits::addr_t; + using virt_addr_t = typename traits::virt_addr_t; + using phys_addr_t = typename traits::phys_addr_t; + using reg_t = typename traits::reg_t; + using addr_t = typename traits::addr_t; - tgc_c(); - ~tgc_c(); + tgc5c(); + ~tgc5c(); void reset(uint64_t address=0) override; @@ -196,9 +196,9 @@ struct tgc_c: public arch_if { inline uint64_t stop_code() { return interrupt_sim; } inline phys_addr_t v2p(const iss::addr_t& addr){ - if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || + if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || addr_mode[static_cast(addr.access)&0x3]==address_type::PHYSICAL) { - return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); + return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); } else return virt2phys(addr); } @@ -211,7 +211,7 @@ struct tgc_c: public arch_if { #pragma pack(push, 1) - struct TGC_C_regs { + struct TGC5C_regs { uint32_t X0 = 0; uint32_t X1 = 0; uint32_t X2 = 0; @@ -267,4 +267,4 @@ struct tgc_c: public arch_if { } } -#endif /* _TGC_C_H_ */ +#endif /* _TGC5C_H_ */ diff --git a/src/iss/arch/tgc_mapper.h b/src/iss/arch/tgc_mapper.h index ebacac0..83f82da 100644 --- a/src/iss/arch/tgc_mapper.h +++ b/src/iss/arch/tgc_mapper.h @@ -2,49 +2,49 @@ #define _ISS_ARCH_TGC_MAPPER_H #include "riscv_hart_m_p.h" -#include "tgc_c.h" -using tgc_c_plat_type = iss::arch::riscv_hart_m_p; -#ifdef CORE_TGC_A +#include "tgc5c.h" +using tgc5c_plat_type = iss::arch::riscv_hart_m_p; +#ifdef CORE_TGC5A #include "riscv_hart_m_p.h" -#include -using tgc_a_plat_type = iss::arch::riscv_hart_m_p; +#include +using tgc5a_plat_type = iss::arch::riscv_hart_m_p; #endif -#ifdef CORE_TGC_B +#ifdef CORE_TGC5B #include "riscv_hart_m_p.h" -#include -using tgc_b_plat_type = iss::arch::riscv_hart_m_p; +#include +using tgc5b_plat_type = iss::arch::riscv_hart_m_p; #endif -#ifdef CORE_TGC_C_XRB_NN +#ifdef CORE_TGC5C_XRB_NN #include "riscv_hart_m_p.h" #include "hwl.h" -#include -using tgc_c_xrb_nn_plat_type = iss::arch::hwl>; +#include +using tgc5c_xrb_nn_plat_type = iss::arch::hwl>; #endif -#ifdef CORE_TGC_D +#ifdef CORE_TGC5D #include "riscv_hart_mu_p.h" -#include -using tgc_d_plat_type = iss::arch::riscv_hart_mu_p; +#include +using tgc5d_plat_type = iss::arch::riscv_hart_mu_p; #endif -#ifdef CORE_TGC_D_XRB_MAC +#ifdef CORE_TGC5D_XRB_MAC #include "riscv_hart_mu_p.h" -#include -using tgc_d_xrb_mac_plat_type = iss::arch::riscv_hart_mu_p; +#include +using tgc5d_xrb_mac_plat_type = iss::arch::riscv_hart_mu_p; #endif -#ifdef CORE_TGC_D_XRB_NN +#ifdef CORE_TGC5D_XRB_NN #include "riscv_hart_mu_p.h" #include "hwl.h" -#include -using tgc_d_xrb_nn_plat_type = iss::arch::hwl>; +#include +using tgc5d_xrb_nn_plat_type = iss::arch::hwl>; #endif -#ifdef CORE_TGC_E +#ifdef CORE_TGC5E #include "riscv_hart_mu_p.h" -#include -using tgc_e_plat_type = iss::arch::riscv_hart_mu_p; +#include +using tgc5e_plat_type = iss::arch::riscv_hart_mu_p; #endif -#ifdef CORE_TGC_X +#ifdef CORE_TGC5X #include "riscv_hart_mu_p.h" -#include -using tgc_x_plat_type = iss::arch::riscv_hart_mu_p; +#include +using tgc5x_plat_type = iss::arch::riscv_hart_mu_p; #endif #endif diff --git a/src/sysc/core_complex.cpp b/src/sysc/core_complex.cpp index e3b0433..437412d 100644 --- a/src/sysc/core_complex.cpp +++ b/src/sysc/core_complex.cpp @@ -145,7 +145,7 @@ public: std::tie(cpu, vm) = f.create(type+"|"+backend); } else { auto base_isa = type.substr(0, 5); - if(base_isa=="tgc_d" || base_isa=="tgc_e") { + if(base_isa=="tgc5d" || base_isa=="tgc5e") { std::tie(cpu, vm) = f.create(type + "|mu_p_clic_pmp|" + backend, gdb_port); } else { std::tie(cpu, vm) = f.create(type + "|m_p|" + backend, gdb_port); diff --git a/src/sysc/core_complex.h b/src/sysc/core_complex.h index f9430f4..ec3a05a 100644 --- a/src/sysc/core_complex.h +++ b/src/sysc/core_complex.h @@ -96,7 +96,7 @@ public: cci::cci_param reset_address{"reset_address", 0ULL}; - cci::cci_param core_type{"core_type", "tgc_c"}; + cci::cci_param core_type{"core_type", "tgc5c"}; cci::cci_param backend{"backend", "interp"}; @@ -121,7 +121,7 @@ public: scml_property reset_address{"reset_address", 0ULL}; - scml_property core_type{"core_type", "tgc_c"}; + scml_property core_type{"core_type", "tgc5c"}; scml_property backend{"backend", "interp"}; @@ -139,7 +139,7 @@ public: , elf_file{"elf_file", ""} , enable_disass{"enable_disass", false} , reset_address{"reset_address", 0ULL} - , core_type{"core_type", "tgc_c"} + , core_type{"core_type", "tgc5c"} , backend{"backend", "interp"} , gdb_server_port{"gdb_server_port", 0} , dump_ir{"dump_ir", false} diff --git a/src/sysc/register_tgc_c.cpp b/src/sysc/register_tgc_c.cpp index 1fe4194..cf3ccd5 100644 --- a/src/sysc/register_tgc_c.cpp +++ b/src/sysc/register_tgc_c.cpp @@ -31,7 +31,7 @@ *******************************************************************************/ #include -#include +#include #include #include #include "sc_core_adapter.h" @@ -40,14 +40,14 @@ namespace iss { namespace interp { volatile std::array tgc_init = { - core_factory::instance().register_creator("tgc_c|m_p|interp", [](unsigned gdb_port, void* data) -> std::tuple{ + core_factory::instance().register_creator("tgc5c|m_p|interp", [](unsigned gdb_port, void* data) -> std::tuple{ auto cc = reinterpret_cast(data); - arch::tgc_c* cpu = new sc_core_adapter>(cc); + arch::tgc5c* cpu = new sc_core_adapter>(cc); return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}}; }), - core_factory::instance().register_creator("tgc_c|mu_p|interp", [](unsigned gdb_port, void* data) -> std::tuple{ + core_factory::instance().register_creator("tgc5c|mu_p|interp", [](unsigned gdb_port, void* data) -> std::tuple{ auto cc = reinterpret_cast(data); - arch::tgc_c* cpu = new sc_core_adapter>(cc); + arch::tgc5c* cpu = new sc_core_adapter>(cc); return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}}; }) }; @@ -55,14 +55,14 @@ volatile std::array tgc_init = { #if defined(WITH_TCC) namespace tcc { volatile std::array tgc_init = { - core_factory::instance().register_creator("tgc_c|m_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple{ + core_factory::instance().register_creator("tgc5c|m_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple{ auto cc = reinterpret_cast(data); - arch::tgc_c* cpu = new sc_core_adapter>(cc); + arch::tgc5c* cpu = new sc_core_adapter>(cc); return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}}; }), - core_factory::instance().register_creator("tgc_c|mu_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple{ + core_factory::instance().register_creator("tgc5c|mu_p|tcc", [](unsigned gdb_port, void* data) -> std::tuple{ auto cc = reinterpret_cast(data); - arch::tgc_c* cpu = new sc_core_adapter>(cc); + arch::tgc5c* cpu = new sc_core_adapter>(cc); return {cpu_ptr{cpu}, vm_ptr{create(cpu, gdb_port)}}; }) }; diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc5c.cpp similarity index 99% rename from src/vm/interp/vm_tgc_c.cpp rename to src/vm/interp/vm_tgc5c.cpp index 3b409df..07218cf 100644 --- a/src/vm/interp/vm_tgc_c.cpp +++ b/src/vm/interp/vm_tgc5c.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -50,7 +50,7 @@ namespace iss { namespace interp { -namespace tgc_c { +namespace tgc5c { using namespace iss::arch; using namespace iss::debugger; using namespace std::placeholders; @@ -2635,11 +2635,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co return pc; } -} // namespace tgc_c +} // namespace tgc5c template <> -std::unique_ptr create(arch::tgc_c *core, unsigned short port, bool dump) { - auto ret = new tgc_c::vm_impl(*core, dump); +std::unique_ptr create(arch::tgc5c *core, unsigned short port, bool dump) { + auto ret = new tgc5c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } @@ -2652,15 +2652,15 @@ std::unique_ptr create(arch::tgc_c *core, unsigned short por namespace iss { namespace { volatile std::array dummy = { - core_factory::instance().register_creator("tgc_c|m_p|interp", [](unsigned port, void*) -> std::tuple{ - auto* cpu = new iss::arch::riscv_hart_m_p(); - auto vm = new interp::tgc_c::vm_impl(*cpu, false); + core_factory::instance().register_creator("tgc5c|m_p|interp", [](unsigned port, void*) -> std::tuple{ + auto* cpu = new iss::arch::riscv_hart_m_p(); + auto vm = new interp::tgc5c::vm_impl(*cpu, false); if (port != 0) debugger::server::run_server(vm, port); return {cpu_ptr{cpu}, vm_ptr{vm}}; }), - core_factory::instance().register_creator("tgc_c|mu_p|interp", [](unsigned port, void*) -> std::tuple{ - auto* cpu = new iss::arch::riscv_hart_mu_p(); - auto vm = new interp::tgc_c::vm_impl(*cpu, false); + core_factory::instance().register_creator("tgc5c|mu_p|interp", [](unsigned port, void*) -> std::tuple{ + auto* cpu = new iss::arch::riscv_hart_mu_p(); + auto vm = new interp::tgc5c::vm_impl(*cpu, false); if (port != 0) debugger::server::run_server(vm, port); return {cpu_ptr{cpu}, vm_ptr{vm}}; }) diff --git a/src/vm/llvm/vm_tgc_c.cpp b/src/vm/llvm/vm_tgc5c.cpp similarity index 99% rename from src/vm/llvm/vm_tgc_c.cpp rename to src/vm/llvm/vm_tgc5c.cpp index e712445..f65f998 100644 --- a/src/vm/llvm/vm_tgc_c.cpp +++ b/src/vm/llvm/vm_tgc5c.cpp @@ -30,8 +30,8 @@ * *******************************************************************************/ -#include #include +#include #include #include #include @@ -52,7 +52,7 @@ namespace fp_impl { void add_fp_functions_2_module(::llvm::Module *, unsigned, unsigned); } -namespace tgc_c { +namespace tgc5c { using namespace ::llvm; using namespace iss::arch; using namespace iss::debugger; @@ -4151,11 +4151,11 @@ template inline void vm_impl::gen_trap_check(BasicBlock *b bb, this->trap_blk, 1); } -} // namespace tgc_c +} // namespace tgc5c template <> -std::unique_ptr create(arch::tgc_c *core, unsigned short port, bool dump) { - auto ret = new tgc_c::vm_impl(*core, dump); +std::unique_ptr create(arch::tgc5c *core, unsigned short port, bool dump) { + auto ret = new tgc5c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/tcc/vm_tgc_c.cpp b/src/vm/tcc/vm_tgc5c.cpp similarity index 99% rename from src/vm/tcc/vm_tgc_c.cpp rename to src/vm/tcc/vm_tgc5c.cpp index 371aa95..55bc1f6 100644 --- a/src/vm/tcc/vm_tgc_c.cpp +++ b/src/vm/tcc/vm_tgc5c.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -48,7 +48,7 @@ namespace iss { namespace tcc { -namespace tgc_c { +namespace tgc5c { using namespace iss::arch; using namespace iss::debugger; @@ -3210,11 +3210,11 @@ template void vm_impl::gen_trap_behavior(tu_builder& tu) { tu("return *next_pc;"); } -} // namespace tgc_c +} // namespace tgc5c template <> -std::unique_ptr create(arch::tgc_c *core, unsigned short port, bool dump) { - auto ret = new tgc_c::vm_impl(*core, dump); +std::unique_ptr create(arch::tgc5c *core, unsigned short port, bool dump) { + auto ret = new tgc5c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } @@ -3227,15 +3227,15 @@ std::unique_ptr create(arch::tgc_c *core, unsigned short por namespace iss { namespace { volatile std::array dummy = { - core_factory::instance().register_creator("tgc_c|m_p|tcc", [](unsigned port, void*) -> std::tuple{ - auto* cpu = new iss::arch::riscv_hart_m_p(); - auto vm = new tcc::tgc_c::vm_impl(*cpu, false); + core_factory::instance().register_creator("tgc5c|m_p|tcc", [](unsigned port, void*) -> std::tuple{ + auto* cpu = new iss::arch::riscv_hart_m_p(); + auto vm = new tcc::tgc5c::vm_impl(*cpu, false); if (port != 0) debugger::server::run_server(vm, port); return {cpu_ptr{cpu}, vm_ptr{vm}}; }), - core_factory::instance().register_creator("tgc_c|mu_p|tcc", [](unsigned port, void*) -> std::tuple{ - auto* cpu = new iss::arch::riscv_hart_mu_p(); - auto vm = new tcc::tgc_c::vm_impl(*cpu, false); + core_factory::instance().register_creator("tgc5c|mu_p|tcc", [](unsigned port, void*) -> std::tuple{ + auto* cpu = new iss::arch::riscv_hart_mu_p(); + auto vm = new tcc::tgc5c::vm_impl(*cpu, false); if (port != 0) debugger::server::run_server(vm, port); return {cpu_ptr{cpu}, vm_ptr{vm}}; })