The bare-metal board support package to enable software development for MINRES ISS, VPs, and RTL IPs

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Johannes Wirth 46f197c287 Add additional registers for input to FW (number of XSPNs, batch size, iterations)		2022-03-11 14:21:25 +01:00
demo_gpio	add CDT project files, update binaries	2020-06-18 12:32:41 +02:00
dhrystone	add CDT project files, update binaries	2020-06-18 12:32:41 +02:00
fpga_spn	Add additional registers for input to FW	2022-03-11 14:21:25 +01:00
hello	initial FW setup for Raven validation	2020-09-03 11:13:37 +02:00
hello-world	fix hello-world init	2021-04-09 11:19:05 +02:00
raven	extend spn_checker to comapre the results from 2nd XSPN accelerator	2021-04-20 20:36:00 +02:00
raven_spn	Add additional registers for input to FW	2022-03-11 14:21:25 +01:00
riscv-bldc-forced-commutation	start implementing FW to control SPN HW	2020-10-01 17:18:29 +02:00
.gitignore	start implementing FW to control SPN HW	2020-10-01 17:18:29 +02:00
LICENSE	Initial commit	2018-06-23 10:17:35 +00:00
README.md	Initial commit	2018-06-23 10:17:35 +00:00

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