Go to file
Eyck Jentzsch f3dc9aea54 adds wrap for scanf in dhrystone 2024-08-28 18:13:40 +02:00
bare-metal-bsp@87dc0ec230 merge develop to main in bare-metal-bsp 2024-04-17 08:35:43 +02:00
benchmarks adds wrap for scanf in dhrystone 2024-08-28 18:13:40 +02:00
hello-world Merge remote-tracking branch 'origin/main' into develop 2024-03-20 12:29:57 +01:00
hifive1-vp rework structure 2023-08-20 15:00:51 +02:00
.gitignore first semihosting integration 2024-02-26 20:41:13 +01:00
.gitmodules replaces bare-metal-bsp with submodule 2024-01-13 15:37:10 +01:00
CMakeLists.txt fixes target naming 2024-06-14 20:46:09 +02:00
Jenkinsfile updates submodule and Jenkins accordingly 2024-04-15 12:19:53 +02:00
LICENSE Initial commit 2018-06-23 10:17:35 +00:00
README.md appendage 2024-06-17 19:04:12 +02:00

README.md

MINRES Firmware Repository

Structure

This repository comes with several executables ready to be built, such as hello-world or coremark and dhrystone in the benchmark directory. Creating the executables in the easiest way possible is done by calling makein the corresponding directory.

Prerequisite

This repository requires riscv64-unknown-elf-gcc to be located in $PATH.

How to Use

When compiling executables, the target platform needs to be specified using the 'BOARD' variable. When compiling for the TGC5C for example, use make BOARD=tgc_vp, when compiling for RTL make BOARD=rtl. The default value for the Board variable is 'iss'. The arch can be set with the 'ISA' variable, the default value is 'imc'.

When compiling for the TGC5A VP for example, the call to create the correct binary is the following:

make BOARD=tgc_vp ISA=e

Useful information

Using bear -- <build-command> will cause a compile_commands.json to be emitted. This allows using completion tools like clangd.

Current Limitations

Currently, this repository only supports creation of 32-bit executables (Even when setting the RISCV_ARCH and RISCV_ABI manually).

Compiling for the 'e' extension / ISA together with any other extension (ISA=emc for example), requires setting the RISCV_ABI=ilp32e explicitly.

When switching ABI or ARCH ensure that object files in the corresponding 'env' dir in the 'bare-metal-bsp' submodule are removed, so they get created with the appropriate flags (namely the 'init.o' file).