fixes dhrystone make settings

.gitignore

@@ -151,3 +151,6 @@ compile_commands.json
 CTestTestfile.cmake
 *.dump
 
+.vscode/c_cpp_properties.json
+semihosting_test/build/semihosting_test
+semihosting_test/build/Makefile

CMakeLists.txt

@@ -4,16 +4,8 @@ endif()
 if (NOT DEFINED ISA)
 	set(ISA imc)
 endif()
-message(STATUS "Building firmware using ${BOARD} board configuration")
+message(STATUS "Building firmware using ${BOARD} board configuration and isa ${ISA}")
-add_custom_target(fw-hello-world ALL 
+add_custom_target(fw-common ALL 
-	COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world BOARD=${BOARD} ISA=${ISA}
+	COMMAND make -C hello-world BOARD=${BOARD} ISA=${ISA} && make -C benchmarks/dhrystone BOARD=${BOARD} ISA=${ISA} && make -C benchmarks/coremark BOARD=${BOARD} ISA=${ISA}
-	USES_TERMINAL
-	WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
-add_custom_target(fw-dhrystone ALL 
-	COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone BOARD=${BOARD} ISA=${ISA}
-    USES_TERMINAL
-    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
-add_custom_target(fw-coremark ALL 
-	COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark BOARD=${BOARD} ISA=${ISA}
     USES_TERMINAL
     WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})

README.md

@@ -1,3 +1,25 @@
-# Firmware
+# MINRES Firmware Repository
+## Structure
+This repository comes with several executables ready to be built, such as `hello-world` or `coremark` and `dhrystone` in the `benchmark` directory.
+Creating the executables in the easiest way possible is done by calling `make`in the corresponding directory.
 
-Using `make clean && bear -- make ` will cause a correct compile_commands.json to be emitted. This allows using completion tools like clangd. 
+## Prerequisite
+This repository requires `riscv64-unknown-elf-gcc` to be located in `$PATH`.
+
+## How to Use
+When compiling executables, the target platform needs to be specified using the 'BOARD' variable. When compiling for the TGC5C for example, use  `make BOARD=tgc_vp`, when compiling for RTL `make BOARD=rtl`. The default value for the Board variable is 'iss'.
+The arch can be set with the 'ISA' variable, the default value is 'imc'.
+
+When compiling for the TGC5A VP for example, the call to create the correct binary is the following:
+```
+make BOARD=tgc_vp ISA=e
+```
+## Useful information
+Using `bear -- <build-command>` will cause a compile_commands.json to be emitted. This allows using completion tools like clangd. 
+
+## Current Limitations
+Currently, this repository only supports creation of 32-bit executables (Even when setting the `RISCV_ARCH` and `RISCV_ABI` manually).
+
+Compiling for the 'e' extension / ISA together with any other extension (`ISA=emc` for example), requires setting the `RISCV_ABI=ilp32e` explicitly. 
+
+When switching ABI or ARCH ensure that object files in the corresponding 'env' dir in the 'bare-metal-bsp' submodule are removed, so they get created with the appropriate flags (namely the 'init.o' file).

benchmarks/coremark/ee_printf.c

@@ -664,7 +664,7 @@ ee_vsprintf(char *buf, const char *fmt, va_list args)
 void
 uart_send_char(char c)
 {
-#if defined(BOARD_ehrenberg)
+#if defined(BOARD_ehrenberg) || defined(BOARD_tgc_vp)
             while (get_uart_rx_tx_reg_tx_free(uart)==0) ;
             uart_write(uart, c);
             if (c == '\n') {

benchmarks/dhrystone/Makefile

@@ -15,9 +15,9 @@ else
     RISCV_ABI:=ilp32
 endif
 # '-lgcc -lm' are needed to add softfloat routines
-CFLAGS  := -g -march=$(RISCV_ARCH)_zicsr_zifencei -mabi=$(RISCV_ABI) -mcmodel=medlow -O3 -DITERATIONS=$(ITERATIONS) -DHZ=32768 -DTIME -DNO_INIT -fno-inline -fno-builtin-printf -fno-common -Wno-implicit \
+CFLAGS  := -g -O3 -DITERATIONS=$(ITERATIONS) -DHZ=32768 -DTIME -DNO_INIT -fno-inline -fno-builtin-printf -fno-common -Wno-implicit \
  -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las
-LDFLAGS := -g -march=$(RISCV_ARCH)_zicsr_zifencei -mabi=$(RISCV_ABI) -mcmodel=medlow -Wl,--wrap=scanf -Wl,--wrap=printf -Wl,--wrap=exit -lgcc -lm
+LDFLAGS := -Wl,--wrap=scanf
 
 TOOL_DIR=$(dir $(compiler))