Eyck Jentzsch b0cb997009 add TGC_X with DMR		2022-03-26 10:48:21 +01:00
..
.gitignore	update names	2021-05-13 15:54:48 +02:00
hwl.h	add hardware loop CSR access	2022-03-25 11:33:44 +01:00
riscv_hart_common.h	add debug feature to platform	2021-11-02 11:13:29 +01:00
riscv_hart_m_p.h	add hardware loop CSR access	2022-03-25 11:33:44 +01:00
riscv_hart_msu_vp.h	add hardware loop CSR access	2022-03-25 11:33:44 +01:00
riscv_hart_mu_p.h	add hardware loop CSR access	2022-03-25 11:33:44 +01:00
tgc_c.h	fix compiler warning for reduced number of registers	2022-03-14 15:38:05 +01:00
tgc_mapper.h	add TGC_X with DMR	2022-03-26 10:48:21 +01:00