fix handling of exceptions while accessing address spaces

CMakeLists.txt

@@ -49,8 +49,8 @@ endif()
 # Define the library
 add_library(${PROJECT_NAME} SHARED ${LIB_SOURCES})
 # list code gen dependencies
-if(TARGET ${CORE_NAME}_src)
+if(TARGET ${CORE_NAME}_cpp)
-    add_dependencies(${PROJECT_NAME} ${CORE_NAME}_src)
+    add_dependencies(${PROJECT_NAME} ${CORE_NAME}_cpp)
 endif()
 
 target_compile_options(${PROJECT_NAME} PRIVATE -Wno-shift-count-overflow)
@@ -67,6 +67,7 @@ set_target_properties(${PROJECT_NAME} PROPERTIES
 if(SystemC_FOUND)
 	add_library(${PROJECT_NAME}_sc src/sysc/core_complex.cpp)
 	target_compile_definitions(${PROJECT_NAME}_sc PUBLIC WITH_SYSTEMC)
+    target_compile_definitions(${PROJECT_NAME} PRIVATE CORE_${CORE_NAME})
     if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/incl/iss/arch/tgc_b.h)
         target_compile_definitions(${PROJECT_NAME}_sc PRIVATE CORE_TGC_B)
     endif()

gen_input/templates/interp/CORENAME.cpp.gtl

@@ -155,14 +155,42 @@ protected:
 
     template<typename T>
     T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;}
-    inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint8_t>(space, addr);}
+    inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){
-    inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint16_t>(space, addr);}
+        auto ret = super::template read_mem<uint8_t>(space, addr);
-    inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint32_t>(space, addr);}
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
-    inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint64_t>(space, addr);}
+        return ret;
-    inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){super::write_mem(space, addr, data);}
+    }
-    inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){super::write_mem(space, addr, data);}
+    inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){
-    inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){super::write_mem(space, addr, data);}
+        auto ret = super::template read_mem<uint16_t>(space, addr);
-    inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){super::write_mem(space, addr, data);}
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+        return ret;
+    }
+    inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){
+        auto ret = super::template read_mem<uint32_t>(space, addr);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+        return ret;
+    }
+    inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){
+        auto ret = super::template read_mem<uint64_t>(space, addr);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+        return ret;
+    }
+    inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){
+        super::write_mem(space, addr, data);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+    }
+    inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){
+        super::write_mem(space, addr, data);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+    }
+    inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){
+        super::write_mem(space, addr, data);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+    }
+    inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){
+        super::write_mem(space, addr, data);
+        if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
+    }
     template<unsigned W, typename U, typename S = typename std::make_signed<U>::type>
     inline S sext(U from) {
         auto mask = (1ULL<<W) - 1;
@@ -208,8 +236,10 @@ private:
         <%}}%>// calculate next pc value
         *NEXT_PC = *PC + ${instr.length/8};
         // execute instruction
+        try {
         <%instr.behavior.eachLine{%>${it}
-        <%}%>// post execution stuff
+        <%}%>} catch(...){}
+        // post execution stuff
         if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, ${idx});
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         // trap check
@@ -228,7 +258,7 @@ private:
         uint32_t* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
         uint32_t* NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
         *NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2);
-        raise(0,  11);
+        raise(0,  2);
         // post execution stuff
         if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast<unsigned>(arch::traits<ARCH>::opcode_e::MAX_OPCODE));
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);

incl/iss/arch/tgc_c.h

@@ -125,56 +125,54 @@ template <> struct traits<tgc_c> {
         OR = 35,
         AND = 36,
         FENCE = 37,
-        FENCE_I = 38,
+        ECALL = 38,
-        ECALL = 39,
+        EBREAK = 39,
-        EBREAK = 40,
+        URET = 40,
-        URET = 41,
+        SRET = 41,
-        SRET = 42,
+        MRET = 42,
-        MRET = 43,
+        WFI = 43,
-        WFI = 44,
+        CSRRW = 44,
-        SFENCE_VMA = 45,
+        CSRRS = 45,
-        CSRRW = 46,
+        CSRRC = 46,
-        CSRRS = 47,
+        CSRRWI = 47,
-        CSRRC = 48,
+        CSRRSI = 48,
-        CSRRWI = 49,
+        CSRRCI = 49,
-        CSRRSI = 50,
+        MUL = 50,
-        CSRRCI = 51,
+        MULH = 51,
-        MUL = 52,
+        MULHSU = 52,
-        MULH = 53,
+        MULHU = 53,
-        MULHSU = 54,
+        DIV = 54,
-        MULHU = 55,
+        DIVU = 55,
-        DIV = 56,
+        REM = 56,
-        DIVU = 57,
+        REMU = 57,
-        REM = 58,
+        CADDI4SPN = 58,
-        REMU = 59,
+        CLW = 59,
-        CADDI4SPN = 60,
+        CSW = 60,
-        CLW = 61,
+        CADDI = 61,
-        CSW = 62,
+        CNOP = 62,
-        CADDI = 63,
+        CJAL = 63,
-        CNOP = 64,
+        CLI = 64,
-        CJAL = 65,
+        CLUI = 65,
-        CLI = 66,
+        CADDI16SP = 66,
-        CLUI = 67,
+        CSRLI = 67,
-        CADDI16SP = 68,
+        CSRAI = 68,
-        CSRLI = 69,
+        CANDI = 69,
-        CSRAI = 70,
+        CSUB = 70,
-        CANDI = 71,
+        CXOR = 71,
-        CSUB = 72,
+        COR = 72,
-        CXOR = 73,
+        CAND = 73,
-        COR = 74,
+        CJ = 74,
-        CAND = 75,
+        CBEQZ = 75,
-        CJ = 76,
+        CBNEZ = 76,
-        CBEQZ = 77,
+        CSLLI = 77,
-        CBNEZ = 78,
+        CLWSP = 78,
-        CSLLI = 79,
+        CMV = 79,
-        CLWSP = 80,
+        CJR = 80,
-        CMV = 81,
+        CADD = 81,
-        CJR = 82,
+        CJALR = 82,
-        CADD = 83,
+        CEBREAK = 83,
-        CJALR = 84,
+        CSWSP = 84,
-        CEBREAK = 85,
+        DII = 85,
-        CSWSP = 86,
-        DII = 87,
         MAX_OPCODE
     };
 };