cleans up source code to remove clang compiler warnings
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3563ba80d0
commit
ecc6091d1e
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@ -233,11 +233,11 @@ protected:
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*/
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const std::string core_type_name() const override { return traits<BASE>::core_type; }
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virtual uint64_t get_pc() { return arch.get_pc(); };
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uint64_t get_pc() override { return arch.get_pc(); };
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virtual uint64_t get_next_pc() { return arch.get_next_pc(); };
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uint64_t get_next_pc() override { return arch.get_next_pc(); };
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virtual void set_curr_instr_cycles(unsigned cycles) { arch.cycle_offset += cycles - 1; };
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void set_curr_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; };
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riscv_hart_m_p<BASE, FEAT> &arch;
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};
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@ -293,16 +293,16 @@ public:
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std::pair<uint64_t, bool> load_file(std::string name, int type = -1) override;
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virtual phys_addr_t virt2phys(const iss::addr_t &addr) override;
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phys_addr_t virt2phys(const iss::addr_t &addr) override;
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iss::status read(const address_type type, const access_type access, const uint32_t space,
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const uint64_t addr, const unsigned length, uint8_t *const data) override;
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iss::status write(const address_type type, const access_type access, const uint32_t space,
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const uint64_t addr, const unsigned length, const uint8_t *const data) override;
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virtual uint64_t enter_trap(uint64_t flags) override { return riscv_hart_msu_vp::enter_trap(flags, fault_data, fault_data); }
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virtual uint64_t enter_trap(uint64_t flags, uint64_t addr, uint64_t instr) override;
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virtual uint64_t leave_trap(uint64_t flags) override;
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uint64_t enter_trap(uint64_t flags) override { return riscv_hart_msu_vp::enter_trap(flags, fault_data, fault_data); }
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uint64_t enter_trap(uint64_t flags, uint64_t addr, uint64_t instr) override;
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uint64_t leave_trap(uint64_t flags) override;
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void wait_until(uint64_t flags) override;
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void disass_output(uint64_t pc, const std::string instr) override {
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@ -207,9 +207,9 @@ public:
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iss::status write(const address_type type, const access_type access, const uint32_t space,
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const uint64_t addr, const unsigned length, const uint8_t *const data) override;
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virtual uint64_t enter_trap(uint64_t flags) override { return riscv_hart_mu_p::enter_trap(flags, fault_data, fault_data); }
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virtual uint64_t enter_trap(uint64_t flags, uint64_t addr, uint64_t instr) override;
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virtual uint64_t leave_trap(uint64_t flags) override;
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uint64_t enter_trap(uint64_t flags) override { return riscv_hart_mu_p::enter_trap(flags, fault_data, fault_data); }
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uint64_t enter_trap(uint64_t flags, uint64_t addr, uint64_t instr) override;
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uint64_t leave_trap(uint64_t flags) override;
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const reg_t& get_mhartid() const { return mhartid_reg; }
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void set_mhartid(reg_t mhartid) { mhartid_reg = mhartid; };
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@ -568,11 +568,12 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if(*(X+rs1) == *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if(*(X+rs1) == *(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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} catch(...){}
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// post execution stuff
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@ -614,12 +615,14 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if(*(X+rs1) != *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if(*(X+rs1) != *(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);}
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} catch(...){}
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// post execution stuff
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if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 5);
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@ -660,11 +663,13 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if((int32_t)*(X+rs1) < (int32_t)*(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if((int32_t)*(X+rs1) < (int32_t)*(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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} catch(...){}
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// post execution stuff
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@ -706,11 +711,13 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if((int32_t)*(X+rs1) >= (int32_t)*(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if((int32_t)*(X+rs1) >= (int32_t)*(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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} catch(...){}
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// post execution stuff
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@ -752,11 +759,13 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if(*(X+rs1) < *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if(*(X+rs1) < *(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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} catch(...){}
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// post execution stuff
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@ -798,11 +807,13 @@ private:
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*NEXT_PC = *PC + 4;
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// execute instruction
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try {
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{
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if(*(X+rs1) >= *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) {
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if(*(X+rs1) >= *(X+rs2)){
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if(imm % traits::INSTR_ALIGNMENT) {
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raise(0, 0);
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}
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else pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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else{
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pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm);
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}
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} catch(...){}
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// post execution stuff
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