DBT-RISE/DBT-RISE-TGC
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fix templates to comply with CoreDSL2

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eyck committed 2021-03-01 21:07:20 +00:00
1 parent 4aa26b85a0
commit be0e7db185
7 files changed
+277 -269
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gen_input/TGFS.core_desc
+4 -4
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@@ -7,8 +7,8 @@ Core TGF_B provides RV32I {
unsigned XLEN=32;
unsigned PCLEN=32;
// definitions for the architecture wrapper
// XL ZYXWVUTSRQPONMLKJIHGFEDCBA
unsigned MISA_VAL=0b01000000000000000000000100000000;
// XL ZYXWVUTSRQPONMLKJIHGFEDCBA
unsigned MISA_VAL = 0b01000000000000000000000100000000;
unsigned PGSIZE = 0x1000; //1 << 12;
unsigned PGMASK = 0xfff; //PGSIZE-1
}
@@ -19,8 +19,8 @@ Core TGF_C provides RV32I, RV32M, RV32IC {
unsigned XLEN=32;
unsigned PCLEN=32;
// definitions for the architecture wrapper
// XL ZYXWVUTSRQPONMLKJIHGFEDCBA
unsigned MISA_VAL=0b01000000000000000001000100000100;
// XL ZYXWVUTSRQPONMLKJIHGFEDCBA
unsigned MISA_VAL = 0b01000000000000000001000100000100;
unsigned PGSIZE = 0x1000; //1 << 12;
unsigned PGMASK = 0xfff; //PGSIZE-1
}