cleans up bsp read and write for ISS

CMakeLists.txt

@@ -5,8 +5,12 @@ if(NOT DEFINED BOARD)
 message(FATAL_ERROR "No Board selected")
 endif()
 add_compile_definitions("BOARD_${BOARD}")
-# check if we are building for a testbench, adjust the Base accordingly
-set(BOARD_BASE ${BOARD})
+
+set(TESTBENCHES "rtl" "TGCP")
+list(FIND TESTBENCHES ${BOARD} _index)
+if(NOT _index EQUAL -1)
+    set(BOARD "testbench/${BOARD}")
+endif()
 
 option(SEMIHOSTING "Enable semihosting support" OFF)
 if(SEMIHOSTING)
@@ -18,10 +22,10 @@ target_include_directories(startup PUBLIC env include)
 
 add_subdirectory(libwrap)
 
-add_library(bsp STATIC env/${BOARD_BASE}/init.c)
+add_library(bsp STATIC env/${BOARD}/init.c)
 target_link_libraries(bsp PUBLIC startup wrap)
-target_include_directories(bsp PUBLIC env/${BOARD_BASE})
-target_link_options(bsp INTERFACE LINKER:--no-warn-rwx-segments -nostartfiles -T ${CMAKE_CURRENT_SOURCE_DIR}/env/${BOARD_BASE}/link.lds)
+target_include_directories(bsp PUBLIC env/${BOARD})
+target_link_options(bsp INTERFACE LINKER:--no-warn-rwx-segments -nostartfiles -T ${CMAKE_CURRENT_SOURCE_DIR}/env/${BOARD}/link.lds)
 
 if(SEMIHOSTING)
     target_include_directories(bsp INTERFACE include)

cmake/rv32imc.cmake

@@ -52,7 +52,7 @@ set( CMAKE_OBJCOPY      ${RISCV_TOOLCHAIN_BIN_PATH}/${CROSS_COMPILE}objcopy
 set( CMAKE_OBJDUMP      ${RISCV_TOOLCHAIN_BIN_PATH}/${CROSS_COMPILE}objdump
      CACHE FILEPATH "The toolchain objdump command " FORCE )
 
-set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=${RISCV_ARCH} -mabi=${RISCV_ABI}" )
+set( CMAKE_C_FLAGS "-march=${RISCV_ARCH} -mabi=${RISCV_ABI} -mcmodel=medany" )
 
 set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
 set( CMAKE_CXX_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )

cmake/rv64gc.cmake

@@ -0,0 +1,59 @@
+# Look for GCC in path
+# https://xpack.github.io/riscv-none-embed-gcc/
+FIND_FILE( RISCV_XPACK_GCC_COMPILER_EXE "riscv-none-embed-gcc.exe" PATHS ENV INCLUDE)
+FIND_FILE( RISCV_XPACK_GCC_COMPILER "riscv-none-embed-gcc" PATHS ENV INCLUDE)
+# New versions of xpack
+FIND_FILE( RISCV_XPACK_NEW_GCC_COMPILER_EXE "riscv-none-elf-gcc.exe" PATHS ENV INCLUDE)
+FIND_FILE( RISCV_XPACK_NEW_GCC_COMPILER "riscv-none-elf-gcc" PATHS ENV INCLUDE)
+# Look for RISC-V github GCC
+# https://github.com/riscv/riscv-gnu-toolchain
+FIND_FILE( RISCV_XPACK_GCC_COMPILER_EXT "riscv64-unknown-elf-gcc.exe" PATHS ENV INCLUDE)
+FIND_FILE( RISCV_XPACK_GCC_COMPILER "riscv64-unknown-elf-gcc" PATHS ENV INCLUDE)
+
+# Select which is found
+if (EXISTS ${RISCV_XPACK_NEW_GCC_COMPILER})
+set( RISCV_GCC_COMPILER ${RISCV_XPACK_NEW_GCC_COMPILER})
+elseif (EXISTS ${RISCV_XPACK_GCC_NEW_COMPILER_EXE})
+set( RISCV_GCC_COMPILER ${RISCV_XPACK_NEW_GCC_COMPILER_EXE})
+elseif (EXISTS ${RISCV_XPACK_GCC_COMPILER})
+set( RISCV_GCC_COMPILER ${RISCV_XPACK_GCC_COMPILER})
+elseif (EXISTS ${RISCV_XPACK_GCC_COMPILER_EXE})
+set( RISCV_GCC_COMPILER ${RISCV_XPACK_GCC_COMPILER_EXE})
+elseif (EXISTS ${RISCV_GITHUB_GCC_COMPILER})
+set( RISCV_GCC_COMPILER ${RISCV_GITHUB_GCC_COMPILER})
+elseif (EXISTS ${RISCV_GITHUB_GCC_COMPILER_EXE})
+set( RISCV_GCC_COMPILER ${RISCV_GITHUB_GCC_COMPILER_EXE})
+else()
+message(FATAL_ERROR "RISC-V GCC not found. ${RISCV_GITHUB_GCC_COMPILER} ${RISCV_XPACK_GCC_COMPILER} ${RISCV_GITHUB_GCC_COMPILER_EXE} ${RISCV_XPACK_GCC_COMPILER_EXE}")
+endif()
+
+get_filename_component(RISCV_TOOLCHAIN_BIN_PATH ${RISCV_GCC_COMPILER} DIRECTORY)
+get_filename_component(RISCV_TOOLCHAIN_BIN_GCC ${RISCV_GCC_COMPILER} NAME_WE)
+get_filename_component(RISCV_TOOLCHAIN_BIN_EXT ${RISCV_GCC_COMPILER} EXT)
+
+STRING(REGEX REPLACE "\-gcc" "-" CROSS_COMPILE ${RISCV_TOOLCHAIN_BIN_GCC})
+
+# The Generic system name is used for embedded targets (targets without OS)
+set(CMAKE_SYSTEM_NAME Generic )
+set(CMAKE_EXECUTABLE_SUFFIX_C ".elf")
+set(RISCV_ARCH rv64gc )
+set(RISCV_ABI lp64d)
+
+
+set(CMAKE_ASM_COMPILER {CROSS_COMPILE}gcc )
+set(CMAKE_AR ${CROSS_COMPILE}ar)
+set(CMAKE_ASM_COMPILER ${CROSS_COMPILE}gcc)
+set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
+set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
+
+set( CMAKE_OBJCOPY      ${RISCV_TOOLCHAIN_BIN_PATH}/${CROSS_COMPILE}objcopy
+     CACHE FILEPATH "The toolchain objcopy command " FORCE )
+
+set( CMAKE_OBJDUMP      ${RISCV_TOOLCHAIN_BIN_PATH}/${CROSS_COMPILE}objdump
+     CACHE FILEPATH "The toolchain objdump command " FORCE )
+
+set( CMAKE_C_FLAGS "-march=${RISCV_ARCH} -mabi=${RISCV_ABI} -mcmodel=medany" )
+
+set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
+set( CMAKE_CXX_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
+set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )

env/iss/CMakeLists.txt

@@ -1,30 +0,0 @@
-#cmake_minimum_required(VERSION 3.12)
-project(iss)
-message(STATUS " here in iss")
-
-# Create library for ISS board support
-add_library(board_iss STATIC
-    init.c
-    write.c
-)
-
-# Include directories
-target_include_directories(board_iss PUBLIC
-    ${BSP_BASE}/include
-    ${BSP_BASE}/env
-    ${CMAKE_CURRENT_SOURCE_DIR}
-)
-
-# Set compile options
-target_compile_options(board_iss PRIVATE
-    -march=${RISCV_ARCH}_zicsr_zifencei
-    -mabi=${RISCV_ABI}
-    -mcmodel=medany
-    -ffunction-sections
-    -fdata-sections
-)
-
-# Add compile definitions
-target_compile_definitions(board_iss PRIVATE
-    BOARD_${BOARD}
-)

env/iss/bsp_read.c

@@ -3,17 +3,4 @@
 #include <sys/types.h>
 #include <unistd.h>
 
-ssize_t _bsp_read(int fd, void *ptr, size_t len) {
-  uint8_t *current = (uint8_t *)ptr;
-  volatile uint32_t *uart_rx = (uint32_t *)0xFFFF0000;
-  ssize_t result = 0;
-  if (isatty(fd)) {
-    for (current = (uint8_t *)ptr; (current < ((uint8_t *)ptr) + len);
-         current++) {
-      *current = *uart_rx;
-      result++;
-    }
-    return result;
-  }
-  return EOF;
-}
+ssize_t _bsp_read(int fd, void *ptr, size_t len) { return EOF; }

env/iss/bsp_write.c

@@ -7,30 +7,17 @@
 
 #include <string.h>
 
-extern volatile uint32_t tohost;
+extern volatile uint64_t tohost;
 
 ssize_t _bsp_write(int fd, const void *ptr, size_t len) {
 
-  // char string[] = "hello world in bsp_write";
-  // uint32_t payload_1[4] = {64, 0, (uintptr_t)string, strlen(string)};
-  // tohost = (uint32_t)payload_1;
-
-  // const uint32_t *current = (const uint32_t *)ptr;
-
   if (isatty(fd)) {
-    // uint32_t payload[4] = {64, 0, (uint32_t)((uint32_t *)ptr), len};
-    // tohost = (uint32_t)payload;
-
-    uint64_t payload[4] = {64, 0, (uintptr_t)((uint32_t *)ptr), len};
-    tohost = (uint32_t)payload;
-
-    /*
-    // accoring to my understading this part is used fot uart wrrite for later
-        for (size_t jj = 0; jj < len; jj++) {
-    *((uint32_t *)0xFFFF0000) = current[jj];
-  }
-    */
-
+    volatile uint64_t payload[8];
+    memset((void *)payload, 0, 8 * sizeof(uint64_t));
+    payload[0] = 64;
+    payload[2] = (uintptr_t)ptr;
+    payload[3] = len;
+    tohost = (uintptr_t)payload;
     return len;
   }
 

env/iss/link.lds

@@ -178,7 +178,7 @@ SECTIONS
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
 
-  PROVIDE( tohost = 0xfffffff0 );
-  PROVIDE( fromhost = 0xfffffff8 );
+  PROVIDE( tohost = . );
+  PROVIDE( fromhost = . + 8 );
 }
 

env/iss/platform.h

@@ -22,6 +22,9 @@
 
 #include <stdint.h>
 
+extern volatile uintptr_t tohost;
+extern volatile uintptr_t fromhost;
+
 void init_pll(void);
 unsigned long get_cpu_freq(void);
 unsigned long get_timer_freq(void);

env/moonlight/bsp_read.c

@@ -0,0 +1,21 @@
+#include "platform.h"
+#include <stdint.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+ssize_t _bsp_read(int fd, void *ptr, size_t len) {
+  uint8_t *current = (uint8_t *)ptr;
+  ssize_t result = 0;
+  if (isatty(fd)) {
+    for (current = (uint8_t *)ptr; (current < ((uint8_t *)ptr) + len) &&
+                                   (get_uart_rx_tx_reg_rx_avail(uart) > 0);
+         current++) {
+      *current = uart_read(uart);
+      result++;
+    }
+
+    return result;
+  }
+  return EOF;
+}

env/moonlight/bsp_write.c

@@ -0,0 +1,21 @@
+/* See LICENSE of license details. */
+
+#include "platform.h"
+#include <errno.h>
+#include <stdint.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+ssize_t _bsp_write(int fd, const void *ptr, size_t len) {
+  const uint8_t *current = (const uint8_t *)ptr;
+  if (isatty(fd)) {
+    for (size_t jj = 0; jj < len; jj++) {
+      uart_write(uart, current[jj]);
+      if (current[jj] == '\n') {
+        uart_write(uart, '\r');
+      }
+    }
+    return len;
+  }
+  return 1;
+}

env/moonlight/link.lds

@@ -171,6 +171,8 @@ SECTIONS
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
 
-  PROVIDE( tohost = 0xfffffff0 );
-  PROVIDE( fromhost = 0xfffffff8 );
+
+  
+  PROVIDE( tohost = . );
+  PROVIDE( fromhost = . + 8 );
 }

env/moonlight/platform.h

@@ -4,40 +4,39 @@
 #define _ISS_PLATFORM_H
 
 #if __riscv_xlen == 32
-#define MCAUSE_INT         0x80000000UL
-#define MCAUSE_CAUSE       0x000003FFUL
+#define MCAUSE_INT 0x80000000UL
+#define MCAUSE_CAUSE 0x000003FFUL
 #else
-#define MCAUSE_INT         0x8000000000000000UL
-#define MCAUSE_CAUSE       0x00000000000003FFUL
+#define MCAUSE_INT 0x8000000000000000UL
+#define MCAUSE_CAUSE 0x00000000000003FFUL
 #endif
 
 #define APB_BUS
 
-#include "ehrenberg/devices/gpio.h"
-#include "ehrenberg/devices/uart.h"
-#include "ehrenberg/devices/timer.h"
-#include "ehrenberg/devices/aclint.h"
-#include "ehrenberg/devices/qspi.h"
-#include "ehrenberg/devices/i2s.h"
-#include "ehrenberg/devices/camera.h"
-#include "ehrenberg/devices/dma.h"
-#include "ehrenberg/devices/msg_if.h"
+#include "minres/devices/aclint.h"
+#include "minres/devices/camera.h"
+#include "minres/devices/dma.h"
+#include "minres/devices/gpio.h"
+#include "minres/devices/i2s.h"
+#include "minres/devices/msg_if.h"
+#include "minres/devices/qspi.h"
+#include "minres/devices/timer.h"
+#include "minres/devices/uart.h"
 
-#define PERIPH(TYPE, ADDR) ((volatile TYPE*) (ADDR))
+#define PERIPH(TYPE, ADDR) ((volatile TYPE *)(ADDR))
 
 #define APB_BASE 0xF0000000
 
-#define gpio        PERIPH(gpio_t,         APB_BASE+0x0000)
-#define uart        PERIPH(uart_t,         APB_BASE+0x1000)
-#define timer       PERIPH(timercounter_t, APB_BASE+0x20000)
-#define aclint      PERIPH(aclint_t,       APB_BASE+0x30000)
-#define irq         PERIPH(irq_t,          APB_BASE+0x40000)
-#define qspi        PERIPH(qspi_t,         APB_BASE+0x50000)
-#define i2s         PERIPH(i2s_t,          APB_BASE+0x90000)
-#define camera      PERIPH(camera_t,       APB_BASE+0xA0000)
-#define dma         PERIPH(dma_t,          APB_BASE+0xB0000)
-#define msgif       PERIPH(msgif_t,        APB_BASE+0xC0000)
-
+#define gpio PERIPH(gpio_t, APB_BASE + 0x0000)
+#define uart PERIPH(uart_t, APB_BASE + 0x1000)
+#define timer PERIPH(timercounter_t, APB_BASE + 0x20000)
+#define aclint PERIPH(aclint_t, APB_BASE + 0x30000)
+#define irq PERIPH(irq_t, APB_BASE + 0x40000)
+#define qspi PERIPH(qspi_t, APB_BASE + 0x50000)
+#define i2s PERIPH(i2s_t, APB_BASE + 0x90000)
+#define camera PERIPH(camera_t, APB_BASE + 0xA0000)
+#define dma PERIPH(dma_t, APB_BASE + 0xB0000)
+#define msgif PERIPH(msgif_t, APB_BASE + 0xC0000)
 
 #define XIP_START_LOC 0xE0040000
 #define RAM_START_LOC 0x80000000

env/testbench/rtl/bsp_read.c

@@ -0,0 +1,19 @@
+#include <stdint.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+ssize_t _bsp_read(int fd, void *ptr, size_t len) {
+  uint8_t *current = (uint8_t *)ptr;
+  volatile uint32_t *uart_rx = (uint32_t *)0xFFFF0000;
+  ssize_t result = 0;
+  if (isatty(fd)) {
+    for (current = (uint8_t *)ptr; (current < ((uint8_t *)ptr) + len);
+         current++) {
+      *current = *uart_rx;
+      result++;
+    }
+    return result;
+  }
+  return EOF;
+}

env/testbench/rtl/bsp_write.c

@@ -0,0 +1,18 @@
+/* See LICENSE of license details. */
+
+#include <errno.h>
+#include <stdint.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+ssize_t _bsp_write(int fd, const void *ptr, size_t len) {
+  const uint8_t *current = (const uint8_t *)ptr;
+  if (isatty(fd)) {
+    for (size_t jj = 0; jj < len; jj++) {
+      *((uint32_t *)0xFFFF0000) = current[jj];
+    }
+    return len;
+  }
+
+  return 1;
+}

include/minres/devices/gen/aclint.h

@@ -43,48 +43,48 @@ typedef struct {
 #define ACLINT_MTIME_HI(V) ((V & ACLINT_MTIME_HI_MASK) << ACLINT_MTIME_HI_OFFS)
 
 //ACLINT_MSIP0
-inline uint32_t get_aclint_msip0(volatile aclint_t* reg){
+static inline uint32_t get_aclint_msip0(volatile aclint_t* reg){
      return reg->MSIP0;
 }
-inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value){
+static inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value){
      reg->MSIP0 = value;
 }
-inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg){
+static inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg){
     return (reg->MSIP0 >> 0) & 0x1;
 }
-inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value){
+static inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value){
     reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0);
 }
 
 //ACLINT_MTIMECMP0LO
-inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg){
+static inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg){
     return (reg->MTIMECMP0LO >> 0) & 0xffffffff;
 }
-inline void set_aclint_mtimecmp0lo(volatile aclint_t* reg, uint32_t value){
+static inline void set_aclint_mtimecmp0lo(volatile aclint_t* reg, uint32_t value){
     reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //ACLINT_MTIMECMP0HI
-inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg){
+static inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg){
     return (reg->MTIMECMP0HI >> 0) & 0xffffffff;
 }
-inline void set_aclint_mtimecmp0hi(volatile aclint_t* reg, uint32_t value){
+static inline void set_aclint_mtimecmp0hi(volatile aclint_t* reg, uint32_t value){
     reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //ACLINT_MTIME_LO
-inline uint32_t get_aclint_mtime_lo(volatile aclint_t* reg){
+static inline uint32_t get_aclint_mtime_lo(volatile aclint_t* reg){
     return (reg->MTIME_LO >> 0) & 0xffffffff;
 }
-inline void set_aclint_mtime_lo(volatile aclint_t* reg, uint32_t value){
+static inline void set_aclint_mtime_lo(volatile aclint_t* reg, uint32_t value){
     reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //ACLINT_MTIME_HI
-inline uint32_t get_aclint_mtime_hi(volatile aclint_t* reg){
+static inline uint32_t get_aclint_mtime_hi(volatile aclint_t* reg){
     return (reg->MTIME_HI >> 0) & 0xffffffff;
 }
-inline void set_aclint_mtime_hi(volatile aclint_t* reg, uint32_t value){
+static inline void set_aclint_mtime_hi(volatile aclint_t* reg, uint32_t value){
     reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0);
 }
 

include/minres/devices/gen/apb3spi.h

@@ -158,266 +158,266 @@ typedef struct {
 #define APB3SPI_XIP_READ(V) ((V & APB3SPI_XIP_READ_MASK) << APB3SPI_XIP_READ_OFFS)
 
 //APB3SPI_DATA
-inline uint32_t get_apb3spi_data(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_data(volatile apb3spi_t* reg){
      return reg->DATA;
 }
-inline void set_apb3spi_data(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_data(volatile apb3spi_t* reg, uint32_t value){
      reg->DATA = value;
 }
-inline void set_apb3spi_data_data(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_data_data(volatile apb3spi_t* reg, uint8_t value){
     reg->DATA = (reg->DATA & ~(0xffU << 0)) | (value << 0);
 }
-inline uint32_t get_apb3spi_data_write(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_data_write(volatile apb3spi_t* reg){
     return (reg->DATA >> 8) & 0x1;
 }
-inline void set_apb3spi_data_write(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_data_write(volatile apb3spi_t* reg, uint8_t value){
     reg->DATA = (reg->DATA & ~(0x1U << 8)) | (value << 8);
 }
-inline uint32_t get_apb3spi_data_read(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_data_read(volatile apb3spi_t* reg){
     return (reg->DATA >> 9) & 0x1;
 }
-inline void set_apb3spi_data_read(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_data_read(volatile apb3spi_t* reg, uint8_t value){
     reg->DATA = (reg->DATA & ~(0x1U << 9)) | (value << 9);
 }
-inline uint32_t get_apb3spi_data_kind(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_data_kind(volatile apb3spi_t* reg){
     return (reg->DATA >> 11) & 0x1;
 }
-inline void set_apb3spi_data_kind(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_data_kind(volatile apb3spi_t* reg, uint8_t value){
     reg->DATA = (reg->DATA & ~(0x1U << 11)) | (value << 11);
 }
-inline uint32_t get_apb3spi_data_rx_data_invalid(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_data_rx_data_invalid(volatile apb3spi_t* reg){
     return (reg->DATA >> 31) & 0x1;
 }
 
 //APB3SPI_STATUS
-inline uint32_t get_apb3spi_status(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_status(volatile apb3spi_t* reg){
      return reg->STATUS;
 }
-inline uint32_t get_apb3spi_status_tx_free(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_status_tx_free(volatile apb3spi_t* reg){
     return (reg->STATUS >> 0) & 0x3f;
 }
-inline uint32_t get_apb3spi_status_rx_avail(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_status_rx_avail(volatile apb3spi_t* reg){
     return (reg->STATUS >> 16) & 0x3f;
 }
 
 //APB3SPI_CONFIG
-inline uint32_t get_apb3spi_config(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_config(volatile apb3spi_t* reg){
      return reg->CONFIG;
 }
-inline void set_apb3spi_config(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_config(volatile apb3spi_t* reg, uint32_t value){
      reg->CONFIG = value;
 }
-inline uint32_t get_apb3spi_config_kind(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_config_kind(volatile apb3spi_t* reg){
     return (reg->CONFIG >> 0) & 0x3;
 }
-inline void set_apb3spi_config_kind(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_config_kind(volatile apb3spi_t* reg, uint8_t value){
     reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0);
 }
-inline uint32_t get_apb3spi_config_mode(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_config_mode(volatile apb3spi_t* reg){
     return (reg->CONFIG >> 4) & 0x3;
 }
-inline void set_apb3spi_config_mode(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_config_mode(volatile apb3spi_t* reg, uint8_t value){
     reg->CONFIG = (reg->CONFIG & ~(0x3U << 4)) | (value << 4);
 }
 
 //APB3SPI_INTR
-inline uint32_t get_apb3spi_intr(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr(volatile apb3spi_t* reg){
      return reg->INTR;
 }
-inline void set_apb3spi_intr(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_intr(volatile apb3spi_t* reg, uint32_t value){
      reg->INTR = value;
 }
-inline uint32_t get_apb3spi_intr_tx_ie(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr_tx_ie(volatile apb3spi_t* reg){
     return (reg->INTR >> 0) & 0x1;
 }
-inline void set_apb3spi_intr_tx_ie(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_intr_tx_ie(volatile apb3spi_t* reg, uint8_t value){
     reg->INTR = (reg->INTR & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_apb3spi_intr_rx_ie(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr_rx_ie(volatile apb3spi_t* reg){
     return (reg->INTR >> 1) & 0x1;
 }
-inline void set_apb3spi_intr_rx_ie(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_intr_rx_ie(volatile apb3spi_t* reg, uint8_t value){
     reg->INTR = (reg->INTR & ~(0x1U << 1)) | (value << 1);
 }
-inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){
     return (reg->INTR >> 8) & 0x1;
 }
-inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){
     return (reg->INTR >> 9) & 0x1;
 }
-inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){
     return (reg->INTR >> 16) & 0x1;
 }
 
 //APB3SPI_SCLK_CONFIG
-inline uint32_t get_apb3spi_sclk_config(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_sclk_config(volatile apb3spi_t* reg){
      return reg->SCLK_CONFIG;
 }
-inline void set_apb3spi_sclk_config(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_sclk_config(volatile apb3spi_t* reg, uint32_t value){
      reg->SCLK_CONFIG = value;
 }
-inline uint32_t get_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg){
     return (reg->SCLK_CONFIG >> 0) & 0xfff;
 }
-inline void set_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg, uint16_t value){
+static inline void set_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg, uint16_t value){
     reg->SCLK_CONFIG = (reg->SCLK_CONFIG & ~(0xfffU << 0)) | (value << 0);
 }
 
 //APB3SPI_SSGEN_SETUP
-inline uint32_t get_apb3spi_ssgen_setup(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_setup(volatile apb3spi_t* reg){
      return reg->SSGEN_SETUP;
 }
-inline void set_apb3spi_ssgen_setup(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_ssgen_setup(volatile apb3spi_t* reg, uint32_t value){
      reg->SSGEN_SETUP = value;
 }
-inline uint32_t get_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg){
     return (reg->SSGEN_SETUP >> 0) & 0xfff;
 }
-inline void set_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg, uint16_t value){
+static inline void set_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg, uint16_t value){
     reg->SSGEN_SETUP = (reg->SSGEN_SETUP & ~(0xfffU << 0)) | (value << 0);
 }
 
 //APB3SPI_SSGEN_HOLD
-inline uint32_t get_apb3spi_ssgen_hold(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_hold(volatile apb3spi_t* reg){
      return reg->SSGEN_HOLD;
 }
-inline void set_apb3spi_ssgen_hold(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_ssgen_hold(volatile apb3spi_t* reg, uint32_t value){
      reg->SSGEN_HOLD = value;
 }
-inline uint32_t get_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg){
     return (reg->SSGEN_HOLD >> 0) & 0xfff;
 }
-inline void set_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg, uint16_t value){
+static inline void set_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg, uint16_t value){
     reg->SSGEN_HOLD = (reg->SSGEN_HOLD & ~(0xfffU << 0)) | (value << 0);
 }
 
 //APB3SPI_SSGEN_DISABLE
-inline uint32_t get_apb3spi_ssgen_disable(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_disable(volatile apb3spi_t* reg){
      return reg->SSGEN_DISABLE;
 }
-inline void set_apb3spi_ssgen_disable(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_ssgen_disable(volatile apb3spi_t* reg, uint32_t value){
      reg->SSGEN_DISABLE = value;
 }
-inline uint32_t get_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg){
     return (reg->SSGEN_DISABLE >> 0) & 0xfff;
 }
-inline void set_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg, uint16_t value){
+static inline void set_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg, uint16_t value){
     reg->SSGEN_DISABLE = (reg->SSGEN_DISABLE & ~(0xfffU << 0)) | (value << 0);
 }
 
 //APB3SPI_SSGEN_ACTIVE_HIGH
-inline uint32_t get_apb3spi_ssgen_active_high(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_active_high(volatile apb3spi_t* reg){
      return reg->SSGEN_ACTIVE_HIGH;
 }
-inline void set_apb3spi_ssgen_active_high(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_ssgen_active_high(volatile apb3spi_t* reg, uint32_t value){
      reg->SSGEN_ACTIVE_HIGH = value;
 }
-inline uint32_t get_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg){
     return (reg->SSGEN_ACTIVE_HIGH >> 0) & 0x1;
 }
-inline void set_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg, uint8_t value){
     reg->SSGEN_ACTIVE_HIGH = (reg->SSGEN_ACTIVE_HIGH & ~(0x1U << 0)) | (value << 0);
 }
 
 //APB3SPI_XIP_ENABLE
-inline uint32_t get_apb3spi_xip_enable(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_enable(volatile apb3spi_t* reg){
      return reg->XIP_ENABLE;
 }
-inline void set_apb3spi_xip_enable(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_xip_enable(volatile apb3spi_t* reg, uint32_t value){
      reg->XIP_ENABLE = value;
 }
-inline uint32_t get_apb3spi_xip_enable_enable(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_enable_enable(volatile apb3spi_t* reg){
     return (reg->XIP_ENABLE >> 0) & 0x1;
 }
-inline void set_apb3spi_xip_enable_enable(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_enable_enable(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_ENABLE = (reg->XIP_ENABLE & ~(0x1U << 0)) | (value << 0);
 }
 
 //APB3SPI_XIP_CONFIG
-inline uint32_t get_apb3spi_xip_config(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_config(volatile apb3spi_t* reg){
      return reg->XIP_CONFIG;
 }
-inline void set_apb3spi_xip_config(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_xip_config(volatile apb3spi_t* reg, uint32_t value){
      reg->XIP_CONFIG = value;
 }
-inline uint32_t get_apb3spi_xip_config_instruction(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_config_instruction(volatile apb3spi_t* reg){
     return (reg->XIP_CONFIG >> 0) & 0xff;
 }
-inline void set_apb3spi_xip_config_instruction(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_config_instruction(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 0)) | (value << 0);
 }
-inline uint32_t get_apb3spi_xip_config_enable(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_config_enable(volatile apb3spi_t* reg){
     return (reg->XIP_CONFIG >> 8) & 0x1;
 }
-inline void set_apb3spi_xip_config_enable(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_config_enable(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0x1U << 8)) | (value << 8);
 }
-inline uint32_t get_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg){
     return (reg->XIP_CONFIG >> 16) & 0xff;
 }
-inline void set_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 16)) | (value << 16);
 }
-inline uint32_t get_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg){
     return (reg->XIP_CONFIG >> 24) & 0xf;
 }
-inline void set_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xfU << 24)) | (value << 24);
 }
 
 //APB3SPI_XIP_MODE
-inline uint32_t get_apb3spi_xip_mode(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_mode(volatile apb3spi_t* reg){
      return reg->XIP_MODE;
 }
-inline void set_apb3spi_xip_mode(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_xip_mode(volatile apb3spi_t* reg, uint32_t value){
      reg->XIP_MODE = value;
 }
-inline uint32_t get_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg){
     return (reg->XIP_MODE >> 0) & 0x3;
 }
-inline void set_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 0)) | (value << 0);
 }
-inline uint32_t get_apb3spi_xip_mode_address(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_mode_address(volatile apb3spi_t* reg){
     return (reg->XIP_MODE >> 8) & 0x3;
 }
-inline void set_apb3spi_xip_mode_address(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_mode_address(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 8)) | (value << 8);
 }
-inline uint32_t get_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg){
     return (reg->XIP_MODE >> 16) & 0x3;
 }
-inline void set_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 16)) | (value << 16);
 }
-inline uint32_t get_apb3spi_xip_mode_payload(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_mode_payload(volatile apb3spi_t* reg){
     return (reg->XIP_MODE >> 24) & 0x3;
 }
-inline void set_apb3spi_xip_mode_payload(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_mode_payload(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 24)) | (value << 24);
 }
 
 //APB3SPI_XIP_WRITE
-inline void set_apb3spi_xip_write(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_xip_write(volatile apb3spi_t* reg, uint32_t value){
      reg->XIP_WRITE = value;
 }
-inline void set_apb3spi_xip_write_data(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_write_data(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_WRITE = (reg->XIP_WRITE & ~(0xffU << 0)) | (value << 0);
 }
 
 //APB3SPI_XIP_READ_WRITE
-inline void set_apb3spi_xip_read_write(volatile apb3spi_t* reg, uint32_t value){
+static inline void set_apb3spi_xip_read_write(volatile apb3spi_t* reg, uint32_t value){
      reg->XIP_READ_WRITE = value;
 }
-inline void set_apb3spi_xip_read_write_data(volatile apb3spi_t* reg, uint8_t value){
+static inline void set_apb3spi_xip_read_write_data(volatile apb3spi_t* reg, uint8_t value){
     reg->XIP_READ_WRITE = (reg->XIP_READ_WRITE & ~(0xffU << 0)) | (value << 0);
 }
 
 //APB3SPI_XIP_READ
-inline uint32_t get_apb3spi_xip_read(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_read(volatile apb3spi_t* reg){
      return reg->XIP_READ;
 }
-inline uint32_t get_apb3spi_xip_read_data(volatile apb3spi_t* reg){
+static inline uint32_t get_apb3spi_xip_read_data(volatile apb3spi_t* reg){
     return (reg->XIP_READ >> 0) & 0xff;
 }
 

include/minres/devices/gen/camera.h

@@ -49,78 +49,78 @@ typedef struct {
 #define CAMERA_IP_FRAME_FINISHED_IRQ_PEND(V) ((V & CAMERA_IP_FRAME_FINISHED_IRQ_PEND_MASK) << CAMERA_IP_FRAME_FINISHED_IRQ_PEND_OFFS)
 
 //CAMERA_PIXEL
-inline uint32_t get_camera_pixel(volatile camera_t* reg){
+static inline uint32_t get_camera_pixel(volatile camera_t* reg){
      return reg->PIXEL;
 }
-inline void set_camera_pixel(volatile camera_t* reg, uint32_t value){
+static inline void set_camera_pixel(volatile camera_t* reg, uint32_t value){
      reg->PIXEL = value;
 }
-inline uint32_t get_camera_pixel_data(volatile camera_t* reg){
+static inline uint32_t get_camera_pixel_data(volatile camera_t* reg){
     return (reg->PIXEL >> 0) & 0x7ff;
 }
-inline void set_camera_pixel_data(volatile camera_t* reg, uint16_t value){
+static inline void set_camera_pixel_data(volatile camera_t* reg, uint16_t value){
     reg->PIXEL = (reg->PIXEL & ~(0x7ffU << 0)) | (value << 0);
 }
 
 //CAMERA_STATUS
-inline uint32_t get_camera_status(volatile camera_t* reg){
+static inline uint32_t get_camera_status(volatile camera_t* reg){
      return reg->STATUS;
 }
-inline uint32_t get_camera_status_pixel_avail(volatile camera_t* reg){
+static inline uint32_t get_camera_status_pixel_avail(volatile camera_t* reg){
     return (reg->STATUS >> 0) & 0x1;
 }
 
 //CAMERA_CAMERA_CLOCK_CTRL
-inline uint32_t get_camera_camera_clock_ctrl(volatile camera_t* reg){
+static inline uint32_t get_camera_camera_clock_ctrl(volatile camera_t* reg){
      return reg->CAMERA_CLOCK_CTRL;
 }
-inline void set_camera_camera_clock_ctrl(volatile camera_t* reg, uint32_t value){
+static inline void set_camera_camera_clock_ctrl(volatile camera_t* reg, uint32_t value){
      reg->CAMERA_CLOCK_CTRL = value;
 }
-inline uint32_t get_camera_camera_clock_ctrl_divider(volatile camera_t* reg){
+static inline uint32_t get_camera_camera_clock_ctrl_divider(volatile camera_t* reg){
     return (reg->CAMERA_CLOCK_CTRL >> 0) & 0xfffff;
 }
-inline void set_camera_camera_clock_ctrl_divider(volatile camera_t* reg, uint32_t value){
+static inline void set_camera_camera_clock_ctrl_divider(volatile camera_t* reg, uint32_t value){
     reg->CAMERA_CLOCK_CTRL = (reg->CAMERA_CLOCK_CTRL & ~(0xfffffU << 0)) | (value << 0);
 }
 
 //CAMERA_IE
-inline uint32_t get_camera_ie(volatile camera_t* reg){
+static inline uint32_t get_camera_ie(volatile camera_t* reg){
      return reg->IE;
 }
-inline void set_camera_ie(volatile camera_t* reg, uint32_t value){
+static inline void set_camera_ie(volatile camera_t* reg, uint32_t value){
      reg->IE = value;
 }
-inline uint32_t get_camera_ie_en_pixel_avail(volatile camera_t* reg){
+static inline uint32_t get_camera_ie_en_pixel_avail(volatile camera_t* reg){
     return (reg->IE >> 0) & 0x1;
 }
-inline void set_camera_ie_en_pixel_avail(volatile camera_t* reg, uint8_t value){
+static inline void set_camera_ie_en_pixel_avail(volatile camera_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_camera_ie_en_frame_finished(volatile camera_t* reg){
+static inline uint32_t get_camera_ie_en_frame_finished(volatile camera_t* reg){
     return (reg->IE >> 1) & 0x1;
 }
-inline void set_camera_ie_en_frame_finished(volatile camera_t* reg, uint8_t value){
+static inline void set_camera_ie_en_frame_finished(volatile camera_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
 }
 
 //CAMERA_IP
-inline uint32_t get_camera_ip(volatile camera_t* reg){
+static inline uint32_t get_camera_ip(volatile camera_t* reg){
      return reg->IP;
 }
-inline void set_camera_ip(volatile camera_t* reg, uint32_t value){
+static inline void set_camera_ip(volatile camera_t* reg, uint32_t value){
      reg->IP = value;
 }
-inline uint32_t get_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg){
+static inline uint32_t get_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg){
     return (reg->IP >> 0) & 0x1;
 }
-inline void set_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg, uint8_t value){
+static inline void set_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg, uint8_t value){
     reg->IP = (reg->IP & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_camera_ip_frame_finished_irq_pend(volatile camera_t* reg){
+static inline uint32_t get_camera_ip_frame_finished_irq_pend(volatile camera_t* reg){
     return (reg->IP >> 1) & 0x1;
 }
-inline void set_camera_ip_frame_finished_irq_pend(volatile camera_t* reg, uint8_t value){
+static inline void set_camera_ip_frame_finished_irq_pend(volatile camera_t* reg, uint8_t value){
     reg->IP = (reg->IP & ~(0x1U << 1)) | (value << 1);
 }
 

include/minres/devices/gen/dma.h

@@ -168,286 +168,286 @@ typedef struct {
 #define DMA_CH1_DST_ADDR_INC_DST_STRIDE(V) ((V & DMA_CH1_DST_ADDR_INC_DST_STRIDE_MASK) << DMA_CH1_DST_ADDR_INC_DST_STRIDE_OFFS)
 
 //DMA_CONTROL
-inline uint32_t get_dma_control(volatile dma_t* reg){
+static inline uint32_t get_dma_control(volatile dma_t* reg){
      return reg->CONTROL;
 }
-inline void set_dma_control(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_control(volatile dma_t* reg, uint32_t value){
      reg->CONTROL = value;
 }
-inline uint32_t get_dma_control_ch0_enable_transfer(volatile dma_t* reg){
+static inline uint32_t get_dma_control_ch0_enable_transfer(volatile dma_t* reg){
     return (reg->CONTROL >> 0) & 0x1;
 }
-inline void set_dma_control_ch0_enable_transfer(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_control_ch0_enable_transfer(volatile dma_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_dma_control_ch1_enable_transfer(volatile dma_t* reg){
+static inline uint32_t get_dma_control_ch1_enable_transfer(volatile dma_t* reg){
     return (reg->CONTROL >> 1) & 0x1;
 }
-inline void set_dma_control_ch1_enable_transfer(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_control_ch1_enable_transfer(volatile dma_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x1U << 1)) | (value << 1);
 }
 
 //DMA_STATUS
-inline uint32_t get_dma_status(volatile dma_t* reg){
+static inline uint32_t get_dma_status(volatile dma_t* reg){
      return reg->STATUS;
 }
-inline uint32_t get_dma_status_ch0_busy(volatile dma_t* reg){
+static inline uint32_t get_dma_status_ch0_busy(volatile dma_t* reg){
     return (reg->STATUS >> 0) & 0x1;
 }
-inline uint32_t get_dma_status_ch1_busy(volatile dma_t* reg){
+static inline uint32_t get_dma_status_ch1_busy(volatile dma_t* reg){
     return (reg->STATUS >> 1) & 0x1;
 }
 
 //DMA_IE
-inline uint32_t get_dma_ie(volatile dma_t* reg){
+static inline uint32_t get_dma_ie(volatile dma_t* reg){
      return reg->IE;
 }
-inline void set_dma_ie(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ie(volatile dma_t* reg, uint32_t value){
      reg->IE = value;
 }
-inline uint32_t get_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg){
     return (reg->IE >> 0) & 0x1;
 }
-inline void set_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg){
     return (reg->IE >> 1) & 0x1;
 }
-inline void set_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
 }
-inline uint32_t get_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg){
     return (reg->IE >> 2) & 0x1;
 }
-inline void set_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 2)) | (value << 2);
 }
-inline uint32_t get_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg){
     return (reg->IE >> 3) & 0x1;
 }
-inline void set_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 3)) | (value << 3);
 }
 
 //DMA_IP
-inline uint32_t get_dma_ip(volatile dma_t* reg){
+static inline uint32_t get_dma_ip(volatile dma_t* reg){
      return reg->IP;
 }
-inline uint32_t get_dma_ip_ch0_ip_seg_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ip_ch0_ip_seg_transfer_done(volatile dma_t* reg){
     return (reg->IP >> 0) & 0x1;
 }
-inline uint32_t get_dma_ip_ch0_ip_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ip_ch0_ip_transfer_done(volatile dma_t* reg){
     return (reg->IP >> 1) & 0x1;
 }
-inline uint32_t get_dma_ip_ch1_ip_seg_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ip_ch1_ip_seg_transfer_done(volatile dma_t* reg){
     return (reg->IP >> 2) & 0x1;
 }
-inline uint32_t get_dma_ip_ch1_ip_transfer_done(volatile dma_t* reg){
+static inline uint32_t get_dma_ip_ch1_ip_transfer_done(volatile dma_t* reg){
     return (reg->IP >> 3) & 0x1;
 }
 
 //DMA_CH0_EVENT
-inline uint32_t get_dma_ch0_event(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_event(volatile dma_t* reg){
      return reg->CH0_EVENT;
 }
-inline void set_dma_ch0_event(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_event(volatile dma_t* reg, uint32_t value){
      reg->CH0_EVENT = value;
 }
-inline uint32_t get_dma_ch0_event_select(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_event_select(volatile dma_t* reg){
     return (reg->CH0_EVENT >> 0) & 0x1f;
 }
-inline void set_dma_ch0_event_select(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch0_event_select(volatile dma_t* reg, uint8_t value){
     reg->CH0_EVENT = (reg->CH0_EVENT & ~(0x1fU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch0_event_combine(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_event_combine(volatile dma_t* reg){
     return (reg->CH0_EVENT >> 31) & 0x1;
 }
-inline void set_dma_ch0_event_combine(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch0_event_combine(volatile dma_t* reg, uint8_t value){
     reg->CH0_EVENT = (reg->CH0_EVENT & ~(0x1U << 31)) | (value << 31);
 }
 
 //DMA_CH0_TRANSFER
-inline uint32_t get_dma_ch0_transfer(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_transfer(volatile dma_t* reg){
      return reg->CH0_TRANSFER;
 }
-inline void set_dma_ch0_transfer(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_transfer(volatile dma_t* reg, uint32_t value){
      reg->CH0_TRANSFER = value;
 }
-inline uint32_t get_dma_ch0_transfer_width(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_transfer_width(volatile dma_t* reg){
     return (reg->CH0_TRANSFER >> 0) & 0x3;
 }
-inline void set_dma_ch0_transfer_width(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch0_transfer_width(volatile dma_t* reg, uint8_t value){
     reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0x3U << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch0_transfer_seg_length(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_transfer_seg_length(volatile dma_t* reg){
     return (reg->CH0_TRANSFER >> 2) & 0x3ff;
 }
-inline void set_dma_ch0_transfer_seg_length(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch0_transfer_seg_length(volatile dma_t* reg, uint16_t value){
     reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0x3ffU << 2)) | (value << 2);
 }
-inline uint32_t get_dma_ch0_transfer_seg_count(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_transfer_seg_count(volatile dma_t* reg){
     return (reg->CH0_TRANSFER >> 12) & 0xfffff;
 }
-inline void set_dma_ch0_transfer_seg_count(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_transfer_seg_count(volatile dma_t* reg, uint32_t value){
     reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0xfffffU << 12)) | (value << 12);
 }
 
 //DMA_CH0_SRC_START_ADDR
-inline uint32_t get_dma_ch0_src_start_addr(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_src_start_addr(volatile dma_t* reg){
     return (reg->CH0_SRC_START_ADDR >> 0) & 0xffffffff;
 }
-inline void set_dma_ch0_src_start_addr(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_src_start_addr(volatile dma_t* reg, uint32_t value){
     reg->CH0_SRC_START_ADDR = (reg->CH0_SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //DMA_CH0_SRC_ADDR_INC
-inline uint32_t get_dma_ch0_src_addr_inc(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_src_addr_inc(volatile dma_t* reg){
      return reg->CH0_SRC_ADDR_INC;
 }
-inline void set_dma_ch0_src_addr_inc(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_src_addr_inc(volatile dma_t* reg, uint32_t value){
      reg->CH0_SRC_ADDR_INC = value;
 }
-inline uint32_t get_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg){
     return (reg->CH0_SRC_ADDR_INC >> 0) & 0xfff;
 }
-inline void set_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
     reg->CH0_SRC_ADDR_INC = (reg->CH0_SRC_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg){
     return (reg->CH0_SRC_ADDR_INC >> 12) & 0xfffff;
 }
-inline void set_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
     reg->CH0_SRC_ADDR_INC = (reg->CH0_SRC_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
 }
 
 //DMA_CH0_DST_START_ADDR
-inline uint32_t get_dma_ch0_dst_start_addr(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_dst_start_addr(volatile dma_t* reg){
     return (reg->CH0_DST_START_ADDR >> 0) & 0xffffffff;
 }
-inline void set_dma_ch0_dst_start_addr(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_dst_start_addr(volatile dma_t* reg, uint32_t value){
     reg->CH0_DST_START_ADDR = (reg->CH0_DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //DMA_CH0_DST_ADDR_INC
-inline uint32_t get_dma_ch0_dst_addr_inc(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_dst_addr_inc(volatile dma_t* reg){
      return reg->CH0_DST_ADDR_INC;
 }
-inline void set_dma_ch0_dst_addr_inc(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_dst_addr_inc(volatile dma_t* reg, uint32_t value){
      reg->CH0_DST_ADDR_INC = value;
 }
-inline uint32_t get_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg){
     return (reg->CH0_DST_ADDR_INC >> 0) & 0xfff;
 }
-inline void set_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
     reg->CH0_DST_ADDR_INC = (reg->CH0_DST_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg){
+static inline uint32_t get_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg){
     return (reg->CH0_DST_ADDR_INC >> 12) & 0xfffff;
 }
-inline void set_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
     reg->CH0_DST_ADDR_INC = (reg->CH0_DST_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
 }
 
 //DMA_CH1_EVENT
-inline uint32_t get_dma_ch1_event(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_event(volatile dma_t* reg){
      return reg->CH1_EVENT;
 }
-inline void set_dma_ch1_event(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_event(volatile dma_t* reg, uint32_t value){
      reg->CH1_EVENT = value;
 }
-inline uint32_t get_dma_ch1_event_select(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_event_select(volatile dma_t* reg){
     return (reg->CH1_EVENT >> 0) & 0x1f;
 }
-inline void set_dma_ch1_event_select(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch1_event_select(volatile dma_t* reg, uint8_t value){
     reg->CH1_EVENT = (reg->CH1_EVENT & ~(0x1fU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch1_event_combine(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_event_combine(volatile dma_t* reg){
     return (reg->CH1_EVENT >> 31) & 0x1;
 }
-inline void set_dma_ch1_event_combine(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch1_event_combine(volatile dma_t* reg, uint8_t value){
     reg->CH1_EVENT = (reg->CH1_EVENT & ~(0x1U << 31)) | (value << 31);
 }
 
 //DMA_CH1_TRANSFER
-inline uint32_t get_dma_ch1_transfer(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_transfer(volatile dma_t* reg){
      return reg->CH1_TRANSFER;
 }
-inline void set_dma_ch1_transfer(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_transfer(volatile dma_t* reg, uint32_t value){
      reg->CH1_TRANSFER = value;
 }
-inline uint32_t get_dma_ch1_transfer_width(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_transfer_width(volatile dma_t* reg){
     return (reg->CH1_TRANSFER >> 0) & 0x3;
 }
-inline void set_dma_ch1_transfer_width(volatile dma_t* reg, uint8_t value){
+static inline void set_dma_ch1_transfer_width(volatile dma_t* reg, uint8_t value){
     reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0x3U << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch1_transfer_seg_length(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_transfer_seg_length(volatile dma_t* reg){
     return (reg->CH1_TRANSFER >> 2) & 0x3ff;
 }
-inline void set_dma_ch1_transfer_seg_length(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch1_transfer_seg_length(volatile dma_t* reg, uint16_t value){
     reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0x3ffU << 2)) | (value << 2);
 }
-inline uint32_t get_dma_ch1_transfer_seg_count(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_transfer_seg_count(volatile dma_t* reg){
     return (reg->CH1_TRANSFER >> 12) & 0xfffff;
 }
-inline void set_dma_ch1_transfer_seg_count(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_transfer_seg_count(volatile dma_t* reg, uint32_t value){
     reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0xfffffU << 12)) | (value << 12);
 }
 
 //DMA_CH1_SRC_START_ADDR
-inline uint32_t get_dma_ch1_src_start_addr(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_src_start_addr(volatile dma_t* reg){
     return (reg->CH1_SRC_START_ADDR >> 0) & 0xffffffff;
 }
-inline void set_dma_ch1_src_start_addr(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_src_start_addr(volatile dma_t* reg, uint32_t value){
     reg->CH1_SRC_START_ADDR = (reg->CH1_SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //DMA_CH1_SRC_ADDR_INC
-inline uint32_t get_dma_ch1_src_addr_inc(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_src_addr_inc(volatile dma_t* reg){
      return reg->CH1_SRC_ADDR_INC;
 }
-inline void set_dma_ch1_src_addr_inc(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_src_addr_inc(volatile dma_t* reg, uint32_t value){
      reg->CH1_SRC_ADDR_INC = value;
 }
-inline uint32_t get_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg){
     return (reg->CH1_SRC_ADDR_INC >> 0) & 0xfff;
 }
-inline void set_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
     reg->CH1_SRC_ADDR_INC = (reg->CH1_SRC_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg){
     return (reg->CH1_SRC_ADDR_INC >> 12) & 0xfffff;
 }
-inline void set_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
     reg->CH1_SRC_ADDR_INC = (reg->CH1_SRC_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
 }
 
 //DMA_CH1_DST_START_ADDR
-inline uint32_t get_dma_ch1_dst_start_addr(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_dst_start_addr(volatile dma_t* reg){
     return (reg->CH1_DST_START_ADDR >> 0) & 0xffffffff;
 }
-inline void set_dma_ch1_dst_start_addr(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_dst_start_addr(volatile dma_t* reg, uint32_t value){
     reg->CH1_DST_START_ADDR = (reg->CH1_DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //DMA_CH1_DST_ADDR_INC
-inline uint32_t get_dma_ch1_dst_addr_inc(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_dst_addr_inc(volatile dma_t* reg){
      return reg->CH1_DST_ADDR_INC;
 }
-inline void set_dma_ch1_dst_addr_inc(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_dst_addr_inc(volatile dma_t* reg, uint32_t value){
      reg->CH1_DST_ADDR_INC = value;
 }
-inline uint32_t get_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg){
     return (reg->CH1_DST_ADDR_INC >> 0) & 0xfff;
 }
-inline void set_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
+static inline void set_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
     reg->CH1_DST_ADDR_INC = (reg->CH1_DST_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
 }
-inline uint32_t get_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg){
+static inline uint32_t get_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg){
     return (reg->CH1_DST_ADDR_INC >> 12) & 0xfffff;
 }
-inline void set_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
+static inline void set_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
     reg->CH1_DST_ADDR_INC = (reg->CH1_DST_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
 }
 

include/minres/devices/gen/gpio.h

@@ -56,63 +56,63 @@ typedef struct {
 #define GPIO_BOOT_SEL(V) ((V & GPIO_BOOT_SEL_MASK) << GPIO_BOOT_SEL_OFFS)
 
 //GPIO_VALUE
-inline uint32_t get_gpio_value(volatile gpio_t* reg){
+static inline uint32_t get_gpio_value(volatile gpio_t* reg){
     return (reg->VALUE >> 0) & 0xffffffff;
 }
 
 //GPIO_WRITE
-inline uint32_t get_gpio_write(volatile gpio_t* reg){
+static inline uint32_t get_gpio_write(volatile gpio_t* reg){
     return (reg->WRITE >> 0) & 0xffffffff;
 }
-inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
     reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_WRITEENABLE
-inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
+static inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
     return (reg->WRITEENABLE >> 0) & 0xffffffff;
 }
-inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
     reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_IE
-inline uint32_t get_gpio_ie(volatile gpio_t* reg){
+static inline uint32_t get_gpio_ie(volatile gpio_t* reg){
     return (reg->IE >> 0) & 0xffffffff;
 }
-inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
     reg->IE = (reg->IE & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_IP
-inline uint32_t get_gpio_ip(volatile gpio_t* reg){
+static inline uint32_t get_gpio_ip(volatile gpio_t* reg){
     return (reg->IP >> 0) & 0xffffffff;
 }
-inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
     reg->IP = (reg->IP & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_IRQ_TRIGGER
-inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
+static inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
     return (reg->IRQ_TRIGGER >> 0) & 0xffffffff;
 }
-inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
     reg->IRQ_TRIGGER = (reg->IRQ_TRIGGER & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_IRQ_TYPE
-inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
+static inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
     return (reg->IRQ_TYPE >> 0) & 0xffffffff;
 }
-inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
+static inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
     reg->IRQ_TYPE = (reg->IRQ_TYPE & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //GPIO_BOOT_SEL
-inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
+static inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
      return reg->BOOT_SEL;
 }
-inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
+static inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
     return (reg->BOOT_SEL >> 0) & 0x7;
 }
 

include/minres/devices/gen/i2s.h

@@ -96,132 +96,132 @@ typedef struct {
 #define I2S_IP_RIGHT_SAMPLE_AVAIL(V) ((V & I2S_IP_RIGHT_SAMPLE_AVAIL_MASK) << I2S_IP_RIGHT_SAMPLE_AVAIL_OFFS)
 
 //I2S_LEFT_CH
-inline uint32_t get_i2s_left_ch(volatile i2s_t* reg){
+static inline uint32_t get_i2s_left_ch(volatile i2s_t* reg){
     return (reg->LEFT_CH >> 0) & 0xffffffff;
 }
 
 //I2S_RIGHT_CH
-inline uint32_t get_i2s_right_ch(volatile i2s_t* reg){
+static inline uint32_t get_i2s_right_ch(volatile i2s_t* reg){
     return (reg->RIGHT_CH >> 0) & 0xffffffff;
 }
 
 //I2S_CONTROL
-inline uint32_t get_i2s_control(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control(volatile i2s_t* reg){
      return reg->CONTROL;
 }
-inline void set_i2s_control(volatile i2s_t* reg, uint32_t value){
+static inline void set_i2s_control(volatile i2s_t* reg, uint32_t value){
      reg->CONTROL = value;
 }
-inline uint32_t get_i2s_control_mode(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_mode(volatile i2s_t* reg){
     return (reg->CONTROL >> 0) & 0x3;
 }
-inline void set_i2s_control_mode(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_mode(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x3U << 0)) | (value << 0);
 }
-inline uint32_t get_i2s_control_disable_left(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_disable_left(volatile i2s_t* reg){
     return (reg->CONTROL >> 2) & 0x1;
 }
-inline void set_i2s_control_disable_left(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_disable_left(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x1U << 2)) | (value << 2);
 }
-inline uint32_t get_i2s_control_disable_right(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_disable_right(volatile i2s_t* reg){
     return (reg->CONTROL >> 3) & 0x1;
 }
-inline void set_i2s_control_disable_right(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_disable_right(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x1U << 3)) | (value << 3);
 }
-inline uint32_t get_i2s_control_is_master(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_is_master(volatile i2s_t* reg){
     return (reg->CONTROL >> 4) & 0x1;
 }
-inline void set_i2s_control_is_master(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_is_master(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x1U << 4)) | (value << 4);
 }
-inline uint32_t get_i2s_control_sample_size(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_sample_size(volatile i2s_t* reg){
     return (reg->CONTROL >> 5) & 0x3;
 }
-inline void set_i2s_control_sample_size(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_sample_size(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x3U << 5)) | (value << 5);
 }
-inline uint32_t get_i2s_control_pdm_scale(volatile i2s_t* reg){
+static inline uint32_t get_i2s_control_pdm_scale(volatile i2s_t* reg){
     return (reg->CONTROL >> 7) & 0x7;
 }
-inline void set_i2s_control_pdm_scale(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_control_pdm_scale(volatile i2s_t* reg, uint8_t value){
     reg->CONTROL = (reg->CONTROL & ~(0x7U << 7)) | (value << 7);
 }
 
 //I2S_STATUS
-inline uint32_t get_i2s_status(volatile i2s_t* reg){
+static inline uint32_t get_i2s_status(volatile i2s_t* reg){
      return reg->STATUS;
 }
-inline uint32_t get_i2s_status_enabled(volatile i2s_t* reg){
+static inline uint32_t get_i2s_status_enabled(volatile i2s_t* reg){
     return (reg->STATUS >> 0) & 0x1;
 }
-inline uint32_t get_i2s_status_active(volatile i2s_t* reg){
+static inline uint32_t get_i2s_status_active(volatile i2s_t* reg){
     return (reg->STATUS >> 1) & 0x1;
 }
-inline uint32_t get_i2s_status_left_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_status_left_avail(volatile i2s_t* reg){
     return (reg->STATUS >> 2) & 0x1;
 }
-inline uint32_t get_i2s_status_right_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_status_right_avail(volatile i2s_t* reg){
     return (reg->STATUS >> 3) & 0x1;
 }
 
 //I2S_I2S_CLOCK_CTRL
-inline uint32_t get_i2s_i2s_clock_ctrl(volatile i2s_t* reg){
+static inline uint32_t get_i2s_i2s_clock_ctrl(volatile i2s_t* reg){
      return reg->I2S_CLOCK_CTRL;
 }
-inline void set_i2s_i2s_clock_ctrl(volatile i2s_t* reg, uint32_t value){
+static inline void set_i2s_i2s_clock_ctrl(volatile i2s_t* reg, uint32_t value){
      reg->I2S_CLOCK_CTRL = value;
 }
-inline uint32_t get_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg){
+static inline uint32_t get_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg){
     return (reg->I2S_CLOCK_CTRL >> 0) & 0xfffff;
 }
-inline void set_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg, uint32_t value){
+static inline void set_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg, uint32_t value){
     reg->I2S_CLOCK_CTRL = (reg->I2S_CLOCK_CTRL & ~(0xfffffU << 0)) | (value << 0);
 }
 
 //I2S_PDM_CLOCK_CTRL
-inline uint32_t get_i2s_pdm_clock_ctrl(volatile i2s_t* reg){
+static inline uint32_t get_i2s_pdm_clock_ctrl(volatile i2s_t* reg){
      return reg->PDM_CLOCK_CTRL;
 }
-inline void set_i2s_pdm_clock_ctrl(volatile i2s_t* reg, uint32_t value){
+static inline void set_i2s_pdm_clock_ctrl(volatile i2s_t* reg, uint32_t value){
      reg->PDM_CLOCK_CTRL = value;
 }
-inline uint32_t get_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg){
+static inline uint32_t get_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg){
     return (reg->PDM_CLOCK_CTRL >> 0) & 0x3ff;
 }
-inline void set_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg, uint16_t value){
+static inline void set_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg, uint16_t value){
     reg->PDM_CLOCK_CTRL = (reg->PDM_CLOCK_CTRL & ~(0x3ffU << 0)) | (value << 0);
 }
 
 //I2S_IE
-inline uint32_t get_i2s_ie(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ie(volatile i2s_t* reg){
      return reg->IE;
 }
-inline void set_i2s_ie(volatile i2s_t* reg, uint32_t value){
+static inline void set_i2s_ie(volatile i2s_t* reg, uint32_t value){
      reg->IE = value;
 }
-inline uint32_t get_i2s_ie_en_left_sample_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ie_en_left_sample_avail(volatile i2s_t* reg){
     return (reg->IE >> 0) & 0x1;
 }
-inline void set_i2s_ie_en_left_sample_avail(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_ie_en_left_sample_avail(volatile i2s_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_i2s_ie_en_right_sample_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ie_en_right_sample_avail(volatile i2s_t* reg){
     return (reg->IE >> 1) & 0x1;
 }
-inline void set_i2s_ie_en_right_sample_avail(volatile i2s_t* reg, uint8_t value){
+static inline void set_i2s_ie_en_right_sample_avail(volatile i2s_t* reg, uint8_t value){
     reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
 }
 
 //I2S_IP
-inline uint32_t get_i2s_ip(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ip(volatile i2s_t* reg){
      return reg->IP;
 }
-inline uint32_t get_i2s_ip_left_sample_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ip_left_sample_avail(volatile i2s_t* reg){
     return (reg->IP >> 0) & 0x1;
 }
-inline uint32_t get_i2s_ip_right_sample_avail(volatile i2s_t* reg){
+static inline uint32_t get_i2s_ip_right_sample_avail(volatile i2s_t* reg){
     return (reg->IP >> 1) & 0x1;
 }
 

include/minres/devices/gen/msgif.h

@@ -94,103 +94,103 @@ typedef struct {
 #define MSGIF_REG_PAYLOAD_7(V) ((V & MSGIF_REG_PAYLOAD_7_MASK) << MSGIF_REG_PAYLOAD_7_OFFS)
 
 //MSGIF_REG_SEND
-inline void set_msgif_REG_SEND(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_SEND(volatile msgif_t* reg, uint32_t value){
      reg->REG_SEND = value;
 }
-inline void set_msgif_REG_SEND_SEND(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_SEND_SEND(volatile msgif_t* reg, uint8_t value){
     reg->REG_SEND = (reg->REG_SEND & ~(0x1U << 0)) | (value << 0);
 }
 
 //MSGIF_REG_HEADER
-inline uint32_t get_msgif_REG_HEADER(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_HEADER(volatile msgif_t* reg){
      return reg->REG_HEADER;
 }
-inline void set_msgif_REG_HEADER(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_HEADER(volatile msgif_t* reg, uint32_t value){
      reg->REG_HEADER = value;
 }
-inline uint32_t get_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg){
     return (reg->REG_HEADER >> 0) & 0x7;
 }
-inline void set_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg, uint8_t value){
     reg->REG_HEADER = (reg->REG_HEADER & ~(0x7U << 0)) | (value << 0);
 }
-inline uint32_t get_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg){
     return (reg->REG_HEADER >> 3) & 0x3;
 }
-inline void set_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg, uint8_t value){
     reg->REG_HEADER = (reg->REG_HEADER & ~(0x3U << 3)) | (value << 3);
 }
-inline uint32_t get_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg){
     return (reg->REG_HEADER >> 5) & 0xf;
 }
-inline void set_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg, uint8_t value){
     reg->REG_HEADER = (reg->REG_HEADER & ~(0xfU << 5)) | (value << 5);
 }
-inline uint32_t get_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg){
     return (reg->REG_HEADER >> 9) & 0xf;
 }
-inline void set_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg, uint8_t value){
     reg->REG_HEADER = (reg->REG_HEADER & ~(0xfU << 9)) | (value << 9);
 }
 
 //MSGIF_REG_ACK
-inline void set_msgif_REG_ACK(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_ACK(volatile msgif_t* reg, uint32_t value){
      reg->REG_ACK = value;
 }
-inline void set_msgif_REG_ACK_ACK(volatile msgif_t* reg, uint8_t value){
+static inline void set_msgif_REG_ACK_ACK(volatile msgif_t* reg, uint8_t value){
     reg->REG_ACK = (reg->REG_ACK & ~(0x1U << 0)) | (value << 0);
 }
 
 //MSGIF_REG_RECV_ID
-inline uint32_t get_msgif_REG_RECV_ID(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_RECV_ID(volatile msgif_t* reg){
      return reg->REG_RECV_ID;
 }
-inline uint32_t get_msgif_REG_RECV_ID_RECV_ID(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_RECV_ID_RECV_ID(volatile msgif_t* reg){
     return (reg->REG_RECV_ID >> 0) & 0xf;
 }
 
 //MSGIF_REG_RECV_PAYLOAD
-inline uint32_t get_msgif_REG_RECV_PAYLOAD(volatile msgif_t* reg){
+static inline uint32_t get_msgif_REG_RECV_PAYLOAD(volatile msgif_t* reg){
     return (reg->REG_RECV_PAYLOAD >> 0) & 0xffffffff;
 }
 
 //MSGIF_REG_PAYLOAD_0
-inline void set_msgif_REG_PAYLOAD_0(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_0(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_0 = (reg->REG_PAYLOAD_0 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_1
-inline void set_msgif_REG_PAYLOAD_1(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_1(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_1 = (reg->REG_PAYLOAD_1 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_2
-inline void set_msgif_REG_PAYLOAD_2(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_2(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_2 = (reg->REG_PAYLOAD_2 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_3
-inline void set_msgif_REG_PAYLOAD_3(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_3(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_3 = (reg->REG_PAYLOAD_3 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_4
-inline void set_msgif_REG_PAYLOAD_4(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_4(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_4 = (reg->REG_PAYLOAD_4 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_5
-inline void set_msgif_REG_PAYLOAD_5(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_5(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_5 = (reg->REG_PAYLOAD_5 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_6
-inline void set_msgif_REG_PAYLOAD_6(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_6(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_6 = (reg->REG_PAYLOAD_6 & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //MSGIF_REG_PAYLOAD_7
-inline void set_msgif_REG_PAYLOAD_7(volatile msgif_t* reg, uint32_t value){
+static inline void set_msgif_REG_PAYLOAD_7(volatile msgif_t* reg, uint32_t value){
     reg->REG_PAYLOAD_7 = (reg->REG_PAYLOAD_7 & ~(0xffffffffU << 0)) | (value << 0);
 }
 

include/minres/devices/gen/timercounter.h

@@ -59,82 +59,82 @@ typedef struct {
 #define TIMERCOUNTER_T1_VALUE(V) ((V & TIMERCOUNTER_T1_VALUE_MASK) << TIMERCOUNTER_T1_VALUE_OFFS)
 
 //TIMERCOUNTER_PRESCALER
-inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
      return reg->PRESCALER;
 }
-inline void set_timercounter_prescaler(volatile timercounter_t* reg, uint32_t value){
+static inline void set_timercounter_prescaler(volatile timercounter_t* reg, uint32_t value){
      reg->PRESCALER = value;
 }
-inline uint32_t get_timercounter_prescaler_limit(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_prescaler_limit(volatile timercounter_t* reg){
     return (reg->PRESCALER >> 0) & 0xffff;
 }
-inline void set_timercounter_prescaler_limit(volatile timercounter_t* reg, uint16_t value){
+static inline void set_timercounter_prescaler_limit(volatile timercounter_t* reg, uint16_t value){
     reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0);
 }
 
 //TIMERCOUNTER_T0_CTRL
-inline uint32_t get_timercounter_t0_ctrl(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t0_ctrl(volatile timercounter_t* reg){
      return reg->T0_CTRL;
 }
-inline void set_timercounter_t0_ctrl(volatile timercounter_t* reg, uint32_t value){
+static inline void set_timercounter_t0_ctrl(volatile timercounter_t* reg, uint32_t value){
      reg->T0_CTRL = value;
 }
-inline uint32_t get_timercounter_t0_ctrl_enable(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t0_ctrl_enable(volatile timercounter_t* reg){
     return (reg->T0_CTRL >> 0) & 0x7;
 }
-inline void set_timercounter_t0_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
+static inline void set_timercounter_t0_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
     reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0);
 }
-inline uint32_t get_timercounter_t0_ctrl_clear(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t0_ctrl_clear(volatile timercounter_t* reg){
     return (reg->T0_CTRL >> 3) & 0x3;
 }
-inline void set_timercounter_t0_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
+static inline void set_timercounter_t0_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
     reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3);
 }
 
 //TIMERCOUNTER_T0_OVERFLOW
-inline uint32_t get_timercounter_t0_overflow(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t0_overflow(volatile timercounter_t* reg){
     return (reg->T0_OVERFLOW >> 0) & 0xffffffff;
 }
-inline void set_timercounter_t0_overflow(volatile timercounter_t* reg, uint32_t value){
+static inline void set_timercounter_t0_overflow(volatile timercounter_t* reg, uint32_t value){
     reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //TIMERCOUNTER_T0_VALUE
-inline uint32_t get_timercounter_t0_value(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t0_value(volatile timercounter_t* reg){
     return (reg->T0_VALUE >> 0) & 0xffffffff;
 }
 
 //TIMERCOUNTER_T1_CTRL
-inline uint32_t get_timercounter_t1_ctrl(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t1_ctrl(volatile timercounter_t* reg){
      return reg->T1_CTRL;
 }
-inline void set_timercounter_t1_ctrl(volatile timercounter_t* reg, uint32_t value){
+static inline void set_timercounter_t1_ctrl(volatile timercounter_t* reg, uint32_t value){
      reg->T1_CTRL = value;
 }
-inline uint32_t get_timercounter_t1_ctrl_enable(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t1_ctrl_enable(volatile timercounter_t* reg){
     return (reg->T1_CTRL >> 0) & 0x7;
 }
-inline void set_timercounter_t1_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
+static inline void set_timercounter_t1_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
     reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0);
 }
-inline uint32_t get_timercounter_t1_ctrl_clear(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t1_ctrl_clear(volatile timercounter_t* reg){
     return (reg->T1_CTRL >> 3) & 0x3;
 }
-inline void set_timercounter_t1_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
+static inline void set_timercounter_t1_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
     reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3);
 }
 
 //TIMERCOUNTER_T1_OVERFLOW
-inline uint32_t get_timercounter_t1_overflow(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t1_overflow(volatile timercounter_t* reg){
     return (reg->T1_OVERFLOW >> 0) & 0xffffffff;
 }
-inline void set_timercounter_t1_overflow(volatile timercounter_t* reg, uint32_t value){
+static inline void set_timercounter_t1_overflow(volatile timercounter_t* reg, uint32_t value){
     reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
 }
 
 //TIMERCOUNTER_T1_VALUE
-inline uint32_t get_timercounter_t1_value(volatile timercounter_t* reg){
+static inline uint32_t get_timercounter_t1_value(volatile timercounter_t* reg){
     return (reg->T1_VALUE >> 0) & 0xffffffff;
 }
 

include/minres/devices/gen/uart.h

@@ -101,135 +101,135 @@ typedef struct {
 #define UART_STATUS_REG_CLEAR_BREAK(V) ((V & UART_STATUS_REG_CLEAR_BREAK_MASK) << UART_STATUS_REG_CLEAR_BREAK_OFFS)
 
 //UART_RX_TX_REG
-inline uint32_t get_uart_rx_tx_reg(volatile uart_t* reg){
+static inline uint32_t get_uart_rx_tx_reg(volatile uart_t* reg){
      return reg->RX_TX_REG;
 }
-inline void set_uart_rx_tx_reg(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_rx_tx_reg(volatile uart_t* reg, uint32_t value){
      reg->RX_TX_REG = value;
 }
-inline uint32_t get_uart_rx_tx_reg_data(volatile uart_t* reg){
+static inline uint32_t get_uart_rx_tx_reg_data(volatile uart_t* reg){
     return (reg->RX_TX_REG >> 0) & 0xff;
 }
-inline void set_uart_rx_tx_reg_data(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_rx_tx_reg_data(volatile uart_t* reg, uint8_t value){
     reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0);
 }
-inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile uart_t* reg){
+static inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile uart_t* reg){
     return (reg->RX_TX_REG >> 14) & 0x1;
 }
-inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){
+static inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){
     return (reg->RX_TX_REG >> 15) & 0x1;
 }
-inline uint32_t get_uart_rx_tx_reg_tx_empty(volatile uart_t* reg){
+static inline uint32_t get_uart_rx_tx_reg_tx_empty(volatile uart_t* reg){
     return (reg->RX_TX_REG >> 16) & 0x1;
 }
 
 //UART_INT_CTRL_REG
-inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){
      return reg->INT_CTRL_REG;
 }
-inline void set_uart_int_ctrl_reg(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_int_ctrl_reg(volatile uart_t* reg, uint32_t value){
      reg->INT_CTRL_REG = value;
 }
-inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 0) & 0x1;
 }
-inline void set_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg, uint8_t value){
     reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0);
 }
-inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 1) & 0x1;
 }
-inline void set_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg, uint8_t value){
     reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1);
 }
-inline uint32_t get_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 2) & 0x1;
 }
-inline void set_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg, uint8_t value){
     reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 2)) | (value << 2);
 }
-inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 8) & 0x1;
 }
-inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 9) & 0x1;
 }
-inline uint32_t get_uart_int_ctrl_reg_break_intr_pend(volatile uart_t* reg){
+static inline uint32_t get_uart_int_ctrl_reg_break_intr_pend(volatile uart_t* reg){
     return (reg->INT_CTRL_REG >> 10) & 0x1;
 }
 
 //UART_CLK_DIVIDER_REG
-inline uint32_t get_uart_clk_divider_reg(volatile uart_t* reg){
+static inline uint32_t get_uart_clk_divider_reg(volatile uart_t* reg){
      return reg->CLK_DIVIDER_REG;
 }
-inline void set_uart_clk_divider_reg(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_clk_divider_reg(volatile uart_t* reg, uint32_t value){
      reg->CLK_DIVIDER_REG = value;
 }
-inline uint32_t get_uart_clk_divider_reg_clock_divider(volatile uart_t* reg){
+static inline uint32_t get_uart_clk_divider_reg_clock_divider(volatile uart_t* reg){
     return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff;
 }
-inline void set_uart_clk_divider_reg_clock_divider(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_clk_divider_reg_clock_divider(volatile uart_t* reg, uint32_t value){
     reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0);
 }
 
 //UART_FRAME_CONFIG_REG
-inline uint32_t get_uart_frame_config_reg(volatile uart_t* reg){
+static inline uint32_t get_uart_frame_config_reg(volatile uart_t* reg){
      return reg->FRAME_CONFIG_REG;
 }
-inline void set_uart_frame_config_reg(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_frame_config_reg(volatile uart_t* reg, uint32_t value){
      reg->FRAME_CONFIG_REG = value;
 }
-inline uint32_t get_uart_frame_config_reg_data_length(volatile uart_t* reg){
+static inline uint32_t get_uart_frame_config_reg_data_length(volatile uart_t* reg){
     return (reg->FRAME_CONFIG_REG >> 0) & 0x7;
 }
-inline void set_uart_frame_config_reg_data_length(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_frame_config_reg_data_length(volatile uart_t* reg, uint8_t value){
     reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0);
 }
-inline uint32_t get_uart_frame_config_reg_parity(volatile uart_t* reg){
+static inline uint32_t get_uart_frame_config_reg_parity(volatile uart_t* reg){
     return (reg->FRAME_CONFIG_REG >> 3) & 0x3;
 }
-inline void set_uart_frame_config_reg_parity(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_frame_config_reg_parity(volatile uart_t* reg, uint8_t value){
     reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3);
 }
-inline uint32_t get_uart_frame_config_reg_stop_bit(volatile uart_t* reg){
+static inline uint32_t get_uart_frame_config_reg_stop_bit(volatile uart_t* reg){
     return (reg->FRAME_CONFIG_REG >> 5) & 0x1;
 }
-inline void set_uart_frame_config_reg_stop_bit(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_frame_config_reg_stop_bit(volatile uart_t* reg, uint8_t value){
     reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5);
 }
 
 //UART_STATUS_REG
-inline uint32_t get_uart_status_reg(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg(volatile uart_t* reg){
      return reg->STATUS_REG;
 }
-inline void set_uart_status_reg(volatile uart_t* reg, uint32_t value){
+static inline void set_uart_status_reg(volatile uart_t* reg, uint32_t value){
      reg->STATUS_REG = value;
 }
-inline uint32_t get_uart_status_reg_read_error(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_read_error(volatile uart_t* reg){
     return (reg->STATUS_REG >> 0) & 0x1;
 }
-inline uint32_t get_uart_status_reg_stall(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_stall(volatile uart_t* reg){
     return (reg->STATUS_REG >> 1) & 0x1;
 }
-inline uint32_t get_uart_status_reg_break_line(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_break_line(volatile uart_t* reg){
     return (reg->STATUS_REG >> 8) & 0x1;
 }
-inline uint32_t get_uart_status_reg_break_detected(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_break_detected(volatile uart_t* reg){
     return (reg->STATUS_REG >> 9) & 0x1;
 }
-inline void set_uart_status_reg_break_detected(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_status_reg_break_detected(volatile uart_t* reg, uint8_t value){
     reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9);
 }
-inline uint32_t get_uart_status_reg_set_break(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_set_break(volatile uart_t* reg){
     return (reg->STATUS_REG >> 10) & 0x1;
 }
-inline void set_uart_status_reg_set_break(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_status_reg_set_break(volatile uart_t* reg, uint8_t value){
     reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10);
 }
-inline uint32_t get_uart_status_reg_clear_break(volatile uart_t* reg){
+static inline uint32_t get_uart_status_reg_clear_break(volatile uart_t* reg){
     return (reg->STATUS_REG >> 11) & 0x1;
 }
-inline void set_uart_status_reg_clear_break(volatile uart_t* reg, uint8_t value){
+static inline void set_uart_status_reg_clear_break(volatile uart_t* reg, uint8_t value){
     reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11);
 }
 

include/minres/devices/gpio.h

@@ -4,7 +4,7 @@
 #include <stdint.h>
 #include "gen/gpio.h"
 
-inline void gpio_init(volatile gpio_t* reg) {
+static inline void gpio_init(volatile gpio_t* reg) {
     set_gpio_write(reg, 0);
     set_gpio_writeEnable(reg, 0);
 }

include/minres/devices/timer.h

@@ -4,15 +4,15 @@
 #include <stdint.h>
 #include "gen/timercounter.h"
 
-inline void prescaler_init(timercounter_t* reg, uint16_t value){
+static inline void prescaler_init(timercounter_t* reg, uint16_t value){
     set_timercounter_prescaler(reg, value);
 }
 
-inline void timer_t0__init(timercounter_t *reg){
+static inline void timer_t0__init(timercounter_t *reg){
     set_timercounter_t0_overflow(reg, 0xffffffff);
 }
 
-inline void timer_t1__init(timercounter_t *reg){
+static inline void timer_t1__init(timercounter_t *reg){
     set_timercounter_t1_overflow(reg, 0xffffffff);
 }
 

include/minres/devices/uart.h

@@ -21,7 +21,7 @@ static inline void uart_write(volatile uart_t* reg, uint8_t data){
     set_uart_rx_tx_reg_data(reg, data);
 }
 
-static inline inline uint8_t uart_read(volatile uart_t* reg){
+static inline uint8_t uart_read(volatile uart_t* reg){
     uint32_t res = get_uart_rx_tx_reg_data(reg);
     while((res&0x10000) == 0) res = get_uart_rx_tx_reg_data(reg);
     return res;

libwrap/CMakeLists.txt

@@ -36,5 +36,6 @@ foreach(FILE ${LIB_SOURCES})
 endforeach()
 
 add_library(wrap STATIC ${LIB_SOURCES} ../env/${BOARD_BASE}/bsp_write.c ../env/${BOARD_BASE}/bsp_read.c)
+target_include_directories(wrap PUBLIC ../include)
 target_link_options(wrap INTERFACE ${WRAP_ARGS})
 

libwrap/sys/_exit.c

@@ -1,7 +1,9 @@
 /* See LICENSE of license details. */
 
 #include "weak_under_alias.h"
+//#include <stdint.h>
 #include <unistd.h>
+#include <stdint.h>
 #if defined(SEMIHOSTING)
 #include "semihosting.h"
 #endif
@@ -17,19 +19,17 @@ extern volatile uint32_t fromhost;
 void write_hex(int fd, uint32_t hex);
 
 void __wrap_exit(int code) {
-  /*#if defined(SEMIHOSTING)
-    sh_exit();
-    return;
-  #endif*/
+
   // volatile uint32_t* leds = (uint32_t*) (GPIO_BASE_ADDR + GPIO_OUT_OFFSET);
   const char message[] = "\nProgam has exited with code:";
   //*leds = (~(code));
-
   write(STDERR_FILENO, message, sizeof(message) - 1);
   write_hex(STDERR_FILENO, code);
   write(STDERR_FILENO, "\n", 1);
-  tohost = code + 1;
+  write(STDERR_FILENO, "\n", 1);
+  //  tohost = (code << 1) + 1; // here used to stop simulation
   write(STDERR_FILENO, "\x04", 1);
+
   for (;;)
     ;
 }