2024-01-13 23:06:01 +01:00
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#ifndef _BSP_QSPI_H
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#define _BSP_QSPI_H
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#include <stdint.h>
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2024-02-22 17:09:35 +01:00
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#include "gen/Apb3SpiXdrMasterCtrl.h"
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2024-01-13 23:06:01 +01:00
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2024-02-22 17:09:35 +01:00
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#define qspi_t apb3spixdrmasterctrl_t
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typedef struct {
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uint32_t cpol;
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uint32_t cpha;
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uint32_t mode;
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uint32_t clkDivider;
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uint32_t ssSetup;
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uint32_t ssHold;
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uint32_t ssDisable;
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} spi_cfg;
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#define SPI_CMD_WRITE (1 << 8)
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#define SPI_CMD_READ (1 << 9)
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#define SPI_CMD_SS (1 << 11)
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#define SPI_RSP_VALID (1 << 31)
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#define SPI_STATUS_CMD_INT_ENABLE = (1 << 0)
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#define SPI_STATUS_RSP_INT_ENABLE = (1 << 1)
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#define SPI_STATUS_CMD_INT_FLAG = (1 << 8)
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#define SPI_STATUS_RSP_INT_FLAG = (1 << 9)
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static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){
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reg->CONFIG = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
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reg->SCLK_CONFIG = config->clkDivider;
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reg->SSGEN_SETUP = config->ssSetup;
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reg->SSGEN_HOLD = config->ssHold;
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reg->SSGEN_DISABLE = config->ssDisable;
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}
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static inline void spi_init(volatile qspi_t* spi){
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spi_cfg spiCfg;
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spiCfg.cpol = 0;
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spiCfg.cpha = 0;
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spiCfg.mode = 0;
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spiCfg.clkDivider = 2;
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spiCfg.ssSetup = 2;
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spiCfg.ssHold = 2;
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spiCfg.ssDisable = 2;
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spi_configure(spi, &spiCfg);
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}
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static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){
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return reg->STATUS & 0xFFFF;
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}
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static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){
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return reg->STATUS >> 16;
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}
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static inline void spi_write(volatile qspi_t* reg, uint8_t data){
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while(spi_cmd_avail(reg) == 0);
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reg->DATA = data | SPI_CMD_WRITE;
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}
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static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){
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while(spi_cmd_avail(reg) == 0);
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reg->DATA = data | SPI_CMD_READ | SPI_CMD_WRITE;
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while(spi_rsp_occupied(reg) == 0);
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return reg->DATA;
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}
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static inline uint8_t spi_read(volatile qspi_t* reg){
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while(spi_cmd_avail(reg) == 0);
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reg->DATA = SPI_CMD_READ;
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while(spi_rsp_occupied(reg) == 0);
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while((reg->DATA & 0x80000000)==0);
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return reg->DATA;
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}
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static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){
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while(spi_cmd_avail(reg) == 0);
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reg->DATA = slaveId | 0x80 | SPI_CMD_SS;
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}
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static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){
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while(spi_cmd_avail(reg) == 0);
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reg->DATA = slaveId | SPI_CMD_SS;
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}
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static inline void spi_wait_tx_idle(volatile qspi_t* reg){
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while(spi_cmd_avail(reg) < 0x20);
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}
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#endif /* _BSP_QSPI_H */
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