fixes hifive1 build

(number of XSPNs, batch size, iterations)

.gitmodules

@@ -0,0 +1,7 @@
+[submodule "cm"]
+        path = benchmarks/coremark/cm
+	url = https://github.com/eembc/coremark.git
+
+[submodule "benchmarks/coremark/cm"]
+	path = benchmarks/coremark/cm
+	url = https://github.com/eembc/coremark.git

CMakeLists.txt

@@ -0,0 +1,19 @@
+if (NOT DEFINED BOARD)
+	set(BOARD iss)
+endif()
+if (NOT DEFINED ISA)
+	set(ISA imc)
+endif()
+message(STATUS "Building firmware using ${BOARD} board configuration")
+add_custom_target(fw-hello-world ALL 
+	COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world BOARD=${BOARD} ISA=${ISA}
+	USES_TERMINAL
+	WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
+add_custom_target(fw-dhrystone ALL 
+	COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone BOARD=${BOARD} ISA=${ISA}
+    USES_TERMINAL
+    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
+add_custom_target(fw-coremark ALL 
+	COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark/cm PORT_DIR=../tgc BOARD=${BOARD} ISA=${ISA}
+    USES_TERMINAL
+    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})

bare-metal-bsp/.project

@@ -1,9 +1,8 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <projectDescription>
-	<name>fpga_spn</name>
+	<name>bare-metal-bsp</name>
 	<comment></comment>
 	<projects>
-		<project>bsp</project>
 	</projects>
 	<buildSpec>
 		<buildCommand>

bare-metal-bsp/env/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/TGC5L/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/TGC5L/init.c

@@ -0,0 +1,121 @@
+#include <stdint.h>
+#include <stdio.h>
+#include <unistd.h>
+
+#include "platform.h"
+#include "encoding.h"
+
+extern int main(int argc, char** argv);
+extern void trap_entry();
+
+static unsigned long mtime_lo(void)
+{
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
+}
+
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
+{
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
+}
+
+uint64_t get_timer_value()
+{
+  while (1) {
+    uint32_t hi = mtime_hi();
+    uint32_t lo = mtime_lo();
+    if (hi == mtime_hi())
+      return ((uint64_t)hi << 32) | lo;
+  }
+}
+
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
+{
+  return mtime_lo();
+}
+
+#endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
+}
+
+#ifdef USE_PLIC
+extern void handle_m_ext_interrupt();
+#endif
+
+#ifdef USE_M_TIME
+extern void handle_m_time_interrupt();
+#endif
+
+uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
+{
+  if (0){
+#ifdef USE_PLIC
+    // External Machine-Level interrupt from PLIC
+  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
+    handle_m_ext_interrupt();
+#endif
+#ifdef USE_M_TIME
+    // External Machine-Level interrupt from PLIC
+  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
+    handle_m_time_interrupt();
+#endif
+  }
+  else {
+    char* result = "trap 0\n";
+    result[5]=(mcause&0xff)+'0';
+    //write(1, "trap\n", 5);
+    write(1, result, 7);
+    _exit(1 + mcause);
+  }
+  return epc;
+}
+
+void _init()
+{
+  
+#ifndef NO_INIT
+  init_pll();
+  printf("core freq at %d Hz\n", get_cpu_freq());
+  write_csr(mtvec, &trap_entry);
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
+}
+
+void _fini()
+{
+}
+
+int is_uart_ready(int uart_id){
+    return 1;
+}
+int try_write_uart_char(int uart_id, char c){
+    *((char*)0x10000000) = c;
+    return 1;
+}
+void write_uart_char(int uart_id, char c){
+    *((char*)0x10000000) = c;
+}

bare-metal-bsp/env/TGC5L/link.lds

@@ -4,8 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  flash (rxai!w) : ORIGIN = 0x00000000, LENGTH = 256M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
+  ram (wxa!ri) :   ORIGIN = 0x20000000, LENGTH = 1M
 }
 
 PHDRS
@@ -19,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -118,6 +118,7 @@ SECTIONS
 
   .data          :
   {
+    __DATA_BEGIN__ = .;
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
   } >ram AT>flash :ram_init
@@ -134,6 +135,7 @@ SECTIONS
 
   .sdata          :
   {
+    __SDATA_BEGIN__ = .;
     *(.sdata .sdata.*)
     *(.gnu.linkonce.s.*)
   } >ram AT>flash :ram_init
@@ -155,6 +157,8 @@ SECTIONS
   } >ram AT>ram :ram
 
   . = ALIGN(8);
+  __BSS_END__ = .;
+  __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,  MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
   PROVIDE( _end = . );
   PROVIDE( end = . );
 
@@ -164,4 +168,7 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  PROVIDE( tohost = 0xfffffff0 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/TGC5L/platform.h

@@ -0,0 +1,32 @@
+// See LICENSE for license details.
+
+#ifndef _ISS_PLATFORM_H
+#define _ISS_PLATFORM_H
+
+// Some things missing from the official encoding.h
+#define MCAUSE_INT         0x80000000
+#define MCAUSE_CAUSE       0x7FFFFFFF
+
+#include "rtl/const.h"
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+#define MEM_BASE_ADDR _AC(0x00000000,UL)
+
+// Helper functions
+#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
+
+// Misc
+
+#include <stdint.h>
+
+void init_pll(void);
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+int is_uart_ready(int uart_id);
+int try_write_uart_char(int uart_id, char);
+void write_uart_char(int uart_id, char);
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/env/common-clang.mk

@@ -22,7 +22,7 @@ INCLUDES += -I$(BSP_BASE)/drivers/
 INCLUDES += -I$(ENV_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin
+TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
 
 LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
 LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
@@ -40,15 +40,17 @@ CFLAGS += -march=$(RISCV_ARCH)
 CFLAGS += -mabi=$(RISCV_ABI)
 CFLAGS += -mcmodel=medany
 
-TRIPLET?=riscv64-unknown-elf
+TRIPLET?=riscv32
-CXX=$(TOOL_DIR)/$(TRIPLET)-c++
+CXX=$(LLVM_TOOL_DIR)clang++ --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-CC=$(TOOL_DIR)/$(TRIPLET)-gcc
+CC=$(LLVM_TOOL_DIR)clang --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-LD=$(TOOL_DIR)/$(TRIPLET)-gcc
+LD=$(TOOL_DIR)$(TRIPLET)-gcc
-AR=$(TOOL_DIR)/$(TRIPLET)-ar
+AR=$(TOOL_DIR)$(TRIPLET)-ar
+OBJDUMP := $(TOOL_DIR)/$(TRIPLET)-objdump
 
 
 $(TARGET): $(LINK_OBJS) $(LINK_DEPS)
 	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
+	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
 	
 $(ASM_OBJS): %.o: %.S $(HEADERS)
 	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
@@ -61,6 +63,10 @@ $(CXX_OBJS): %.o: %.cpp $(HEADERS)
 
 .PHONY: clean
 clean:
+	rm -f $(TARGET) $(LINK_OBJS)
+
+.PHONY: clean-all
+clean-all:
 	rm -f $(CLEAN_OBJS) $(LIBWRAP)
 
-endif # _SIFIVE_MK_COMMON
+endif

bare-metal-bsp/env/common-gcc.mk

@@ -1,13 +1,12 @@
-# See LICENSE for license details.
+ifndef _MK_COMMON
-
+_MK_COMMON := # defined
-ifndef _SIFIVE_MK_COMMON
-_SIFIVE_MK_COMMON := # defined
 
 .PHONY: all
 all: $(TARGET)
 
 include $(BSP_BASE)/libwrap/libwrap.mk
 
+BOARD?=iss
 ENV_DIR = $(BSP_BASE)/env
 PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
 
@@ -22,10 +21,12 @@ INCLUDES += -I$(BSP_BASE)/drivers/
 INCLUDES += -I$(ENV_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin
+TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
 
-LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
+LDFLAGS += -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
-LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
+LDFLAGS += -T $(LINKER_SCRIPT) -Wl,-Map=$(TARGET).map  -nostartfiles
+LDFLAGS += -L$(ENV_DIR)
+# --specs=nano.specs
 
 ASM_OBJS := $(ASM_SRCS:.S=.o)
 C_OBJS   := $(C_SRCS:.c=.o)
@@ -36,19 +37,27 @@ LINK_DEPS += $(LINKER_SCRIPT)
 
 CLEAN_OBJS += $(TARGET) $(LINK_OBJS)
 
-CFLAGS += -march=$(RISCV_ARCH)
+GCCVERSION = $(shell $(CC) --version | grep gcc | awk '{print($NF);}')
+ifeq ($(GCCVERSION),9.2)
+  CFLAGS += -march=$(RISCV_ARCH)
+else
+  CFLAGS += -march=$(RISCV_ARCH)_zicsr_zifencei
+endif
 CFLAGS += -mabi=$(RISCV_ABI)
 CFLAGS += -mcmodel=medany
+CFLAGS += -DBOARD_$(BOARD)
 
 TRIPLET?=riscv64-unknown-elf
-CXX=$(TOOL_DIR)/$(TRIPLET)-c++
+CXX=$(TOOL_DIR)$(TRIPLET)-c++
-CC=$(TOOL_DIR)/$(TRIPLET)-gcc
+CC=$(TOOL_DIR)$(TRIPLET)-gcc
-LD=$(TOOL_DIR)/$(TRIPLET)-gcc
+LD=$(TOOL_DIR)$(TRIPLET)-gcc
-AR=$(TOOL_DIR)/$(TRIPLET)-ar
+AR=$(TOOL_DIR)$(TRIPLET)-ar
+OBJDUMP := $(TOOL_DIR)$(TRIPLET)-objdump
 
 
 $(TARGET): $(LINK_OBJS) $(LINK_DEPS)
 	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
+	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
 	
 $(ASM_OBJS): %.o: %.S $(HEADERS)
 	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
@@ -63,4 +72,4 @@ $(CXX_OBJS): %.o: %.cpp $(HEADERS)
 clean:
 	rm -f $(CLEAN_OBJS) $(LIBWRAP)
 
-endif # _SIFIVE_MK_COMMON
+endif

bare-metal-bsp/env/entry.S

@@ -4,11 +4,10 @@
 #define ENTRY_S
 
 #include "encoding.h"
-#include "sifive/bits.h"
+#include "rtl/bits.h"
 
   .section      .text.entry	
   .align 2
-  .weak trap_entry
   .global trap_entry
 trap_entry:
   addi sp, sp, -32*REGBYTES
@@ -28,6 +27,7 @@ trap_entry:
   STORE x13, 13*REGBYTES(sp)
   STORE x14, 14*REGBYTES(sp)
   STORE x15, 15*REGBYTES(sp)
+#ifndef __riscv_abi_rve
   STORE x16, 16*REGBYTES(sp)
   STORE x17, 17*REGBYTES(sp)
   STORE x18, 18*REGBYTES(sp)
@@ -44,7 +44,7 @@ trap_entry:
   STORE x29, 29*REGBYTES(sp)
   STORE x30, 30*REGBYTES(sp)
   STORE x31, 31*REGBYTES(sp)
-
+#endif
   csrr a0, mcause
   csrr a1, mepc
   mv a2, sp
@@ -70,6 +70,7 @@ trap_entry:
   LOAD x13, 13*REGBYTES(sp)
   LOAD x14, 14*REGBYTES(sp)
   LOAD x15, 15*REGBYTES(sp)
+#ifndef __riscv_abi_rve
   LOAD x16, 16*REGBYTES(sp)
   LOAD x17, 17*REGBYTES(sp)
   LOAD x18, 18*REGBYTES(sp)
@@ -86,7 +87,7 @@ trap_entry:
   LOAD x29, 29*REGBYTES(sp)
   LOAD x30, 30*REGBYTES(sp)
   LOAD x31, 31*REGBYTES(sp)
-
+#endif
   addi sp, sp, 32*REGBYTES
   mret
 

bare-metal-bsp/env/hifive1/init.c

@@ -2,7 +2,7 @@
 #include <stdio.h>
 #include <unistd.h>
 
-#include "platform.h"
+#include "../hifive1/platform.h"
 #include "encoding.h"
 
 extern int main(int argc, char** argv);

bare-metal-bsp/env/iss/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/iss/init.c

@@ -1,4 +1,3 @@
-//See LICENSE for license details.
 #include <stdint.h>
 #include <stdio.h>
 #include <unistd.h>
@@ -9,38 +8,55 @@
 extern int main(int argc, char** argv);
 extern void trap_entry();
 
-static unsigned long get_cpu_freq()
+static unsigned long mtime_lo(void)
 {
-  return 65000000;
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
 }
 
-unsigned long get_timer_freq()
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
 {
-  return get_cpu_freq();
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
 }
 
 uint64_t get_timer_value()
 {
-#if __riscv_xlen == 32
   while (1) {
-    uint32_t hi = read_csr(mcycleh);
+    uint32_t hi = mtime_hi();
-    uint32_t lo = read_csr(mcycle);
+    uint32_t lo = mtime_lo();
-    if (hi == read_csr(mcycleh))
+    if (hi == mtime_hi())
       return ((uint64_t)hi << 32) | lo;
   }
-#else
-  return read_csr(mcycle);
-#endif
 }
 
-static void uart_init(size_t baud_rate)
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
 {
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
+  return mtime_lo();
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
 }
 
+#endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
+}
 
 #ifdef USE_PLIC
 extern void handle_m_ext_interrupt();
@@ -65,7 +81,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 #endif
   }
   else {
-    write(1, "Unhandled Trap:\n", 16);
+    write(1, "trap\n", 5);
     _exit(1 + mcause);
   }
   return epc;
@@ -73,13 +89,17 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 
 void _init()
 {
-  #ifndef NO_INIT
-  uart_init(115200);
   
+#ifndef NO_INIT
+  init_pll();
   printf("core freq at %d Hz\n", get_cpu_freq());
-
   write_csr(mtvec, &trap_entry);
-  #endif
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
 }
 
 void _fini()

bare-metal-bsp/env/iss/link.lds

@@ -4,8 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  flash (rxai!w) : ORIGIN = 0x00000020, LENGTH = 1M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
+  ram (wxa!ri) :   ORIGIN = 0x10000000, LENGTH = 16K
 }
 
 PHDRS
@@ -19,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -118,6 +118,7 @@ SECTIONS
 
   .data          :
   {
+    __DATA_BEGIN__ = .;
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
   } >ram AT>flash :ram_init
@@ -134,6 +135,7 @@ SECTIONS
 
   .sdata          :
   {
+    __SDATA_BEGIN__ = .;
     *(.sdata .sdata.*)
     *(.gnu.linkonce.s.*)
   } >ram AT>flash :ram_init
@@ -155,6 +157,8 @@ SECTIONS
   } >ram AT>ram :ram
 
   . = ALIGN(8);
+  __BSS_END__ = .;
+  __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,  MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
   PROVIDE( _end = . );
   PROVIDE( end = . );
 
@@ -164,4 +168,7 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  PROVIDE( tohost = 0xfffffff0 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/iss/platform.h

@@ -0,0 +1,30 @@
+// See LICENSE for license details.
+
+#ifndef _ISS_PLATFORM_H
+#define _ISS_PLATFORM_H
+
+// Some things missing from the official encoding.h
+#define MCAUSE_INT         0x80000000
+#define MCAUSE_CAUSE       0x7FFFFFFF
+
+#include "rtl/const.h"
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+#define MEM_BASE_ADDR _AC(0x00000000,UL)
+
+// Helper functions
+#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
+
+// Misc
+
+#include <stdint.h>
+
+void init_pll(void);
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/env/rtl/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/rtl/init.c

@@ -1,4 +1,3 @@
-//See LICENSE for license details.
 #include <stdint.h>
 #include <stdio.h>
 #include <unistd.h>
@@ -9,38 +8,55 @@
 extern int main(int argc, char** argv);
 extern void trap_entry();
 
-static unsigned long get_cpu_freq()
+static unsigned long mtime_lo(void)
 {
-  return 65000000;
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
 }
 
-unsigned long get_timer_freq()
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
 {
-  return get_cpu_freq();
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
 }
 
 uint64_t get_timer_value()
 {
-#if __riscv_xlen == 32
   while (1) {
-    uint32_t hi = read_csr(mcycleh);
+    uint32_t hi = mtime_hi();
-    uint32_t lo = read_csr(mcycle);
+    uint32_t lo = mtime_lo();
-    if (hi == read_csr(mcycleh))
+    if (hi == mtime_hi())
       return ((uint64_t)hi << 32) | lo;
   }
-#else
-  return read_csr(mcycle);
-#endif
 }
 
-static void uart_init(size_t baud_rate)
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
 {
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
+  return mtime_lo();
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
 }
 
+#endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
+}
 
 #ifdef USE_PLIC
 extern void handle_m_ext_interrupt();
@@ -65,7 +81,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 #endif
   }
   else {
-    write(1, "Unhandled Trap:\n", 16);
+    write(1, "trap\n", 5);
     _exit(1 + mcause);
   }
   return epc;
@@ -73,13 +89,17 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 
 void _init()
 {
-  #ifndef NO_INIT
-  uart_init(115200);
   
+#ifndef NO_INIT
+  init_pll();
   printf("core freq at %d Hz\n", get_cpu_freq());
-
   write_csr(mtvec, &trap_entry);
-  #endif
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
 }
 
 void _fini()

bare-metal-bsp/env/rtl/link.lds

@@ -4,8 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  flash (rxai!w) : ORIGIN = 0x00000000, LENGTH = 1M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 512K
+  ram (wxa!ri) :   ORIGIN = 0x10000000, LENGTH = 16K
 }
 
 PHDRS
@@ -19,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -104,11 +104,6 @@ SECTIONS
     KEEP (*(.dtors))
   } >flash AT>flash :flash
 
-  .except :
-  {
-  	*(.gcc_except_table.*)
-  } >flash AT>flash :flash
-  
   .lalign         :
   {
     . = ALIGN(4);
@@ -123,13 +118,14 @@ SECTIONS
 
   .data          :
   {
+    __DATA_BEGIN__ = .;
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
-    . = ALIGN(8);
+  } >ram AT>flash :ram_init
-    PROVIDE( __global_pointer$ = . + 0x800 );
+
-    *(.sdata .sdata.*)
+  .srodata        :
-    *(.gnu.linkonce.s.*)
+  {
-    . = ALIGN(8);
+    PROVIDE( _gp = . + 0x800 );
     *(.srodata.cst16)
     *(.srodata.cst8)
     *(.srodata.cst4)
@@ -137,6 +133,13 @@ SECTIONS
     *(.srodata .srodata.*)
   } >ram AT>flash :ram_init
 
+  .sdata          :
+  {
+    __SDATA_BEGIN__ = .;
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+  } >ram AT>flash :ram_init
+
   . = ALIGN(4);
   PROVIDE( _edata = . );
   PROVIDE( edata = . );
@@ -154,6 +157,8 @@ SECTIONS
   } >ram AT>ram :ram
 
   . = ALIGN(8);
+  __BSS_END__ = .;
+  __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,  MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
   PROVIDE( _end = . );
   PROVIDE( end = . );
 
@@ -163,4 +168,8 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  #PROVIDE( tohost = 0x00018000 );
+  PROVIDE( tohost = 0xfffffff0 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/rtl/platform.h

@@ -0,0 +1,30 @@
+// See LICENSE for license details.
+
+#ifndef _ISS_PLATFORM_H
+#define _ISS_PLATFORM_H
+
+// Some things missing from the official encoding.h
+#define MCAUSE_INT         0x80000000
+#define MCAUSE_CAUSE       0x7FFFFFFF
+
+#include "rtl/const.h"
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+#define MEM_BASE_ADDR _AC(0x00000000,UL)
+
+// Helper functions
+#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
+
+// Misc
+
+#include <stdint.h>
+
+void init_pll(void);
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/env/start.S

@@ -5,7 +5,12 @@
 	.type _start,@function
 
 _start:
-	la gp, _gp
+    la gp, trap_entry
+    csrw mtvec, gp
+.option push
+.option norelax
+    la gp, __global_pointer$
+.option pop
 	la sp, _sp
 
 	/* Load data section */
@@ -15,8 +20,8 @@ _start:
 	bgeu a1, a2, 2f
 1:
 	lw t0, (a0)
-	sw t0, (a1)
 	addi a0, a0, 4
+	sw t0, (a1)
 	addi a1, a1, 4
 	bltu a1, a2, 1b
 2:
@@ -32,10 +37,11 @@ _start:
 2:
 
 	/* Call global constructors */
+//#ifdef HAVE_INIT_FINI
 	la a0, __libc_fini_array
 	call atexit
 	call __libc_init_array
-
+//#endif
 #ifndef __riscv_float_abi_soft
 	/* Enable FPU */
 	li t0, MSTATUS_FS
@@ -51,4 +57,4 @@ _start:
 	li a0, 0
 	li a1, 0
 	call main
-	tail exit
+	tail _exit

bare-metal-bsp/env/tgc-vp/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/tgc-vp/init.c

@@ -1,4 +1,3 @@
-//See LICENSE for license details.
 #include <stdint.h>
 #include <stdio.h>
 #include <unistd.h>
@@ -9,28 +8,54 @@
 extern int main(int argc, char** argv);
 extern void trap_entry();
 
-static unsigned long get_cpu_freq()
+static unsigned long mtime_lo(void)
 {
-  return 65000000;
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
 }
 
-unsigned long get_timer_freq()
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
 {
-  return get_cpu_freq();
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
 }
 
 uint64_t get_timer_value()
 {
-#if __riscv_xlen == 32
   while (1) {
-    uint32_t hi = read_csr(mcycleh);
+    uint32_t hi = mtime_hi();
-    uint32_t lo = read_csr(mcycle);
+    uint32_t lo = mtime_lo();
-    if (hi == read_csr(mcycleh))
+    if (hi == mtime_hi())
       return ((uint64_t)hi << 32) | lo;
   }
-#else
+}
-  return read_csr(mcycle);
+
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
+{
+  return mtime_lo();
+}
+
 #endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
 }
 
 static void uart_init(size_t baud_rate)
@@ -41,7 +66,6 @@ static void uart_init(size_t baud_rate)
   UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
 }
 
-
 #ifdef USE_PLIC
 extern void handle_m_ext_interrupt();
 #endif
@@ -65,7 +89,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 #endif
   }
   else {
-    write(1, "Unhandled Trap:\n", 16);
+    write(1, "trap\n", 5);
     _exit(1 + mcause);
   }
   return epc;
@@ -73,13 +97,18 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 
 void _init()
 {
-  #ifndef NO_INIT
+  
+#ifndef NO_INIT
+  init_pll();
   uart_init(115200);
-
   printf("core freq at %d Hz\n", get_cpu_freq());
-
   write_csr(mtvec, &trap_entry);
-  #endif
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
 }
 
 void _fini()

bare-metal-bsp/env/tgc-vp/link.lds

@@ -4,9 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  /*flash (rxai!w) : ORIGIN = 0x00000000, LENGTH = 1M*/
+  flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 512M
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  ram (wxa!ri) :   ORIGIN = 0x80000000, LENGTH = 128K
-  ram (wxa!ri) :   ORIGIN = 0x80000000, LENGTH = 16K
 }
 
 PHDRS
@@ -20,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -119,6 +118,7 @@ SECTIONS
 
   .data          :
   {
+    __DATA_BEGIN__ = .;
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
   } >ram AT>flash :ram_init
@@ -135,6 +135,7 @@ SECTIONS
 
   .sdata          :
   {
+    __SDATA_BEGIN__ = .;
     *(.sdata .sdata.*)
     *(.gnu.linkonce.s.*)
   } >ram AT>flash :ram_init
@@ -156,6 +157,8 @@ SECTIONS
   } >ram AT>ram :ram
 
   . = ALIGN(8);
+  __BSS_END__ = .;
+  __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,  MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
   PROVIDE( _end = . );
   PROVIDE( end = . );
 
@@ -165,4 +168,7 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  PROVIDE( tohost = 0xfffffff0 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/tgc-vp/platform.h

@@ -1,22 +1,22 @@
 // See LICENSE for license details.
 
-#ifndef _SIFIVE_PLATFORM_H
+#ifndef _ISS_PLATFORM_H
-#define _SIFIVE_PLATFORM_H
+#define _ISS_PLATFORM_H
 
 // Some things missing from the official encoding.h
 #define MCAUSE_INT         0x80000000
 #define MCAUSE_CAUSE       0x7FFFFFFF
 
-#include "sifive/const.h"
+#include "tgc-vp/const.h"
-#include "sifive/devices/aon.h"
+#include "tgc-vp/devices/aon.h"
-#include "sifive/devices/clint.h"
+#include "tgc-vp/devices/clint.h"
-#include "sifive/devices/gpio.h"
+#include "tgc-vp/devices/gpio.h"
-#include "sifive/devices/otp.h"
+#include "tgc-vp/devices/otp.h"
-#include "sifive/devices/plic.h"
+#include "tgc-vp/devices/plic.h"
-#include "sifive/devices/prci.h"
+#include "tgc-vp/devices/prci.h"
-#include "sifive/devices/pwm.h"
+#include "tgc-vp/devices/pwm.h"
-#include "sifive/devices/spi.h"
+#include "tgc-vp/devices/spi.h"
-#include "sifive/devices/uart.h"
+#include "tgc-vp/devices/uart.h"
 
 /****************************************************************************
  * Platform definitions
@@ -119,15 +119,9 @@
 
 #include <stdint.h>
 
-#define NUM_GPIO 32
+void init_pll(void);
-
-#define PLIC_NUM_INTERRUPTS 52
-#define PLIC_NUM_PRIORITIES 7
-
-#include "hifive1.h"
-
 unsigned long get_cpu_freq(void);
 unsigned long get_timer_freq(void);
 uint64_t get_timer_value(void);
 
-#endif /* _SIFIVE_PLATFORM_H */
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/include/rtl/const.h

@@ -0,0 +1,27 @@
+#ifndef _RTL_CONST_H
+#define _RTL_CONST_H
+
+#ifdef __ASSEMBLER__
+#define _AC(X,Y)        X
+#define _AT(T,X)        X
+#else
+#define _AC(X,Y)        (X##Y)
+#define _AT(T,X)        ((T)(X))
+#endif /* !__ASSEMBLER__*/
+
+#define _BITUL(x)       (_AC(1,UL) << (x))
+#define _BITULL(x)      (_AC(1,ULL) << (x))
+
+#define UART0_BASE_ADDR 0xffff0000ULL
+
+#define UART_REG_TXFIFO         0x00
+#define UART_REG_RXFIFO         0x04
+#define UART_REG_TXCTRL         0x08
+#define UART_REG_RXCTRL         0x0c
+#define UART_REG_IE             0x10
+#define UART_REG_IP             0x14
+#define UART_REG_DIV            0x18
+#define UART_TXEN               0x1
+
+#define UART0_REG(ADDR) *((volatile uint32_t*) (UART0_BASE_ADDR + ADDR))
+#endif /* _RTL_CONST_H */

bare-metal-bsp/include/tgc-vp/devices/plic.h

@@ -3,7 +3,7 @@
 #ifndef PLIC_H
 #define PLIC_H
 
-#include <sifive/const.h>
+#include <tgc-vp/const.h>
 
 // 32 bits per source
 #define PLIC_PRIORITY_OFFSET            _AC(0x0000,UL)

bare-metal-bsp/libwrap/libwrap.mk

@@ -1,7 +1,5 @@
-# See LICENSE for license details.
+ifndef _MK_LIBWRAP
-
+_MK_LIBWRAP := # defined
-ifndef _SIFIVE_MK_LIBWRAP
-_SIFIVE_MK_LIBWRAP := # defined
 
 LIBWRAP_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
 LIBWRAP_DIR := $(LIBWRAP_DIR:/=)
@@ -27,22 +25,42 @@ LIBWRAP_SRCS := \
 	sys/sbrk.c \
 	sys/_exit.c \
 	sys/puts.c \
-	misc/write_hex.c
+	misc/write_hex.c \
+	sys/printf.c
 
 LIBWRAP_SRCS := $(foreach f,$(LIBWRAP_SRCS),$(LIBWRAP_DIR)/$(f))
 LIBWRAP_OBJS := $(LIBWRAP_SRCS:.c=.o)
 
-LIBWRAP_SYMS := malloc free \
+LIBWRAP_SYMS := \
-	open lseek read write fstat stat close link unlink \
+	malloc \
-	execve fork getpid kill wait \
+	open \
-	isatty times sbrk _exit puts
+	lseek _lseek\
+	read _read\
+	write _write\
+	fstat _fstat\
+	stat \
+	close _close\
+	link \
+	unlink \
+	execve \
+	fork \
+	getpid \
+	kill \
+	wait \
+	isatty \
+	times \
+	sbrk _sbrk\
+	exit _exit \
+	puts _puts\
+	printf \
+	sprintf
 
 LIBWRAP := libwrap.a
 
 LINK_DEPS += $(LIBWRAP)
 
 LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
-LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
+#LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
 LDFLAGS += -L. -Wl,--start-group -lwrap -lc -Wl,--end-group
 
 CLEAN_OBJS += $(LIBWRAP_OBJS)
@@ -53,4 +71,4 @@ $(LIBWRAP_OBJS): %.o: %.c $(HEADERS)
 $(LIBWRAP): $(LIBWRAP_OBJS)
 	$(AR) rcs $@ $^
 
-endif # _SIFIVE_MK_LIBWRAP
+endif # _MK_LIBWRAP

bare-metal-bsp/libwrap/misc/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/stdlib/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/sys/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/sys/_exit.c

@@ -2,8 +2,19 @@
 
 #include <unistd.h>
 #include "platform.h"
+#include "weak_under_alias.h"
 
-void __wrap__exit(int code)
+#if defined(BOARD_hifive1)
+static volatile uint32_t tohost;
+static volatile uint32_t fromhost;
+#else
+extern volatile uint32_t tohost;
+extern volatile uint32_t fromhost;
+#endif
+
+void write_hex(int fd, uint32_t hex);
+
+void __wrap_exit(int code)
 {
 //volatile uint32_t* leds = (uint32_t*) (GPIO_BASE_ADDR + GPIO_OUT_OFFSET);
   const char message[] = "\nProgam has exited with code:";
@@ -12,6 +23,8 @@ void __wrap__exit(int code)
   write(STDERR_FILENO, message, sizeof(message) - 1);
   write_hex(STDERR_FILENO, code);
   write(STDERR_FILENO, "\n", 1);
-
+  tohost = code+1;
+  write(STDERR_FILENO, "\x04", 1);
   for (;;);
 }
+weak_under_alias(exit);

bare-metal-bsp/libwrap/sys/close.c

@@ -8,4 +8,6 @@ int __wrap_close(int fd)
 {
   return _stub(EBADF);
 }
+
 weak_under_alias(close);
+

bare-metal-bsp/libwrap/sys/fstat.c

@@ -15,4 +15,5 @@ int __wrap_fstat(int fd, struct stat* st)
 
   return _stub(EBADF);
 }
+
 weak_under_alias(fstat);

bare-metal-bsp/libwrap/sys/lseek.c

@@ -13,4 +13,6 @@ off_t __wrap_lseek(int fd, off_t ptr, int dir)
 
   return _stub(EBADF);
 }
+
 weak_under_alias(lseek);
+

bare-metal-bsp/libwrap/sys/printf.c

@@ -14,6 +14,13 @@ int putchar(int ch)
   return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
 }
 
+size_t strnlen (const char *str, size_t n)
+{
+  const char *start = str;
+  while (n-- > 0 && *str) str++;
+  return str - start;
+}
+
 static void sprintf_putch(int ch, void** data)
 {
   char** pstr = (char**)data;

bare-metal-bsp/libwrap/sys/read.c

@@ -0,0 +1,38 @@
+/* See LICENSE of license details. */
+
+#include <stdint.h>
+#include <errno.h>
+#include <unistd.h>
+#include <sys/types.h>
+
+#include "platform.h"
+#include "stub.h"
+#include "weak_under_alias.h"
+
+ssize_t __wrap_read(int fd, void* ptr, size_t len)
+{
+#if defined(BOARD_hifive1)
+    uint8_t * current = (uint8_t *)ptr;
+    volatile uint32_t * uart_rx = (uint32_t *)(UART0_CTRL_ADDR + UART_REG_RXFIFO);
+    volatile uint8_t * uart_rx_cnt = (uint8_t *)(UART0_CTRL_ADDR + UART_REG_RXCTRL + 2);
+#else
+    uint8_t * current = (uint8_t *)ptr;
+    volatile uint32_t * uart_rx = (uint32_t *)(UART0_BASE_ADDR + UART_REG_RXFIFO);
+    volatile uint8_t * uart_rx_cnt = (uint8_t *)(UART0_BASE_ADDR + UART_REG_RXCTRL + 2);
+#endif
+
+    ssize_t result = 0;
+
+    if (isatty(fd)) {
+        for (current = (uint8_t *)ptr;
+                (current < ((uint8_t *)ptr) + len) && (*uart_rx_cnt > 0);
+                current ++) {
+            *current = *uart_rx;
+            result++;
+        }
+        return result;
+    }
+    return _stub(EBADF);
+}
+weak_under_alias(read);
+

bare-metal-bsp/libwrap/sys/sbrk.c

@@ -15,4 +15,5 @@ void *__wrap_sbrk(ptrdiff_t incr)
   curbrk += incr;
   return curbrk - incr;
 }
+
 weak_under_alias(sbrk);

benchmarks/coremark/tgc/core_portme.c

@@ -0,0 +1,197 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Original Author: Shay Gal-on
+*/
+#include "coremark.h"
+#include "core_portme.h"
+//Read cycle CSR
+unsigned long long _read_cycle()
+{
+    unsigned long long result;
+    unsigned long lower;
+    unsigned long upper1;
+    unsigned long upper2;
+
+    asm volatile (
+        "repeat_cycle_%=: csrr %0, cycleh;\n"
+        "        csrr %1, cycle;\n"
+        "        csrr %2, cycleh;\n"
+        "        bne %0, %2, repeat_cycle_%=;\n"
+        : "=r" (upper1),"=r" (lower),"=r" (upper2)    // Outputs   : temp variable for load result
+        :
+        :
+    );
+    *(unsigned long *)(&result) = lower;
+    *((unsigned long *)(&result)+1) = upper1;
+
+    return result;
+}
+
+volatile int tohost;
+volatile int fromhost;
+
+void exit(int n){
+      tohost = 0x1;
+      for (;;);
+}
+
+void __libc_init_array (void) {
+/*
+    size_t count;
+    size_t i;
+    count = __preinit_array_end - __preinit_array_start;
+    for (i = 0; i < count; i++)
+        __preinit_array_start[i] ();
+
+#ifdef HAVE_INIT_FINI
+    _init ();
+#endif
+
+    count = __init_array_end - __init_array_start;
+    for (i = 0; i < count; i++)
+    __init_array_start[i] ();
+*/
+}
+#if VALIDATION_RUN
+volatile ee_s32 seed1_volatile = 0x3415;
+volatile ee_s32 seed2_volatile = 0x3415;
+volatile ee_s32 seed3_volatile = 0x66;
+#endif
+#if PERFORMANCE_RUN
+volatile ee_s32 seed1_volatile = 0x0;
+volatile ee_s32 seed2_volatile = 0x0;
+volatile ee_s32 seed3_volatile = 0x66;
+#endif
+#if PROFILE_RUN
+volatile ee_s32 seed1_volatile = 0x8;
+volatile ee_s32 seed2_volatile = 0x8;
+volatile ee_s32 seed3_volatile = 0x8;
+#endif
+volatile ee_s32 seed4_volatile = ITERATIONS;
+volatile ee_s32 seed5_volatile = 0;
+/* Porting : Timing functions
+        How to capture time and convert to seconds must be ported to whatever is
+   supported by the platform. e.g. Read value from on board RTC, read value from
+   cpu clock cycles performance counter etc. Sample implementation for standard
+   time.h and windows.h definitions included.
+*/
+CORETIMETYPE
+barebones_clock()
+{
+    return (CORETIMETYPE)_read_cycle();
+}
+/* Define : TIMER_RES_DIVIDER
+        Divider to trade off timer resolution and total time that can be
+   measured.
+
+        Use lower values to increase resolution, but make sure that overflow
+   does not occur. If there are issues with the return value overflowing,
+   increase this value.
+        */
+#define GETMYTIME(_t)              (*_t = barebones_clock())
+#define MYTIMEDIFF(fin, ini)       ((fin) - (ini))
+#define TIMER_RES_DIVIDER          1
+#define SAMPLE_TIME_IMPLEMENTATION 1
+#define EE_TICKS_PER_SEC           (CLOCKS_PER_SEC / TIMER_RES_DIVIDER)
+
+/** Define Host specific (POSIX), or target specific global time variables. */
+static CORETIMETYPE start_time_val, stop_time_val;
+
+/* Function : start_time
+        This function will be called right before starting the timed portion of
+   the benchmark.
+
+        Implementation may be capturing a system timer (as implemented in the
+   example code) or zeroing some system parameters - e.g. setting the cpu clocks
+   cycles to 0.
+*/
+void
+start_time(void)
+{
+    GETMYTIME(&start_time_val);
+}
+/* Function : stop_time
+        This function will be called right after ending the timed portion of the
+   benchmark.
+
+        Implementation may be capturing a system timer (as implemented in the
+   example code) or other system parameters - e.g. reading the current value of
+   cpu cycles counter.
+*/
+void
+stop_time(void)
+{
+    GETMYTIME(&stop_time_val);
+}
+/* Function : get_time
+        Return an abstract "ticks" number that signifies time on the system.
+
+        Actual value returned may be cpu cycles, milliseconds or any other
+   value, as long as it can be converted to seconds by <time_in_secs>. This
+   methodology is taken to accomodate any hardware or simulated platform. The
+   sample implementation returns millisecs by default, and the resolution is
+   controlled by <TIMER_RES_DIVIDER>
+*/
+CORE_TICKS
+get_time(void)
+{
+    CORE_TICKS elapsed
+        = (CORE_TICKS)(MYTIMEDIFF(stop_time_val, start_time_val));
+    return elapsed;
+}
+/* Function : time_in_secs
+        Convert the value returned by get_time to seconds.
+
+        The <secs_ret> type is used to accomodate systems with no support for
+   floating point. Default implementation implemented by the EE_TICKS_PER_SEC
+   macro above.
+*/
+secs_ret
+time_in_secs(CORE_TICKS ticks)
+{
+    secs_ret retval = ((secs_ret)ticks) / (secs_ret)EE_TICKS_PER_SEC;
+    return retval;
+}
+
+ee_u32 default_num_contexts = 1;
+
+/* Function : portable_init
+        Target specific initialization code
+        Test for some common mistakes.
+*/
+void
+portable_init(core_portable *p, int *argc, char *argv[])
+{
+    if (sizeof(ee_ptr_int) != sizeof(ee_u8 *))
+    {
+        ee_printf(
+            "ERROR! Please define ee_ptr_int to a type that holds a "
+            "pointer!\n");
+    }
+    if (sizeof(ee_u32) != 4)
+    {
+        ee_printf("ERROR! Please define ee_u32 to a 32b unsigned type!\n");
+    }
+    p->portable_id = 1;
+}
+/* Function : portable_fini
+        Target specific final code
+*/
+void
+portable_fini(core_portable *p)
+{
+    p->portable_id = 0;
+}

benchmarks/coremark/tgc/core_portme.h

@@ -0,0 +1,210 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Original Author: Shay Gal-on
+*/
+/* Topic : Description
+        This file contains configuration constants required to execute on
+   different platforms
+*/
+#ifndef CORE_PORTME_H
+#define CORE_PORTME_H
+/************************/
+/* Data types and settings */
+/************************/
+/* Configuration : HAS_FLOAT
+        Define to 1 if the platform supports floating point.
+*/
+#ifndef HAS_FLOAT
+#define HAS_FLOAT 0
+#endif
+/* Configuration : HAS_TIME_H
+        Define to 1 if platform has the time.h header file,
+        and implementation of functions thereof.
+*/
+#ifndef HAS_TIME_H
+#define HAS_TIME_H 0
+#endif
+/* Configuration : USE_CLOCK
+        Define to 1 if platform has the time.h header file,
+        and implementation of functions thereof.
+*/
+#ifndef USE_CLOCK
+#define USE_CLOCK 0
+#endif
+/* Configuration : HAS_STDIO
+        Define to 1 if the platform has stdio.h.
+*/
+#ifndef HAS_STDIO
+#define HAS_STDIO 0
+#endif
+/* Configuration : HAS_PRINTF
+        Define to 1 if the platform has stdio.h and implements the printf
+   function.
+*/
+#ifndef HAS_PRINTF
+#define HAS_PRINTF 0
+#endif
+
+/* Definitions : COMPILER_VERSION, COMPILER_FLAGS, MEM_LOCATION
+        Initialize these strings per platform
+*/
+#ifndef COMPILER_VERSION
+#ifdef __GNUC__
+#define COMPILER_VERSION "GCC"__VERSION__
+#else
+#define COMPILER_VERSION "Please put compiler version here (e.g. gcc 4.1)"
+#endif
+#endif
+#ifndef COMPILER_FLAGS
+#define COMPILER_FLAGS \
+    FLAGS_STR /* "Please put compiler flags here (e.g. -o3)" */
+#endif
+#ifndef MEM_LOCATION
+#define MEM_LOCATION "STACK"
+#endif
+
+/* Data Types :
+        To avoid compiler issues, define the data types that need ot be used for
+   8b, 16b and 32b in <core_portme.h>.
+
+        *Imprtant* :
+        ee_ptr_int needs to be the data type used to hold pointers, otherwise
+   coremark may fail!!!
+*/
+typedef signed short   ee_s16;
+typedef unsigned short ee_u16;
+typedef signed int     ee_s32;
+typedef double         ee_f32;
+typedef unsigned char  ee_u8;
+typedef unsigned int   ee_u32;
+typedef ee_u32         ee_ptr_int;
+typedef ee_u32         ee_size_t;
+#define NULL ((void *)0)
+/* align_mem :
+        This macro is used to align an offset to point to a 32b value. It is
+   used in the Matrix algorithm to initialize the input memory blocks.
+*/
+#define align_mem(x) (void *)(4 + (((ee_ptr_int)(x)-1) & ~3))
+
+/* Configuration : CORE_TICKS
+        Define type of return from the timing functions.
+ */
+#define CORETIMETYPE ee_u32
+typedef ee_u32 CORE_TICKS;
+
+/* Configuration : SEED_METHOD
+        Defines method to get seed values that cannot be computed at compile
+   time.
+
+        Valid values :
+        SEED_ARG - from command line.
+        SEED_FUNC - from a system function.
+        SEED_VOLATILE - from volatile variables.
+*/
+#ifndef SEED_METHOD
+#define SEED_METHOD SEED_VOLATILE
+#endif
+
+/* Configuration : MEM_METHOD
+        Defines method to get a block of memry.
+
+        Valid values :
+        MEM_MALLOC - for platforms that implement malloc and have malloc.h.
+        MEM_STATIC - to use a static memory array.
+        MEM_STACK - to allocate the data block on the stack (NYI).
+*/
+#ifndef MEM_METHOD
+#define MEM_METHOD MEM_STACK
+#endif
+
+/* Configuration : MULTITHREAD
+        Define for parallel execution
+
+        Valid values :
+        1 - only one context (default).
+        N>1 - will execute N copies in parallel.
+
+        Note :
+        If this flag is defined to more then 1, an implementation for launching
+   parallel contexts must be defined.
+
+        Two sample implementations are provided. Use <USE_PTHREAD> or <USE_FORK>
+   to enable them.
+
+        It is valid to have a different implementation of <core_start_parallel>
+   and <core_end_parallel> in <core_portme.c>, to fit a particular architecture.
+*/
+#ifndef MULTITHREAD
+#define MULTITHREAD 1
+#define USE_PTHREAD 0
+#define USE_FORK    0
+#define USE_SOCKET  0
+#endif
+
+/* Configuration : MAIN_HAS_NOARGC
+        Needed if platform does not support getting arguments to main.
+
+        Valid values :
+        0 - argc/argv to main is supported
+        1 - argc/argv to main is not supported
+
+        Note :
+        This flag only matters if MULTITHREAD has been defined to a value
+   greater then 1.
+*/
+#ifndef MAIN_HAS_NOARGC
+#define MAIN_HAS_NOARGC 0
+#endif
+
+/* Configuration : MAIN_HAS_NORETURN
+        Needed if platform does not support returning a value from main.
+
+        Valid values :
+        0 - main returns an int, and return value will be 0.
+        1 - platform does not support returning a value from main
+*/
+#ifndef MAIN_HAS_NORETURN
+#define MAIN_HAS_NORETURN 0
+#endif
+
+/* Variable : default_num_contexts
+        Not used for this simple port, must cintain the value 1.
+*/
+extern ee_u32 default_num_contexts;
+
+typedef struct CORE_PORTABLE_S
+{
+    ee_u8 portable_id;
+} core_portable;
+
+/* target specific init/fini */
+void portable_init(core_portable *p, int *argc, char *argv[]);
+void portable_fini(core_portable *p);
+
+#if !defined(PROFILE_RUN) && !defined(PERFORMANCE_RUN) \
+    && !defined(VALIDATION_RUN)
+#if (TOTAL_DATA_SIZE == 1200)
+#define PROFILE_RUN 1
+#elif (TOTAL_DATA_SIZE == 2000)
+#define PERFORMANCE_RUN 1
+#else
+#define VALIDATION_RUN 1
+#endif
+#endif
+
+int ee_printf(const char *fmt, ...);
+
+#endif /* CORE_PORTME_H */

benchmarks/coremark/tgc/core_portme.mak

@@ -0,0 +1,94 @@
+# Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# 
+# Original Author: Shay Gal-on
+
+#File : core_portme.mak
+ISA?=imc
+RISCV_ARCH:=rv32$(ISA)
+RISCV_ABI:=ilp32
+
+# Flag : OUTFLAG
+#	Use this flag to define how to to get an executable (e.g -o)
+OUTFLAG= -o
+# Flag : CC
+#	Use this flag to define compiler to use
+CC 		= riscv32-unknown-elf-gcc
+# Flag : LD
+#	Use this flag to define compiler to use
+LD		= riscv32-unknown-elf-gcc
+# Flag : AS
+#	Use this flag to define compiler to use
+AS		= riscv32-unknown-elf-as
+# Flag : CFLAGS
+#	Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags"
+PORT_CFLAGS = -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -O3 -DCLOCKS_PER_SEC=10000000 -nostdlib -nostartfiles -nodefaultlibs \
+ -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto
+FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
+CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" 
+#Flag : LFLAGS_END
+#	Define any libraries needed for linking or other flags that should come at the end of the link line (e.g. linker scripts). 
+#	Note : On certain platforms, the default clock_gettime implementation is supported but requires linking of librt.
+SEPARATE_COMPILE=1
+# Flag : SEPARATE_COMPILE
+# You must also define below how to create an object file, and how to link.
+OBJOUT 	= -o
+LFLAGS 	= 
+#--specs=nano.specs -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) 
+ASFLAGS =
+OFLAG 	= -o
+COUT 	= -c
+
+LFLAGS_END = 
+# Flag : PORT_SRCS
+# 	Port specific source files can be added here
+#	You may also need cvt.c if the fcvt functions are not provided as intrinsics by your compiler!
+PORT_SRCS = $(PORT_DIR)/core_portme.c $(PORT_DIR)/ee_printf.c
+vpath %.c $(PORT_DIR)
+vpath %.s $(PORT_DIR)
+PORT_OBJS = core_portme.o ee_printf.o
+# Flag : LOAD
+#	For a simple port, we assume self hosted compile and run, no load needed.
+
+# Flag : RUN
+#	For a simple port, we assume self hosted compile and run, simple invocation of the executable
+
+LOAD = echo ""
+RUN = echo ""
+
+OEXT = .o
+EXE = .elf
+
+$(OPATH)$(PORT_DIR)/%$(OEXT) : %.c
+	$(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@
+
+$(OPATH)%$(OEXT) : %.c
+	$(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@
+
+$(OPATH)$(PORT_DIR)/%$(OEXT) : %.s
+	$(AS) $(ASFLAGS) $< $(OBJOUT) $@
+
+# Target : port_pre% and port_post%
+# For the purpose of this simple port, no pre or post steps needed.
+
+.PHONY : port_prebuild port_postbuild port_prerun port_postrun port_preload port_postload
+port_pre% port_post% : 
+
+# FLAG : OPATH
+# Path to the output folder. Default - current folder.
+OPATH = ./
+MKDIR = mkdir -p
+
+dist-clean: clean
+	rm -f *.o