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149b3136d2
Author | SHA1 | Date | |
---|---|---|---|
149b3136d2 | |||
ac8f8b0539 | |||
b2cbf90d0b | |||
373145478e | |||
55b0cea94f | |||
5b17599aa2 | |||
4cfb15c7cd |
@ -79,10 +79,15 @@ public:
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}
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protected:
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using super::mov;
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using super::cmp;
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using super::get_ptr_for;
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using super::get_reg;
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using super::get_reg_Gp;
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using super::get_reg_for;
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using super::get_reg_for_Gp;
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using super::load_reg_from_mem;
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using super::load_reg_from_mem_Gp;
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using super::write_reg_to_mem;
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using super::gen_ext;
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using super::gen_read_mem;
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@ -90,6 +95,7 @@ using super::get_reg;
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using super::gen_wait;
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using super::gen_leave;
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using super::gen_operation;
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using super::gen_sync;
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using this_class = vm_impl<ARCH>;
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using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&);
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@ -155,10 +161,10 @@ private:
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}
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x86::Compiler& cc = jh.cc;
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cc.comment(fmt::format("${instr.name}_{:#x}:",pc.val).c_str());
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this->gen_sync(jh, PRE_SYNC, ${idx});
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cc.mov(jh.pc, pc.val);
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gen_sync(jh, PRE_SYNC, ${idx});
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mov(cc, jh.pc, pc.val);
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pc = pc+${instr.length/8};
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cc.mov(jh.next_pc, pc.val);
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mov(cc, jh.next_pc, pc.val);
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gen_instr_prologue(jh);
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cc.comment("//behavior:");
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@ -166,7 +172,7 @@ private:
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<%instr.behavior.eachLine{%>${it}
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<%}%>
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gen_instr_epilogue(jh);
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this->gen_sync(jh, POST_SYNC, ${idx});
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gen_sync(jh, POST_SYNC, ${idx});
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return returnValue;
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}
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<%}%>
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@ -176,12 +182,12 @@ private:
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continuation_e illegal_intruction(virt_addr_t &pc, code_word_t instr, jit_holder& jh ) {
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x86::Compiler& cc = jh.cc;
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cc.comment(fmt::format("illegal_intruction{:#x}:",pc.val).c_str());
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this->gen_sync(jh, PRE_SYNC, instr_descr.size());
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gen_sync(jh, PRE_SYNC, instr_descr.size());
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pc = pc + ((instr & 3) == 3 ? 4 : 2);
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gen_instr_prologue(jh);
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cc.comment("//behavior:");
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gen_instr_epilogue(jh);
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this->gen_sync(jh, POST_SYNC, instr_descr.size());
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gen_sync(jh, POST_SYNC, instr_descr.size());
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return BRANCH;
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}
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@ -277,9 +283,9 @@ void vm_impl<ARCH>::gen_instr_prologue(jit_holder& jh) {
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cc.comment("//gen_instr_prologue");
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cc.inc(get_ptr_for(jh, traits::ICOUNT));
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x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE);
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cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state);
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x86_reg_t current_trap_state = get_reg_for(cc, traits::TRAP_STATE);
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mov(cc, current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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mov(cc, get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state);
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}
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template <typename ARCH>
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@ -287,16 +293,16 @@ void vm_impl<ARCH>::gen_instr_epilogue(jit_holder& jh) {
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auto& cc = jh.cc;
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cc.comment("//gen_instr_epilogue");
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x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE);
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cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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cc.cmp(current_trap_state, 0);
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x86_reg_t current_trap_state = get_reg_for(cc, traits::TRAP_STATE);
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mov(cc, current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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cmp(cc, current_trap_state, 0);
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cc.jne(jh.trap_entry);
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}
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template <typename ARCH>
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void vm_impl<ARCH>::gen_block_prologue(jit_holder& jh){
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jh.pc = load_reg_from_mem(jh, traits::PC);
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jh.next_pc = load_reg_from_mem(jh, traits::NEXT_PC);
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jh.pc = load_reg_from_mem_Gp(jh, traits::PC);
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jh.next_pc = load_reg_from_mem_Gp(jh, traits::NEXT_PC);
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}
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template <typename ARCH>
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void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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@ -308,14 +314,14 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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this->write_back(jh);
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this->gen_sync(jh, POST_SYNC, -1);
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x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE);
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cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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x86::Gp current_trap_state = get_reg_for_Gp(cc, traits::TRAP_STATE);
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mov(cc, current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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x86::Gp current_pc = get_reg_for(jh, traits::PC);
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cc.mov(current_pc, get_ptr_for(jh, traits::PC));
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x86::Gp current_pc = get_reg_for_Gp(cc, traits::PC);
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mov(cc, current_pc, get_ptr_for(jh, traits::PC));
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x86::Gp instr = cc.newInt32("instr");
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cc.mov(instr, 0); // FIXME:this is not correct
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mov(cc, instr, 0); // FIXME:this is not correct, should be instrId of trapping instr
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cc.comment("//enter trap call;");
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InvokeNode* call_enter_trap;
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cc.invoke(&call_enter_trap, &enter_trap, FuncSignature::build<uint64_t, void*, uint64_t, uint64_t, uint64_t>());
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@ -324,21 +330,21 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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call_enter_trap->setArg(2, current_pc);
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call_enter_trap->setArg(3, instr);
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x86::Gp current_next_pc = get_reg_for(jh, traits::NEXT_PC);
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cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC));
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cc.mov(jh.next_pc, current_next_pc);
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x86_reg_t current_next_pc = get_reg_for(cc, traits::NEXT_PC);
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mov(cc, current_next_pc, get_ptr_for(jh, traits::NEXT_PC));
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mov(cc, jh.next_pc, current_next_pc);
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cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits<uint32_t>::max());
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mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits<uint32_t>::max());
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cc.ret(jh.next_pc);
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}
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template <typename ARCH>
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inline void vm_impl<ARCH>::gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) {
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auto& cc = jh.cc;
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cc.comment("//gen_raise");
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auto tmp1 = get_reg_for(jh, traits::TRAP_STATE);
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cc.mov(tmp1, 0x80ULL << 24 | (cause << 16) | trap_id);
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cc.mov(get_ptr_for(jh, traits::TRAP_STATE), tmp1);
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cc.mov(jh.next_pc, std::numeric_limits<uint32_t>::max());
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auto tmp1 = get_reg_for(cc, traits::TRAP_STATE);
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mov(cc, tmp1, 0x80ULL << 24 | (cause << 16) | trap_id);
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mov(cc, get_ptr_for(jh, traits::TRAP_STATE), tmp1);
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mov(cc, jh.next_pc, std::numeric_limits<uint32_t>::max());
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}
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} // namespace tgc5c
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 20217-2024 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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File diff suppressed because one or more lines are too long
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 20217-2024 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -2534,7 +2534,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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if(rs1 && rs1 < traits::RFS) {
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*NEXT_PC = *(X+(uint32_t)(rs1 ) % traits::RFS) & (uint32_t)(~ 1 );
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uint32_t addr_mask = (uint32_t)- 2;
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*NEXT_PC = *(X+(uint32_t)(rs1 ) % traits::RFS) & addr_mask;
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this->core.reg.last_branch = 1;
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}
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else {
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@ -2600,9 +2601,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
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}
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else {
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uint32_t addr_mask = (uint32_t)- 2;
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uint32_t new_pc = *(X+rs1);
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*(X+1) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)(2 ));
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*NEXT_PC = new_pc & (uint32_t)(~ 1 );
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*NEXT_PC = new_pc & addr_mask;
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this->core.reg.last_branch = 1;
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}
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}
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 2017, 2018 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -352,7 +352,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0) {
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@ -395,7 +395,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0) {
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@ -438,7 +438,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(imm%static_cast<uint32_t>(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0);
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@ -489,7 +489,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto addr_mask =this->gen_const(32,(uint32_t)- 2);
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@ -563,7 +563,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -620,7 +620,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -677,7 +677,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -738,7 +738,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -799,7 +799,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -856,7 +856,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
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@ -913,7 +913,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address =this->gen_ext(
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@ -968,7 +968,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address =this->gen_ext(
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@ -1023,7 +1023,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address =this->gen_ext(
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@ -1078,7 +1078,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address =this->gen_ext(
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@ -1131,7 +1131,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address =this->gen_ext(
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@ -1184,7 +1184,7 @@ private:
|
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address =this->gen_ext(
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@ -1234,7 +1234,7 @@ private:
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|
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address =this->gen_ext(
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@ -1284,7 +1284,7 @@ private:
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
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this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address =this->gen_ext(
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@ -1334,7 +1334,7 @@ private:
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
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this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1383,7 +1383,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1434,7 +1434,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1484,7 +1484,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1531,7 +1531,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1578,7 +1578,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1625,7 +1625,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1672,7 +1672,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1719,7 +1719,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1729,8 +1729,7 @@ private:
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true),
|
||||
this->gen_ext(this->gen_const(8,shamt), 32,false))
|
||||
),
|
||||
32, true),
|
||||
), 32,false),
|
||||
get_reg_ptr(rd + traits::X0), false);
|
||||
}
|
||||
}
|
||||
@ -1769,7 +1768,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1818,7 +1817,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1867,7 +1866,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1917,7 +1916,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1969,7 +1968,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2019,7 +2018,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2066,7 +2065,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2116,7 +2115,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2169,7 +2168,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2216,7 +2215,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2398,7 +2397,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrs1 =this->gen_reg_load(rs1+ traits::X0, 0);
|
||||
@ -2451,7 +2450,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd =this->gen_read_mem(traits::CSR, csr, 4);
|
||||
@ -2505,7 +2504,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd =this->gen_read_mem(traits::CSR, csr, 4);
|
||||
@ -2559,7 +2558,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd =this->gen_read_mem(traits::CSR, csr, 4);
|
||||
@ -2607,7 +2606,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd =this->gen_read_mem(traits::CSR, csr, 4);
|
||||
@ -2660,7 +2659,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd =this->gen_read_mem(traits::CSR, csr, 4);
|
||||
@ -2750,21 +2749,15 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res =this->gen_ext(
|
||||
(this->builder.CreateMul(
|
||||
auto res =this->builder.CreateMul(
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true),
|
||||
64, true), 128,true),
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true), 64,true),
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true),
|
||||
64, true), 128,true))
|
||||
),
|
||||
64, true);
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true), 64,true))
|
||||
;
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
this->gen_ext(
|
||||
@ -2808,21 +2801,15 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res =this->gen_ext(
|
||||
(this->builder.CreateMul(
|
||||
auto res =this->builder.CreateMul(
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true),
|
||||
64, true), 128,true),
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true), 64,true),
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true),
|
||||
64, true), 128,true))
|
||||
),
|
||||
64, true);
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true), 64,true))
|
||||
;
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
this->gen_ext(
|
||||
@ -2869,20 +2856,14 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res =this->gen_ext(
|
||||
(this->builder.CreateMul(
|
||||
auto res =this->builder.CreateMul(
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true),
|
||||
64, true), 128,true),
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0),
|
||||
64, false), 128,false))
|
||||
),
|
||||
64, true);
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true), 64,true),
|
||||
this->gen_ext(this->gen_reg_load(rs2+ traits::X0, 0), 64,false))
|
||||
;
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
this->gen_ext(
|
||||
@ -2929,19 +2910,13 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res =this->gen_ext(
|
||||
(this->builder.CreateMul(
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0),
|
||||
64, false), 128,false),
|
||||
this->gen_ext(this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0),
|
||||
64, false), 128,false))
|
||||
),
|
||||
64, false);
|
||||
auto res =this->builder.CreateMul(
|
||||
this->gen_ext(this->gen_reg_load(rs1+ traits::X0, 0), 64,false),
|
||||
this->gen_ext(this->gen_reg_load(rs2+ traits::X0, 0), 64,false))
|
||||
;
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
this->gen_ext(
|
||||
@ -2988,15 +2963,13 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto dividend =this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0),
|
||||
32, false);
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true);
|
||||
auto divisor =this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0),
|
||||
32, false);
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true);
|
||||
if(rd!=0){ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
|
||||
auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge);
|
||||
auto bb_else = BasicBlock::Create(this->mod->getContext(), "bb_else", this->func, bb_merge);
|
||||
@ -3087,7 +3060,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
|
||||
@ -3101,12 +3074,10 @@ private:
|
||||
{
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
this->gen_ext(
|
||||
(this->builder.CreateUDiv(
|
||||
this->builder.CreateUDiv(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0),
|
||||
this->gen_reg_load(rs2+ traits::X0, 0))
|
||||
),
|
||||
32, false),
|
||||
,
|
||||
get_reg_ptr(rd + traits::X0), false);
|
||||
}
|
||||
}
|
||||
@ -3157,7 +3128,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
|
||||
@ -3201,13 +3172,10 @@ private:
|
||||
this->gen_ext(
|
||||
(this->builder.CreateSRem(
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs1+ traits::X0, 0),
|
||||
32, false),
|
||||
this->gen_reg_load(rs1+ traits::X0, 0), 32,true),
|
||||
this->gen_ext(
|
||||
this->gen_reg_load(rs2+ traits::X0, 0),
|
||||
32, false))
|
||||
),
|
||||
32, true),
|
||||
this->gen_reg_load(rs2+ traits::X0, 0), 32,true))
|
||||
), 32,false),
|
||||
get_reg_ptr(rd + traits::X0), false);
|
||||
}
|
||||
}
|
||||
@ -3261,7 +3229,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk);
|
||||
@ -3338,7 +3306,7 @@ private:
|
||||
get_reg_ptr(rd+8 + traits::X0), false);
|
||||
}
|
||||
else{
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk);
|
||||
auto returnValue = std::make_tuple(CONT,bb);
|
||||
@ -3466,7 +3434,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0) {
|
||||
@ -3576,7 +3544,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -3619,7 +3587,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(imm==0||rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
if(rd!=0) {
|
||||
this->builder.CreateStore(
|
||||
@ -3669,7 +3637,7 @@ private:
|
||||
get_reg_ptr(2 + traits::X0), false);
|
||||
}
|
||||
else{
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk);
|
||||
auto returnValue = std::make_tuple(CONT,bb);
|
||||
@ -3695,7 +3663,7 @@ private:
|
||||
this->gen_set_pc(pc, traits::NEXT_PC);
|
||||
|
||||
/*generate behavior*/
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk);
|
||||
auto returnValue = std::make_tuple(CONT,bb);
|
||||
|
||||
@ -4154,7 +4122,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0) {
|
||||
@ -4200,7 +4168,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rd==0) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs =this->gen_ext(
|
||||
@ -4251,7 +4219,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -4292,9 +4260,10 @@ private:
|
||||
this->gen_set_pc(pc, traits::NEXT_PC);
|
||||
|
||||
/*generate behavior*/
|
||||
if(rs1&&rs1<static_cast<uint32_t>(traits::RFS)){ auto PC_val_v = this->builder.CreateAnd(
|
||||
if(rs1&&rs1<static_cast<uint32_t>(traits::RFS)){ auto addr_mask =this->gen_const(32,(uint32_t)- 2);
|
||||
auto PC_val_v = this->builder.CreateAnd(
|
||||
this->gen_reg_load(rs1%static_cast<uint32_t>(traits::RFS)+ traits::X0, 0),
|
||||
this->gen_const(32,~ 1))
|
||||
addr_mask)
|
||||
;
|
||||
this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false);
|
||||
this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false);
|
||||
@ -4360,7 +4329,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -4407,16 +4376,17 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto addr_mask =this->gen_const(32,(uint32_t)- 2);
|
||||
auto new_pc =this->gen_reg_load(rs1+ traits::X0, 0);
|
||||
this->builder.CreateStore(
|
||||
this->gen_const(32,(uint32_t)(PC+2)),
|
||||
get_reg_ptr(1 + traits::X0), false);
|
||||
auto PC_val_v = this->builder.CreateAnd(
|
||||
new_pc,
|
||||
this->gen_const(32,~ 1))
|
||||
addr_mask)
|
||||
;
|
||||
this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false);
|
||||
this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false);
|
||||
@ -4479,7 +4449,7 @@ private:
|
||||
|
||||
/*generate behavior*/
|
||||
if(rs2>=static_cast<uint32_t>(traits::RFS)) {
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs =this->gen_ext(
|
||||
@ -4517,7 +4487,7 @@ private:
|
||||
this->gen_set_pc(pc, traits::NEXT_PC);
|
||||
|
||||
/*generate behavior*/
|
||||
this->gen_raise_trap(0, 2);
|
||||
this->gen_raise_trap(0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk);
|
||||
auto returnValue = std::make_tuple(CONT,bb);
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*******************************************************************************
|
||||
* Copyright (C) 2020 MINRES Technologies GmbH
|
||||
* Copyright (C) 2020-2024 MINRES Technologies GmbH
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -346,7 +346,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -381,7 +381,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -416,7 +416,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0);
|
||||
@ -459,7 +459,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
|
||||
@ -510,7 +510,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_EQ,
|
||||
@ -553,7 +553,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_NE,
|
||||
@ -596,7 +596,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_SLT,
|
||||
@ -639,7 +639,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_SGE,
|
||||
@ -682,7 +682,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_ULT,
|
||||
@ -725,7 +725,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_UGE,
|
||||
@ -768,7 +768,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto load_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -808,7 +808,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto load_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -848,7 +848,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto load_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -888,7 +888,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto load_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -928,7 +928,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto load_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -968,7 +968,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto store_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -1004,7 +1004,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto store_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -1040,7 +1040,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto store_address = tu.assignment(tu.ext((tu.add(
|
||||
@ -1076,7 +1076,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1114,7 +1114,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1152,7 +1152,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1190,7 +1190,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1228,7 +1228,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1266,7 +1266,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1304,7 +1304,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1342,7 +1342,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1380,7 +1380,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1418,7 +1418,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1456,7 +1456,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1494,7 +1494,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1534,7 +1534,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1572,7 +1572,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1610,7 +1610,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1648,7 +1648,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1688,7 +1688,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1728,7 +1728,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1766,7 +1766,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -1922,7 +1922,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
|
||||
@ -1963,7 +1963,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
|
||||
@ -2006,7 +2006,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
|
||||
@ -2049,7 +2049,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
|
||||
@ -2087,7 +2087,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
|
||||
@ -2129,7 +2129,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
|
||||
@ -2199,12 +2199,12 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = tu.assignment(tu.ext((tu.mul(
|
||||
tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,true),
|
||||
tu.ext(tu.ext(tu.load(rs2+ traits::X0, 0),32,true),64,true))),64,true),64);
|
||||
auto res = tu.assignment(tu.mul(
|
||||
tu.ext(tu.load(rs1+ traits::X0, 0),32,true),
|
||||
tu.ext(tu.load(rs2+ traits::X0, 0),32,true)),64);
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
tu.ext(res,32,false));
|
||||
@ -2238,12 +2238,12 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = tu.assignment(tu.ext((tu.mul(
|
||||
tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,true),
|
||||
tu.ext(tu.ext(tu.load(rs2+ traits::X0, 0),32,true),64,true))),64,true),64);
|
||||
auto res = tu.assignment(tu.mul(
|
||||
tu.ext(tu.load(rs1+ traits::X0, 0),32,true),
|
||||
tu.ext(tu.load(rs2+ traits::X0, 0),32,true)),64);
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
tu.ext((tu.ashr(
|
||||
@ -2279,12 +2279,12 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = tu.assignment(tu.ext((tu.mul(
|
||||
tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,true),
|
||||
tu.ext(tu.load(rs2+ traits::X0, 0),64,false))),64,true),64);
|
||||
auto res = tu.assignment(tu.mul(
|
||||
tu.ext(tu.load(rs1+ traits::X0, 0),32,true),
|
||||
tu.load(rs2+ traits::X0, 0)),64);
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
tu.ext((tu.ashr(
|
||||
@ -2320,12 +2320,12 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = tu.assignment(tu.ext((tu.mul(
|
||||
tu.ext(tu.load(rs1+ traits::X0, 0),64,false),
|
||||
tu.ext(tu.load(rs2+ traits::X0, 0),64,false))),64,false),64);
|
||||
auto res = tu.assignment(tu.mul(
|
||||
tu.load(rs1+ traits::X0, 0),
|
||||
tu.load(rs2+ traits::X0, 0)),64);
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
tu.ext((tu.lshr(
|
||||
@ -2361,7 +2361,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto dividend = tu.assignment(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),32);
|
||||
@ -2419,7 +2419,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_NE,
|
||||
@ -2427,9 +2427,9 @@ private:
|
||||
tu.constant(0,8)));
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
tu.ext((tu.udiv(
|
||||
tu.udiv(
|
||||
tu.load(rs1+ traits::X0, 0),
|
||||
tu.load(rs2+ traits::X0, 0))),32,false));
|
||||
tu.load(rs2+ traits::X0, 0)));
|
||||
}
|
||||
tu.open_else();
|
||||
if(rd!=0) {
|
||||
@ -2466,7 +2466,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_NE,
|
||||
@ -2527,7 +2527,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rs1>=static_cast<uint32_t>(traits:: RFS)||rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
tu.open_if(tu.icmp(ICmpInst::ICMP_NE,
|
||||
@ -2579,7 +2579,7 @@ private:
|
||||
tu.constant(imm,16))),32,false));
|
||||
}
|
||||
else{
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
auto returnValue = std::make_tuple(CONT);
|
||||
|
||||
@ -2671,7 +2671,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0) {
|
||||
@ -2760,7 +2760,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -2795,7 +2795,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(imm==0||rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
if(rd!=0) {
|
||||
tu.store(rd + traits::X0,
|
||||
@ -2833,7 +2833,7 @@ private:
|
||||
tu.constant((int16_t)sext<10>(nzimm),16))),32,false));
|
||||
}
|
||||
else{
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
auto returnValue = std::make_tuple(CONT);
|
||||
|
||||
@ -2857,7 +2857,7 @@ private:
|
||||
pc=pc+ 2;
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
auto returnValue = std::make_tuple(CONT);
|
||||
|
||||
tu.close_scope();
|
||||
@ -3197,7 +3197,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0) {
|
||||
@ -3234,7 +3234,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)||rd==0) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs = tu.assignment(tu.ext((tu.add(
|
||||
@ -3270,7 +3270,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -3303,9 +3303,10 @@ private:
|
||||
pc=pc+ 2;
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)){ auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
|
||||
if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)){ auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
|
||||
auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
|
||||
tu.load(rs1%static_cast<uint32_t>(traits:: RFS)+ traits::X0, 0),
|
||||
tu.constant(~ 1,32)),32);
|
||||
addr_mask),32);
|
||||
tu.store(traits::NEXT_PC, PC_val_v);
|
||||
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
|
||||
}
|
||||
@ -3361,7 +3362,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rd>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0) {
|
||||
@ -3397,15 +3398,16 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs1>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
|
||||
auto new_pc = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
|
||||
tu.store(1 + traits::X0,
|
||||
tu.constant((uint32_t)(PC+2),32));
|
||||
auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
|
||||
new_pc,
|
||||
tu.constant(~ 1,32)),32);
|
||||
addr_mask),32);
|
||||
tu.store(traits::NEXT_PC, PC_val_v);
|
||||
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
|
||||
}
|
||||
@ -3458,7 +3460,7 @@ private:
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
if(rs2>=static_cast<uint32_t>(traits:: RFS)) {
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs = tu.assignment(tu.ext((tu.add(
|
||||
@ -3487,7 +3489,7 @@ private:
|
||||
pc=pc+ 2;
|
||||
gen_set_pc(tu, pc, traits::NEXT_PC);
|
||||
tu.open_scope();
|
||||
this->gen_raise_trap(tu, 0, 2);
|
||||
this->gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
auto returnValue = std::make_tuple(CONT);
|
||||
|
||||
tu.close_scope();
|
||||
|
Loading…
Reference in New Issue
Block a user