Eyck Jentzsch
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67d9beb7bd
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reorganized layout to only contain risc-v stuff
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2019-06-11 16:49:37 +00:00 |
eyck
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f69b529cab
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Fixed implementation of RV64 so that remaining riscv-test pass
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2019-01-10 10:35:20 +00:00 |
Eyck Jentzsch
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58a446e6bc
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Refoctored to to move SystemC wrapper into riscv library
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2018-11-19 20:39:11 +01:00 |
Eyck Jentzsch
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20b3665003
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Back-ported DVCon turorial changes
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2018-11-12 19:36:44 +01:00 |
Eyck Jentzsch
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38099e3fc6
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Added ADC, H-Bridge and motor models, refactored project structure
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2018-07-28 09:45:49 +02:00 |
Eyck Jentzsch
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bd60e4dbe1
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Fixed missing check for unset CMAKE_BUILD_TYPE
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2018-07-10 18:25:14 +02:00 |
Eyck Jentzsch
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282ff6964b
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Fixed typo in CMakeList.txt
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2018-05-15 20:10:13 +02:00 |
Eyck Jentzsch
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dfcc3ace66
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Adapted generated code to support translation block linking
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2018-05-15 18:50:11 +02:00 |
Eyck Jentzsch
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bc7450dad2
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Added softfloat library into top level build system
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2018-04-24 10:26:55 +02:00 |
Eyck Jentzsch
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a690981957
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Updated CMake settings
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2018-03-28 10:29:45 +02:00 |
Eyck Jentzsch
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cb8b5e6d4b
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Fixed conen intergation in CMake and added '-march=native' switch
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2017-12-31 10:56:33 +00:00 |
Eyck Jentzsch
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b94d637177
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Added seasocks via conan
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2017-10-26 12:06:29 +02:00 |
Eyck Jentzsch
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0a42c9d2ea
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Added plic functionality
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2017-10-04 23:15:04 +02:00 |
Eyck Jentzsch
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d59dfa93f6
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Added git functions and updated cmake functions
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2017-10-04 16:13:49 +02:00 |
Eyck Jentzsch
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710d61e304
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Fixed target adapter to properly handle register reading
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2017-09-25 20:38:40 +02:00 |
Eyck Jentzsch
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b38319f9c2
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Applied clang-format
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2017-09-22 11:23:23 +02:00 |
Eyck Jentzsch
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9a617dab57
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Restructured project
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2017-09-21 20:29:23 +02:00 |
Eyck Jentzsch
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aa8c2138c6
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Added initial SystemC structure and removed easylogging
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2017-09-21 13:13:01 +02:00 |
Eyck Jentzsch
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4ee7118b70
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Initial commit
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2017-08-27 13:04:48 +02:00 |