fixes quantum and quantum break handling
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09db0cd35d
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@ -391,7 +391,10 @@ bool core_complex::read_mem(uint64_t addr, unsigned length, uint8_t *const data,
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if (lut_entry.get_granted_access() != tlm::tlm_dmi::DMI_ACCESS_NONE && addr + length <= lut_entry.get_end_address() + 1) {
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auto offset = addr - lut_entry.get_start_address();
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std::copy(lut_entry.get_dmi_ptr() + offset, lut_entry.get_dmi_ptr() + offset + length, data);
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quantum_keeper.inc(lut_entry.get_read_latency());
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if(is_fetch)
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ibus_inc+=lut_entry.get_read_latency()/curr_clk;
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else
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dbus_inc+=lut_entry.get_read_latency()/curr_clk;
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return true;
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} else {
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auto& sckt = is_fetch? ibus : dbus;
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@ -409,12 +412,17 @@ bool core_complex::read_mem(uint64_t addr, unsigned length, uint8_t *const data,
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auto preExt = new tlm::scc::scv::tlm_recording_extension(trc->tr_handle, this);
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gp.set_extension(preExt);
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}
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sckt->b_transport(gp, delay);
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auto incr = delay-quantum_keeper.get_local_time();
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if(is_fetch)
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ibus_inc+=incr;
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else
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dbus_inc+=incr;
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auto pre_delay = delay;
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dbus->b_transport(gp, delay);
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if(pre_delay>delay) {
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quantum_keeper.reset();
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} else {
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auto incr = (delay-quantum_keeper.get_local_time())/curr_clk;
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if(is_fetch)
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ibus_inc+=incr;
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else
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dbus_inc+=incr;
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}
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SCCTRACE(this->name()) << "[local time: "<<delay<<"]: finish read_mem(0x" << std::hex << addr << ") : 0x" << (length==4?*(uint32_t*)data:length==2?*(uint16_t*)data:(unsigned)*data);
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if (gp.get_response_status() != tlm::TLM_OK_RESPONSE) {
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return false;
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@ -439,7 +447,7 @@ bool core_complex::write_mem(uint64_t addr, unsigned length, const uint8_t *cons
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addr + length <= lut_entry.get_end_address() + 1) {
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auto offset = addr - lut_entry.get_start_address();
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std::copy(data, data + length, lut_entry.get_dmi_ptr() + offset);
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quantum_keeper.inc(lut_entry.get_read_latency());
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dbus_inc+=lut_entry.get_write_latency()/curr_clk;
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return true;
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} else {
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write_buf.resize(length);
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@ -455,8 +463,12 @@ bool core_complex::write_mem(uint64_t addr, unsigned length, const uint8_t *cons
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auto preExt = new tlm::scc::scv::tlm_recording_extension(trc->tr_handle, this);
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gp.set_extension(preExt);
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}
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auto pre_delay = delay;
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dbus->b_transport(gp, delay);
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dbus_inc+=delay-quantum_keeper.get_local_time();
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if(pre_delay>delay)
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quantum_keeper.reset();
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else
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dbus_inc+=(delay-quantum_keeper.get_local_time())/curr_clk;
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SCCTRACE() << "[local time: "<<delay<<"]: finish write_mem(0x" << std::hex << addr << ") : 0x" << (length==4?*(uint32_t*)data:length==2?*(uint16_t*)data:(unsigned)*data);
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if (gp.get_response_status() != tlm::TLM_OK_RESPONSE) {
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return false;
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@ -156,17 +156,21 @@ public:
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~core_complex();
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inline unsigned get_last_bus_cycles() {
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auto mem_incr = std::max(ibus_inc, dbus_inc);
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ibus_inc = dbus_inc = 0;
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return mem_incr>1?mem_incr:1;
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}
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inline void sync(uint64_t cycle) {
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auto core_inc = curr_clk * (cycle - last_sync_cycle);
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auto incr = std::max(core_inc, std::max(ibus_inc, dbus_inc));
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quantum_keeper.inc(incr);
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quantum_keeper.inc(core_inc);
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if (quantum_keeper.need_sync()) {
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wait(quantum_keeper.get_local_time());
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quantum_keeper.reset();
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}
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last_sync_cycle = cycle;
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ibus_inc = sc_core::SC_ZERO_TIME;
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dbus_inc = sc_core::SC_ZERO_TIME;
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}
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bool read_mem(uint64_t addr, unsigned length, uint8_t *const data, bool is_fetch);
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@ -198,7 +202,7 @@ protected:
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std::vector<uint8_t> write_buf;
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core_wrapper* cpu{nullptr};
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sc_core::sc_signal<sc_core::sc_time> curr_clk;
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sc_core::sc_time ibus_inc, dbus_inc;
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uint64_t ibus_inc{0}, dbus_inc{0};
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core_trace* trc{nullptr};
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std::unique_ptr<scc::tick2time> t2t;
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private:
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@ -39,8 +39,13 @@ public:
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uint64_t get_state() override { return this->state.mstatus.backing.val; }
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void notify_phase(iss::arch_if::exec_phase p) override {
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if (p == iss::arch_if::ISTART)
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if (p == iss::arch_if::ISTART && !first) {
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auto cycle_incr = owner->get_last_bus_cycles();
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if(cycle_incr>1)
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this->instr_if.update_last_instr_cycles(cycle_incr);
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owner->sync(this->instr_if.get_total_cycles());
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}
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first=false;
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}
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iss::sync_type needed_sync() const override { return iss::PRE_SYNC; }
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@ -175,8 +180,9 @@ public:
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private:
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sysc::tgfs::core_complex *const owner;
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sc_core::sc_event wfi_evt;
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uint64_t hostvar;
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uint64_t hostvar{std::numeric_limits<uint64_t>::max()};
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unsigned to_host_wr_cnt = 0;
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bool first{true};
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};
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}
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#endif /* _SYSC_SC_CORE_ADAPTER_H_ */
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