[WIP]
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@ -2,14 +2,14 @@ import "RISCVBase.core_desc"
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InsructionSet RV32M extends RISCVBase {
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constants {
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MAXLEN:=128
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MUL_LEN
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}
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instructions{
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MUL{
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encoding: b0000001 | rs2[4:0] | rs1[4:0] | b000 | rd[4:0] | b0110011;
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args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}";
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if(rd != 0){
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val res[MAXLEN] <= zext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN);
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val res[MUL_LEN] <= zext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN);
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X[rd]<= zext(res , XLEN);
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}
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}
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@ -17,7 +17,7 @@ InsructionSet RV32M extends RISCVBase {
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encoding: b0000001 | rs2[4:0] | rs1[4:0] | b001 | rd[4:0] | b0110011;
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args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}";
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if(rd != 0){
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val res[MAXLEN] <= sext(X[rs1], MAXLEN) * sext(X[rs2], MAXLEN);
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val res[MUL_LEN] <= sext(X[rs1], MUL_LEN) * sext(X[rs2], MUL_LEN);
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X[rd]<= zext(res >> XLEN, XLEN);
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}
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}
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@ -25,7 +25,7 @@ InsructionSet RV32M extends RISCVBase {
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encoding: b0000001 | rs2[4:0] | rs1[4:0] | b010 | rd[4:0] | b0110011;
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args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}";
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if(rd != 0){
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val res[MAXLEN] <= sext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN);
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val res[MUL_LEN] <= sext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN);
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X[rd]<= zext(res >> XLEN, XLEN);
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}
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}
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@ -33,7 +33,7 @@ InsructionSet RV32M extends RISCVBase {
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encoding: b0000001 | rs2[4:0] | rs1[4:0] | b011 | rd[4:0] | b0110011;
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args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}";
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if(rd != 0){
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val res[MAXLEN] <= zext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN);
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val res[MUL_LEN] <= zext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN);
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X[rd]<= zext(res >> XLEN, XLEN);
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}
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}
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