diff --git a/CMakeLists.txt b/CMakeLists.txt index cf6ceba..5ba99ea 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -61,11 +61,11 @@ set(LIB_SOURCES ${LIB_SOURCES} endif() # Define the library -add_library(riscv ${LIB_SOURCES}) -SET(riscv -Wl,-whole-archive -lriscv -Wl,-no-whole-archive) +add_library(riscv SHARED ${LIB_SOURCES}) target_compile_options(riscv PRIVATE -Wno-shift-count-overflow) target_include_directories(riscv PUBLIC incl ../external/elfio) -target_link_libraries(riscv PUBLIC softfloat dbt-core scc-util) +target_link_libraries(riscv PUBLIC softfloat scc-util) +target_link_libraries(riscv PUBLIC -Wl,--whole-archive dbt-core -Wl,--no-whole-archive) set_target_properties(riscv PROPERTIES VERSION ${PROJECT_VERSION} FRAMEWORK FALSE @@ -104,7 +104,6 @@ endif() # Links the target exe against the libraries target_link_libraries(riscv-sim riscv) target_link_libraries(riscv-sim jsoncpp) -target_link_libraries(riscv-sim dbt-core) target_link_libraries(riscv-sim external) target_link_libraries(riscv-sim ${Boost_LIBRARIES} ) if (Tcmalloc_FOUND) diff --git a/gen_input/RVF.core_desc b/gen_input/RVF.core_desc index f45fcb5..46443ee 100644 --- a/gen_input/RVF.core_desc +++ b/gen_input/RVF.core_desc @@ -10,7 +10,7 @@ InsructionSet RV32F extends RV32I{ instructions{ FLW { encoding: imm[11:0]s | rs1[4:0] | b010 | rd[4:0] | b0000111; - args_disass:"f{rd}, {imm}(x{rs1})"; + args_disass:"f{rd}, {imm}({name(rs1)})"; val offs[XLEN] <= X[rs1]'s + imm; val res[32] <= MEM[offs]{32}; if(FLEN==32) @@ -22,13 +22,13 @@ InsructionSet RV32F extends RV32I{ } FSW { encoding: imm[11:5]s | rs2[4:0] | rs1[4:0] | b010 | imm[4:0]s | b0100111; - args_disass:"f{rs2}, {imm}(x{rs1})"; + args_disass:"f{rs2}, {imm}({name(rs1)])"; val offs[XLEN] <= X[rs1]'s + imm; MEM[offs]{32}<=F[rs2]{32}; } FMADD.S { encoding: rs3[4:0] | b00 | rs2[4:0] | rs1[4:0] | rm[2:0] | rd[4:0] | b1000011; - args_disass:"x{rd}, f{rs1}, f{rs2}, f{rs3}"; + args_disass:"{name(rd)}, f{rs1}, f{rs2}, f{rs3}"; //F[rd]f<= F[rs1]f * F[rs2]f + F[rs3]f; if(FLEN==32) F[rd] <= fdispatch_fmadd_s(F[rs1], F[rs2], F[rs3], zext(0, 32), choose(rm<7, rm{8}, FCSR{8})); @@ -45,7 +45,7 @@ InsructionSet RV32F extends RV32I{ } FMSUB.S { encoding: rs3[4:0] | b00 | rs2[4:0] | rs1[4:0] | rm[2:0] | rd[4:0] | b1000111; - args_disass:"x{rd}, f{rs1}, f{rs2}, f{rs3}"; + args_disass:"{name(rd)}, f{rs1}, f{rs2}, f{rs3}"; //F[rd]f<=F[rs1]f * F[rs2]f - F[rs3]f; if(FLEN==32) F[rd] <= fdispatch_fmadd_s(F[rs1], F[rs2], F[rs3], zext(1, 32), choose(rm<7, rm{8}, FCSR{8})); @@ -62,7 +62,7 @@ InsructionSet RV32F extends RV32I{ } FNMADD.S { encoding: rs3[4:0] | b00 | rs2[4:0] | rs1[4:0] | rm[2:0] | rd[4:0] | b1001111; - args_disass:"x{rd}, f{rs1}, f{rs2}, f{rs3}"; + args_disass:"name(rd), f{rs1}, f{rs2}, f{rs3}"; //F[rd]f<=-F[rs1]f * F[rs2]f + F[rs3]f; if(FLEN==32) F[rd] <= fdispatch_fmadd_s(F[rs1], F[rs2], F[rs3], zext(2, 32), choose(rm<7, rm{8}, FCSR{8})); @@ -79,7 +79,7 @@ InsructionSet RV32F extends RV32I{ } FNMSUB.S { encoding: rs3[4:0] | b00 | rs2[4:0] | rs1[4:0] | rm[2:0] | rd[4:0] | b1001011; - args_disass:"x{rd}, f{rs1}, f{rs2}, f{rs3}"; + args_disass:"{name(rd)}, f{rs1}, f{rs2}, f{rs3}"; //F[rd]f<=-F[rs1]f * F[rs2]f - F[rs3]f; if(FLEN==32) F[rd] <= fdispatch_fmadd_s(F[rs1], F[rs2], F[rs3], zext(3, 32), choose(rm<7, rm{8}, FCSR{8})); @@ -359,7 +359,7 @@ InsructionSet RV64F extends RV32F{ instructions{ FCVT.L.S { // fp to 64bit signed integer encoding: b1100000 | b00010 | rs1[4:0] | rm[2:0] | rd[4:0] | b1010011; - args_disass:"x{rd}, f{rs1}"; + args_disass:"{name(rd)}, f{rs1}"; val res[64] <= fdispatch_fcvt_32_64(fdispatch_unbox_s(F[rs1]), zext(0, 32), rm{8}); X[rd]<= sext(res); val flags[32] <= fdispatch_fget_flags(); @@ -367,7 +367,7 @@ InsructionSet RV64F extends RV32F{ } FCVT.LU.S { // fp to 64bit unsigned integer encoding: b1100000 | b00011 | rs1[4:0] | rm[2:0] | rd[4:0] | b1010011; - args_disass:"x{rd}, f{rs1}"; + args_disass:"{name(rd)}, f{rs1}"; val res[64] <= fdispatch_fcvt_32_64(fdispatch_unbox_s(F[rs1]), zext(1, 32), rm{8}); X[rd]<= zext(res); val flags[32] <= fdispatch_fget_flags(); @@ -375,7 +375,7 @@ InsructionSet RV64F extends RV32F{ } FCVT.S.L { // 64bit signed int to to fp encoding: b1101000 | b00010 | rs1[4:0] | rm[2:0] | rd[4:0] | b1010011; - args_disass:"f{rd}, x{rs1}"; + args_disass:"f{rd}, {name(rs1)}"; val res[32] <= fdispatch_fcvt_64_32(X[rs1], zext(2, 32), rm{8}); if(FLEN==32) F[rd] <= res; @@ -386,7 +386,7 @@ InsructionSet RV64F extends RV32F{ } FCVT.S.LU { // 64bit unsigned int to to fp encoding: b1101000 | b00011 | rs1[4:0] | rm[2:0] | rd[4:0] | b1010011; - args_disass:"f{rd}, x{rs1}"; + args_disass:"f{rd}, {name(rs1)}"; val res[32] <=fdispatch_fcvt_64_32(X[rs1], zext(3,32), rm{8}); if(FLEN==32) F[rd] <= res; diff --git a/gen_input/RVM.core_desc b/gen_input/RVM.core_desc index 49edd18..25bd09c 100644 --- a/gen_input/RVM.core_desc +++ b/gen_input/RVM.core_desc @@ -2,14 +2,14 @@ import "RISCVBase.core_desc" InsructionSet RV32M extends RISCVBase { constants { - MAXLEN:=128 + MUL_LEN } instructions{ MUL{ encoding: b0000001 | rs2[4:0] | rs1[4:0] | b000 | rd[4:0] | b0110011; args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}"; if(rd != 0){ - val res[MAXLEN] <= zext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN); + val res[MUL_LEN] <= zext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN); X[rd]<= zext(res , XLEN); } } @@ -17,7 +17,7 @@ InsructionSet RV32M extends RISCVBase { encoding: b0000001 | rs2[4:0] | rs1[4:0] | b001 | rd[4:0] | b0110011; args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}"; if(rd != 0){ - val res[MAXLEN] <= sext(X[rs1], MAXLEN) * sext(X[rs2], MAXLEN); + val res[MUL_LEN] <= sext(X[rs1], MUL_LEN) * sext(X[rs2], MUL_LEN); X[rd]<= zext(res >> XLEN, XLEN); } } @@ -25,7 +25,7 @@ InsructionSet RV32M extends RISCVBase { encoding: b0000001 | rs2[4:0] | rs1[4:0] | b010 | rd[4:0] | b0110011; args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}"; if(rd != 0){ - val res[MAXLEN] <= sext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN); + val res[MUL_LEN] <= sext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN); X[rd]<= zext(res >> XLEN, XLEN); } } @@ -33,7 +33,7 @@ InsructionSet RV32M extends RISCVBase { encoding: b0000001 | rs2[4:0] | rs1[4:0] | b011 | rd[4:0] | b0110011; args_disass:"{name(rd)}, {name(rs1)}, {name(rs2)}"; if(rd != 0){ - val res[MAXLEN] <= zext(X[rs1], MAXLEN) * zext(X[rs2], MAXLEN); + val res[MUL_LEN] <= zext(X[rs1], MUL_LEN) * zext(X[rs2], MUL_LEN); X[rd]<= zext(res >> XLEN, XLEN); } } diff --git a/gen_input/minres_rv.core_desc b/gen_input/minres_rv.core_desc index 70302c8..29f08a0 100644 --- a/gen_input/minres_rv.core_desc +++ b/gen_input/minres_rv.core_desc @@ -22,6 +22,7 @@ Core RV32IMAC provides RV32I, RV32M, RV32A, RV32IC { constants { XLEN:=32; PCLEN:=32; + MUL_LEN:=64; // definitions for the architecture wrapper // XL ZYXWVUTSRQPONMLKJIHGFEDCBA MISA_VAL:=0b01000000000101000001000100000101; @@ -35,6 +36,7 @@ Core RV32GC provides RV32I, RV32M, RV32A, RV32F, RV32D, RV32IC, RV32FC, RV32DC { XLEN:=32; FLEN:=64; PCLEN:=32; + MUL_LEN:=64; // definitions for the architecture wrapper // XL ZYXWVUTSRQPONMLKJIHGFEDCBA MISA_VAL:=0b01000000000101000001000100101101; @@ -60,6 +62,7 @@ Core RV64GC provides RV64I, RV64M, RV64A, RV64F, RV64D, RV64IC, RV32FC, RV32DC { XLEN:=64; FLEN:=64; PCLEN:=64; + MUL_LEN:=128; // definitions for the architecture wrapper // XL ZYXWVUTSRQPONMLKJIHGFEDCBA MISA_VAL:=0b01000000000101000001000100101101; diff --git a/incl/iss/arch/riscv_hart_msu_vp.h b/incl/iss/arch/riscv_hart_msu_vp.h index 81cc622..0d81aa0 100644 --- a/incl/iss/arch/riscv_hart_msu_vp.h +++ b/incl/iss/arch/riscv_hart_msu_vp.h @@ -857,6 +857,8 @@ iss::status riscv_hart_msu_vp::write(const address_type type, const access template iss::status riscv_hart_msu_vp::read_csr(unsigned addr, reg_t &val) { if (addr >= csr.size()) return iss::Err; + auto req_priv_lvl = (addr >> 8) & 0x3; + if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); auto it = csr_rd_cb.find(addr); if (it == csr_rd_cb.end()) { val = csr[addr & csr.page_addr_mask]; @@ -869,6 +871,11 @@ template iss::status riscv_hart_msu_vp::read_csr(unsigned template iss::status riscv_hart_msu_vp::write_csr(unsigned addr, reg_t val) { if (addr >= csr.size()) return iss::Err; + auto req_priv_lvl = (addr >> 8) & 0x3; + if (this->reg.machine_state < req_priv_lvl) + throw illegal_instruction_fault(this->fault_data); + if((addr&0xc00)==0xc00) + throw illegal_instruction_fault(this->fault_data); auto it = csr_wr_cb.find(addr); if (it == csr_wr_cb.end()) { csr[addr & csr.page_addr_mask] = val; @@ -902,15 +909,13 @@ template iss::status riscv_hart_msu_vp::read_time(unsigned } template iss::status riscv_hart_msu_vp::read_status(unsigned addr, reg_t &val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); + auto req_priv_lvl = (addr >> 8) & 0x3; val = state.mstatus & hart_state::get_mask(req_priv_lvl); return iss::Ok; } template iss::status riscv_hart_msu_vp::write_status(unsigned addr, reg_t val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); + auto req_priv_lvl = (addr >> 8) & 0x3; state.write_mstatus(val, req_priv_lvl); check_interrupt(); update_vm_info(); @@ -918,8 +923,6 @@ template iss::status riscv_hart_msu_vp::write_status(unsig } template iss::status riscv_hart_msu_vp::read_ie(unsigned addr, reg_t &val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); val = csr[mie]; if (addr < mie) val &= csr[mideleg]; if (addr < sie) val &= csr[sideleg]; @@ -927,8 +930,7 @@ template iss::status riscv_hart_msu_vp::read_ie(unsigned a } template iss::status riscv_hart_msu_vp::write_ie(unsigned addr, reg_t val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); + auto req_priv_lvl = (addr >> 8) & 0x3; auto mask = get_irq_mask(req_priv_lvl); csr[mie] = (csr[mie] & ~mask) | (val & mask); check_interrupt(); @@ -936,8 +938,6 @@ template iss::status riscv_hart_msu_vp::write_ie(unsigned } template iss::status riscv_hart_msu_vp::read_ip(unsigned addr, reg_t &val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); val = csr[mip]; if (addr < mip) val &= csr[mideleg]; if (addr < sip) val &= csr[sideleg]; @@ -945,8 +945,7 @@ template iss::status riscv_hart_msu_vp::read_ip(unsigned a } template iss::status riscv_hart_msu_vp::write_ip(unsigned addr, reg_t val) { - auto req_priv_lvl = addr >> 8; - if (this->reg.machine_state < req_priv_lvl) throw illegal_instruction_fault(this->fault_data); + auto req_priv_lvl = (addr >> 8) & 0x3; auto mask = get_irq_mask(req_priv_lvl); mask &= ~(1 << 7); // MTIP is read only csr[mip] = (csr[mip] & ~mask) | (val & mask); diff --git a/incl/iss/arch/rv32gc.h b/incl/iss/arch/rv32gc.h index 36ebf25..48e7978 100644 --- a/incl/iss/arch/rv32gc.h +++ b/incl/iss/arch/rv32gc.h @@ -54,7 +54,7 @@ template <> struct traits { static constexpr std::array reg_aliases{ {"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6", "pc", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", "fcsr"}}; - enum constants {XLEN=32, FLEN=64, PCLEN=32, MISA_VAL=0b1000000000101000001000100101101, PGSIZE=0x1000, PGMASK=0xfff}; + enum constants {XLEN=32, FLEN=64, PCLEN=32, MUL_LEN=64, MISA_VAL=0b1000000000101000001000100101101, PGSIZE=0x1000, PGMASK=0xfff}; constexpr static unsigned FP_REGS_SIZE = 64; diff --git a/incl/iss/arch/rv32imac.h b/incl/iss/arch/rv32imac.h index 0504d79..ed3003c 100644 --- a/incl/iss/arch/rv32imac.h +++ b/incl/iss/arch/rv32imac.h @@ -54,7 +54,7 @@ template <> struct traits { static constexpr std::array reg_aliases{ {"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6", "pc"}}; - enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b1000000000101000001000100000101, PGSIZE=0x1000, PGMASK=0xfff}; + enum constants {XLEN=32, PCLEN=32, MUL_LEN=64, MISA_VAL=0b1000000000101000001000100000101, PGSIZE=0x1000, PGMASK=0xfff}; constexpr static unsigned FP_REGS_SIZE = 0; diff --git a/incl/iss/arch/rv64gc.h b/incl/iss/arch/rv64gc.h index 83a23ba..26c6fc0 100644 --- a/incl/iss/arch/rv64gc.h +++ b/incl/iss/arch/rv64gc.h @@ -54,7 +54,7 @@ template <> struct traits { static constexpr std::array reg_aliases{ {"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6", "pc", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", "fcsr"}}; - enum constants {XLEN=64, FLEN=64, PCLEN=64, MISA_VAL=0b1000000000101000001000100101101, PGSIZE=0x1000, PGMASK=0xfff}; + enum constants {XLEN=64, FLEN=64, PCLEN=64, MUL_LEN=128, MISA_VAL=0b1000000000101000001000100101101, PGSIZE=0x1000, PGMASK=0xfff}; constexpr static unsigned FP_REGS_SIZE = 64; diff --git a/src/vm/tcc/vm_mnrv32.cpp b/src/vm/tcc/vm_mnrv32.cpp index 345f64c..69719f4 100644 --- a/src/vm/tcc/vm_mnrv32.cpp +++ b/src/vm/tcc/vm_mnrv32.cpp @@ -364,8 +364,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -391,12 +390,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( cur_pc_val, 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -422,10 +420,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( @@ -460,16 +457,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto new_pc_val = tu.add( + auto new_pc_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.l_and( new_pc_val, @@ -753,17 +749,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -789,17 +784,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -825,17 +819,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -861,17 +854,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -897,17 +889,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -933,16 +924,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 8); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 8)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 15); @@ -967,16 +957,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 16); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 16)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 16); @@ -1001,16 +990,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 17); @@ -1036,12 +1024,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1068,7 +1055,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1076,8 +1063,7 @@ private: 32, false), tu.constant(imm, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1105,14 +1091,13 @@ private: tu.open_scope(); int32_t full_imm_val = imm; if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.load(rs1 + traits::X0, 0), tu.constant(full_imm_val, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1139,12 +1124,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1171,12 +1155,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1203,12 +1186,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1238,10 +1220,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1272,10 +1253,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1306,10 +1286,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1337,10 +1316,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1367,10 +1345,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1397,14 +1374,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1431,7 +1407,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1441,8 +1417,7 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1469,7 +1444,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.ext( @@ -1481,8 +1456,7 @@ private: 32, true)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1509,10 +1483,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1539,14 +1512,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1573,14 +1545,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1607,10 +1578,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1637,10 +1607,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1664,15 +1633,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.l_or( - tu.shl( - tu.constant(pred, 32U), - tu.constant(4, 32U)), - tu.constant(succ, 32U)), 32); tu.write_mem( traits::FENCE, tu.constant(0, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.l_or( + tu.shl( + tu.constant(pred, 32U), + tu.constant(4, 32U)), + tu.constant(succ, 32U)), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 37); @@ -1694,11 +1662,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(imm, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(1, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.constant(imm, 32U), 32)); tu.close_scope(); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1829,16 +1796,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(rs1, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(2, 64U), - FENCEtmp0_val_v); - auto FENCEtmp1_val_v = tu.assignment("FENCEtmp1_val", tu.constant(rs2, 32U), 32); + tu.trunc(tu.constant(rs1, 32U), 32)); tu.write_mem( traits::FENCE, tu.constant(3, 64U), - FENCEtmp1_val_v); + tu.trunc(tu.constant(rs2, 32U), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 45); @@ -1863,22 +1828,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto rs_val_val = tu.load(rs1 + traits::X0, 0); + auto rs_val_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto csr_val_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", rs_val_val, 32); + auto csr_val_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", csr_val_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(rs_val_val, 32)); + tu.store(csr_val_val, rd + traits::X0); } else { - auto CSRtmp2_val_v = tu.assignment("CSRtmp2_val", rs_val_val, 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp2_val_v); + tu.trunc(rs_val_val, 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1904,20 +1866,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_or( - xrd_val, - xrs1_val), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_or( + xrd_val, + xrs1_val), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1943,20 +1903,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - xrd_val, - tu.l_not(xrs1_val)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + xrd_val, + tu.l_not(xrs1_val)), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1983,17 +1941,15 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), rd + traits::X0); } - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.ext( - tu.constant(zimm, 32U), - 32, - true), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.ext( + tu.constant(zimm, 32U), + 32, + true), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 49); @@ -2018,22 +1974,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(zimm != 0){ - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", tu.l_or( - res_val, - tu.ext( - tu.constant(zimm, 32U), - 32, - true)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); + tu.trunc(tu.l_or( + res_val, + tu.ext( + tu.constant(zimm, 32U), + 32, + true)), 32)); } if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", res_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2059,22 +2013,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } if(zimm != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - res_val, - tu.l_not(tu.ext( - tu.constant(zimm, 32U), - 32, - true))), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + res_val, + tu.l_not(tu.ext( + tu.constant(zimm, 32U), + 32, + true))), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2102,10 +2054,9 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + tu.constant(imm, 32U)), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 52); @@ -2130,14 +2081,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 53); @@ -2162,14 +2112,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + 8 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + 8 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 54); @@ -2193,12 +2142,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(imm, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 55); @@ -2240,10 +2188,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( cur_pc_val, @@ -2279,8 +2226,7 @@ private: if(rd == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 58); @@ -2310,8 +2256,7 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 59); @@ -2334,12 +2279,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(2 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, 2 + traits::X0); + tu.constant(imm, 32U)), 2 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 60); @@ -2364,10 +2308,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 61); @@ -2392,10 +2335,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 62); @@ -2420,12 +2362,11 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1_idx_val + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(imm, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 63); @@ -2450,10 +2391,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 64); @@ -2478,10 +2418,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 65); @@ -2506,10 +2445,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 66); @@ -2534,10 +2472,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 67); @@ -2675,10 +2612,9 @@ private: if(rs1 == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(shamt, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 71); @@ -2702,14 +2638,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 72); @@ -2733,8 +2668,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.load(rs2 + traits::X0, 0), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.load(rs2 + traits::X0, 0), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 73); @@ -2782,10 +2716,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rd + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 75); @@ -2808,10 +2741,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits::X0, 0), 32); tu.store(PC_val_v, traits::NEXT_PC); tu.store(tu.constant(std::numeric_limits::max(), 32U), traits::LAST_BRANCH); @@ -2855,14 +2787,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 78); diff --git a/src/vm/tcc/vm_rv32gc.cpp b/src/vm/tcc/vm_rv32gc.cpp index 7967683..6ec5597 100644 --- a/src/vm/tcc/vm_rv32gc.cpp +++ b/src/vm/tcc/vm_rv32gc.cpp @@ -522,8 +522,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -549,12 +548,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( cur_pc_val, 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -580,10 +578,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( @@ -618,16 +615,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto new_pc_val = tu.add( + auto new_pc_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.l_and( new_pc_val, @@ -911,17 +907,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -947,17 +942,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -983,17 +977,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1019,17 +1012,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1055,17 +1047,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1091,16 +1082,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 8); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 8)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 15); @@ -1125,16 +1115,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 16); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 16)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 16); @@ -1159,16 +1148,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 17); @@ -1194,12 +1182,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1226,7 +1213,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1234,8 +1221,7 @@ private: 32, false), tu.constant(imm, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1263,14 +1249,13 @@ private: tu.open_scope(); int32_t full_imm_val = imm; if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.load(rs1 + traits::X0, 0), tu.constant(full_imm_val, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1297,12 +1282,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1329,12 +1313,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1361,12 +1344,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1396,10 +1378,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1430,10 +1411,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1464,10 +1444,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1495,10 +1474,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1525,10 +1503,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1555,14 +1532,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1589,7 +1565,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1599,8 +1575,7 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1627,7 +1602,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.ext( @@ -1639,8 +1614,7 @@ private: 32, true)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1667,10 +1641,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1697,14 +1670,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1731,14 +1703,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1765,10 +1736,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1795,10 +1765,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1822,15 +1791,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.l_or( - tu.shl( - tu.constant(pred, 32U), - tu.constant(4, 32U)), - tu.constant(succ, 32U)), 32); tu.write_mem( traits::FENCE, tu.constant(0, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.l_or( + tu.shl( + tu.constant(pred, 32U), + tu.constant(4, 32U)), + tu.constant(succ, 32U)), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 37); @@ -1852,11 +1820,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(imm, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(1, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.constant(imm, 32U), 32)); tu.close_scope(); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1987,16 +1954,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(rs1, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(2, 64U), - FENCEtmp0_val_v); - auto FENCEtmp1_val_v = tu.assignment("FENCEtmp1_val", tu.constant(rs2, 32U), 32); + tu.trunc(tu.constant(rs1, 32U), 32)); tu.write_mem( traits::FENCE, tu.constant(3, 64U), - FENCEtmp1_val_v); + tu.trunc(tu.constant(rs2, 32U), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 45); @@ -2021,22 +1986,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto rs_val_val = tu.load(rs1 + traits::X0, 0); + auto rs_val_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto csr_val_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", rs_val_val, 32); + auto csr_val_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", csr_val_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(rs_val_val, 32)); + tu.store(csr_val_val, rd + traits::X0); } else { - auto CSRtmp2_val_v = tu.assignment("CSRtmp2_val", rs_val_val, 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp2_val_v); + tu.trunc(rs_val_val, 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2062,20 +2024,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_or( - xrd_val, - xrs1_val), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_or( + xrd_val, + xrs1_val), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2101,20 +2061,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - xrd_val, - tu.l_not(xrs1_val)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + xrd_val, + tu.l_not(xrs1_val)), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2141,17 +2099,15 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), rd + traits::X0); } - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.ext( - tu.constant(zimm, 32U), - 32, - true), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.ext( + tu.constant(zimm, 32U), + 32, + true), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 49); @@ -2176,22 +2132,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(zimm != 0){ - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", tu.l_or( - res_val, - tu.ext( - tu.constant(zimm, 32U), - 32, - true)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); + tu.trunc(tu.l_or( + res_val, + tu.ext( + tu.constant(zimm, 32U), + 32, + true)), 32)); } if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", res_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2217,22 +2171,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } if(zimm != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - res_val, - tu.l_not(tu.ext( - tu.constant(zimm, 32U), - 32, - true))), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + res_val, + tu.l_not(tu.ext( + tu.constant(zimm, 32U), + 32, + true))), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2259,20 +2211,19 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, true), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( res_val, 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2299,22 +2250,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - false)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + false)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2341,22 +2291,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2383,22 +2332,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, true), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2442,21 +2390,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 32U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(MMIN_val, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.sdiv( + tu.store(tu.constant(MMIN_val, 32U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.sdiv( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 32, false)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + 32, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.neg(tu.constant(1, 32U)), 32); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 32U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2488,13 +2433,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.udiv( + tu.store(tu.udiv( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.neg(tu.constant(1, 32U)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 32U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2539,21 +2482,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 32U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(0, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.srem( + tu.store(tu.constant(0, 32U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.srem( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 32, false)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + 32, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.load(rs1 + traits::X0, 0), 32); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2585,13 +2525,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.urem( + tu.store(tu.urem( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.load(rs1 + traits::X0, 0), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2620,20 +2558,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto REStmp1_val_v = tu.assignment("REStmp1_val", tu.ext( - tu.neg(tu.constant(1, 8U)), - 32, - false), 32); + false), rd + traits::X0); tu.write_mem( traits::RES, offs_val, - REStmp1_val_v); + tu.trunc(tu.ext( + tu.neg(tu.constant(1, 8U)), + 32, + false), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2661,20 +2597,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.read_mem(traits::RES, offs_val, 32); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.read_mem(traits::RES, offs_val, 32), 32); tu( " if({}) {{", tu.icmp( ICmpInst::ICMP_NE, res1_val, tu.constant(0, 32U))); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_NE, res1_val, @@ -2683,8 +2618,7 @@ private: 32, true)), tu.constant(0, 32U), - tu.constant(1, 32U)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.constant(1, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2712,19 +2646,17 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 62); @@ -2751,23 +2683,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.add( + auto res2_val = tu.assignment(tu.add( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 63); @@ -2794,23 +2724,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_xor( + auto res2_val = tu.assignment(tu.l_xor( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 64); @@ -2837,23 +2765,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_and( + auto res2_val = tu.assignment(tu.l_and( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 65); @@ -2880,23 +2806,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_or( + auto res2_val = tu.assignment(tu.l_or( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 66); @@ -2923,16 +2847,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SGT, tu.ext( @@ -2942,12 +2865,11 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 67); @@ -2974,16 +2896,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -2993,12 +2914,11 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 68); @@ -3025,27 +2945,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_UGT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 69); @@ -3072,27 +2990,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 70); @@ -3110,33 +3026,31 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rd}, {imm}(x{rs1})", fmt::arg("mnemonic", "flw"), - fmt::arg("rd", rd), fmt::arg("imm", imm), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rd}, {imm}({rs1})", fmt::arg("mnemonic", "flw"), + fmt::arg("rd", rd), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(imm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -3155,26 +3069,25 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rs2}, {imm}(x{rs1})", fmt::arg("mnemonic", "fsw"), - fmt::arg("rs2", rs2), fmt::arg("imm", imm), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rs2}, {imm}({name(rs1)])", fmt::arg("mnemonic", "fsw"), + fmt::arg("rs2", rs2), fmt::arg("imm", imm)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 32 - ), 32); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 72); @@ -3194,15 +3107,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmadd.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmadd.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -3220,19 +3133,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -3250,20 +3162,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3289,15 +3200,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmsub.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmsub.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -3315,19 +3226,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -3345,20 +3255,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3384,15 +3293,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmadd.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} name(rd), f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmadd.s"), + fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -3410,19 +3319,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -3440,20 +3348,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3479,15 +3386,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmsub.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmsub.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -3505,19 +3412,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -3535,20 +3441,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3581,7 +3486,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fadd_s", + tu.store(tu.callf("fadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -3594,16 +3499,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fadd_s", frs1_val, frs2_val, tu.choose( @@ -3616,20 +3520,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3662,7 +3565,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsub_s", + tu.store(tu.callf("fsub_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -3675,16 +3578,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsub_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsub_s", frs1_val, frs2_val, tu.choose( @@ -3697,20 +3599,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3743,7 +3644,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmul_s", + tu.store(tu.callf("fmul_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -3756,16 +3657,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fmul_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmul_s", frs1_val, frs2_val, tu.choose( @@ -3778,20 +3678,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3824,7 +3723,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fdiv_s", + tu.store(tu.callf("fdiv_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -3837,16 +3736,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fdiv_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fdiv_s", frs1_val, frs2_val, tu.choose( @@ -3859,20 +3757,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3904,7 +3801,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsqrt_s", + tu.store(tu.callf("fsqrt_s", tu.load(rs1 + traits::F0, 0), tu.choose( tu.icmp( @@ -3916,13 +3813,12 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto res_val = tu.callf("fsqrt_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsqrt_s", frs1_val, tu.choose( tu.icmp( @@ -3934,20 +3830,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -3979,38 +3874,36 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.l_and( tu.load(rs1 + traits::F0, 0), tu.constant(0x7fffffff, 64U)), tu.l_and( tu.load(rs2 + traits::F0, 0), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_or( + ), 32); + auto res_val = tu.assignment(tu.l_or( tu.l_and( frs1_val, tu.constant(0x7fffffff, 32U)), tu.l_and( frs2_val, - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4037,38 +3930,36 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.l_and( tu.load(rs1 + traits::F0, 0), tu.constant(0x7fffffff, 64U)), tu.l_and( tu.l_not(tu.load(rs2 + traits::F0, 0)), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_or( + ), 32); + auto res_val = tu.assignment(tu.l_or( tu.l_and( frs1_val, tu.constant(0x7fffffff, 32U)), tu.l_and( tu.l_not(frs2_val), - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4095,34 +3986,32 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::F0, 0), tu.l_and( tu.load(rs2 + traits::F0, 0), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_xor( + ), 32); + auto res_val = tu.assignment(tu.l_xor( frs1_val, tu.l_and( frs2_val, - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4149,43 +4038,41 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsel_s", + tu.store(tu.callf("fsel_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.ext( tu.constant(0LL, 64U), 32, true) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsel_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsel_s", frs1_val, frs2_val, tu.ext( tu.constant(0LL, 64U), 32, true) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4217,43 +4104,41 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsel_s", + tu.store(tu.callf("fsel_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.ext( tu.constant(1LL, 64U), 32, true) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsel_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsel_s", frs1_val, frs2_val, tu.ext( tu.constant(1LL, 64U), 32, true) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4285,7 +4170,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_s", tu.load(rs1 + traits::F0, 0), tu.ext( @@ -4295,13 +4180,12 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcvt_s", frs1_val, tu.ext( @@ -4311,11 +4195,10 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4347,7 +4230,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_s", tu.load(rs1 + traits::F0, 0), tu.ext( @@ -4357,13 +4240,12 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcvt_s", frs1_val, tu.ext( @@ -4373,11 +4255,10 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4409,7 +4290,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -4419,16 +4300,15 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -4438,11 +4318,10 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4474,7 +4353,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -4484,16 +4363,15 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -4503,10 +4381,9 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.callf("fcmp_s", + tu.store(tu.callf("fcmp_s", tu.trunc( tu.load(rs1 + traits::F0, 0), 32 @@ -4519,10 +4396,9 @@ private: tu.constant(2LL, 64U), 32, true) + ), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" ), 32); - tu.store(Xtmp2_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4554,7 +4430,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -4564,16 +4440,15 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -4583,11 +4458,10 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4617,12 +4491,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.callf("fclass_s", + tu.store(tu.callf("fclass_s", tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) ) - ), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + ), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 92); @@ -4648,7 +4521,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fcvt_s", + tu.store(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -4658,10 +4531,9 @@ private: 32, true), tu.constant(rm, 8U) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto res_val = tu.callf("fcvt_s", + auto res_val = tu.assignment(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -4671,17 +4543,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4708,7 +4579,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fcvt_s", + tu.store(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -4718,10 +4589,9 @@ private: 32, true), tu.constant(rm, 8U) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto res_val = tu.callf("fcvt_s", + auto res_val = tu.assignment(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -4731,17 +4601,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4766,14 +4635,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.trunc( tu.load(rs1 + traits::F0, 0), 32 ), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 95); @@ -4798,14 +4666,13 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.trunc( + tu.store(tu.trunc( tu.load(rs1 + traits::X0, 0), 32 - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), @@ -4815,8 +4682,7 @@ private: 32 ), 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4842,23 +4708,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(imm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4884,19 +4748,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 64 - ), 64); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 98); @@ -4923,7 +4786,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -4950,21 +4813,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4997,7 +4858,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5024,21 +4885,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5071,7 +4930,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5098,21 +4957,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5145,7 +5002,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5172,21 +5029,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5218,7 +5073,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fadd_d", + auto res_val = tu.assignment(tu.callf("fadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5237,21 +5092,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5283,7 +5136,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsub_d", + auto res_val = tu.assignment(tu.callf("fsub_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5302,21 +5155,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5348,7 +5199,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmul_d", + auto res_val = tu.assignment(tu.callf("fmul_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5367,21 +5218,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5413,7 +5262,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fdiv_d", + auto res_val = tu.assignment(tu.callf("fdiv_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5432,21 +5281,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5477,7 +5324,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsqrt_d", + auto res_val = tu.assignment(tu.callf("fsqrt_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5492,21 +5339,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5540,7 +5385,7 @@ private: uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; uint64_t MSK2_val = MSK1_val - 1; - auto res_val = tu.l_or( + auto res_val = tu.assignment(tu.l_or( tu.l_and( tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -5552,18 +5397,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 ), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5592,7 +5435,7 @@ private: uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; uint64_t MSK2_val = MSK1_val - 1; - auto res_val = tu.l_or( + auto res_val = tu.assignment(tu.l_or( tu.l_and( tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -5604,18 +5447,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 )), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5643,7 +5484,7 @@ private: tu.open_scope(); uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; - auto res_val = tu.l_xor( + auto res_val = tu.assignment(tu.l_xor( tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5653,18 +5494,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 ), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5690,7 +5529,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsel_d", + auto res_val = tu.assignment(tu.callf("fsel_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5703,21 +5542,19 @@ private: tu.constant(0LL, 64U), 32, true) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5748,7 +5585,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsel_d", + auto res_val = tu.assignment(tu.callf("fsel_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -5761,21 +5598,19 @@ private: tu.constant(1LL, 64U), 32, true) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5806,20 +5641,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fconv_d2f", + auto res_val = tu.assignment(tu.callf("fconv_d2f", tu.load(rs1 + traits::F0, 0), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + true)), rd + traits::F0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 113); @@ -5844,24 +5678,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fconv_f2d", + auto res_val = tu.assignment(tu.callf("fconv_f2d", tu.trunc( tu.load(rs1 + traits::F0, 0), 32 ), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5887,7 +5719,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -5903,10 +5735,9 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5937,7 +5768,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -5953,10 +5784,9 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5987,7 +5817,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -6003,10 +5833,9 @@ private: true) ), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6036,13 +5865,12 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.callf("fclass_d", + tu.store(tu.callf("fclass_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 ) - ), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + ), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 118); @@ -6067,7 +5895,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_64_32", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -6080,10 +5908,9 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6114,7 +5941,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_64_32", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -6127,10 +5954,9 @@ private: tu.constant(rm, 8U) ), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6161,7 +5987,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -6174,18 +6000,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6211,7 +6035,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -6224,18 +6048,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6263,10 +6085,9 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + tu.constant(imm, 32U)), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 123); @@ -6291,14 +6112,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 124); @@ -6323,14 +6143,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + 8 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + 8 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 125); @@ -6354,12 +6173,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(imm, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 126); @@ -6401,10 +6219,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( cur_pc_val, @@ -6440,8 +6257,7 @@ private: if(rd == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 129); @@ -6471,8 +6287,7 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 130); @@ -6495,12 +6310,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(2 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, 2 + traits::X0); + tu.constant(imm, 32U)), 2 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 131); @@ -6525,10 +6339,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 132); @@ -6553,10 +6366,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 133); @@ -6581,12 +6393,11 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1_idx_val + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(imm, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 134); @@ -6611,10 +6422,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 135); @@ -6639,10 +6449,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 136); @@ -6667,10 +6476,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 137); @@ -6695,10 +6503,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 138); @@ -6836,10 +6643,9 @@ private: if(rs1 == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(shamt, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 142); @@ -6863,14 +6669,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 143); @@ -6894,8 +6699,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.load(rs2 + traits::X0, 0), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.load(rs2 + traits::X0, 0), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 144); @@ -6943,10 +6747,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rd + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 146); @@ -6969,10 +6772,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits::X0, 0), 32); tu.store(PC_val_v, traits::NEXT_PC); tu.store(tu.constant(std::numeric_limits::max(), 32U), traits::LAST_BRANCH); @@ -7016,14 +6818,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 149); @@ -7066,24 +6867,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(uimm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + 8 + traits::F0); + tu.store(res_val, rd + 8 + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + 8 + traits::F0); + true)), rd + 8 + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7109,17 +6908,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + 8 + traits::F0, 0), - 32 - ), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + 8 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 152); @@ -7143,24 +6941,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(uimm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7185,17 +6981,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 32 - ), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 154); @@ -7220,21 +7015,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(uimm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + 8 + traits::F0); + tu.store(res_val, rd + 8 + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + 8 + traits::F0); + res_val), rd + 8 + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7260,17 +7053,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + 8 + traits::F0, 0), - 64 - ), 64); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + 8 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 156); @@ -7294,24 +7086,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(uimm, 32U)), 32); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7336,17 +7126,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 64 - ), 64); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 158); @@ -7424,8 +7213,7 @@ template void vm_impl::gen_raise_trap(tu_builder& tu, uint } template void vm_impl::gen_leave_trap(tu_builder& tu, unsigned lvl) { - tu("leave_trap(core_ptr, {});", lvl); - tu.store(tu.read_mem(traits::CSR, (lvl << 8) + 0x41, traits::XLEN),traits::NEXT_PC); + tu.store(value{fmt::format("leave_trap(core_ptr, {})", lvl), traits::XLEN}, traits::NEXT_PC); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); } diff --git a/src/vm/tcc/vm_rv32imac.cpp b/src/vm/tcc/vm_rv32imac.cpp index 29dd040..f9f0383 100644 --- a/src/vm/tcc/vm_rv32imac.cpp +++ b/src/vm/tcc/vm_rv32imac.cpp @@ -402,8 +402,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -429,12 +428,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( cur_pc_val, 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -460,10 +458,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( @@ -498,16 +495,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto new_pc_val = tu.add( + auto new_pc_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 32U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.l_and( new_pc_val, @@ -791,17 +787,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -827,17 +822,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -863,17 +857,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -899,17 +892,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -935,17 +927,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); + tu.constant(imm, 32U)), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -971,16 +962,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 8); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 8)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 15); @@ -1005,16 +995,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 16); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 16)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 16); @@ -1039,16 +1028,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(imm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 17); @@ -1074,12 +1062,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1106,7 +1093,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1114,8 +1101,7 @@ private: 32, false), tu.constant(imm, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1143,14 +1129,13 @@ private: tu.open_scope(); int32_t full_imm_val = imm; if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.load(rs1 + traits::X0, 0), tu.constant(full_imm_val, 32U)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1177,12 +1162,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1209,12 +1193,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1241,12 +1224,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1276,10 +1258,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1310,10 +1291,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1344,10 +1324,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 32U)), rd + traits::X0); } } tu.close_scope(); @@ -1375,10 +1354,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1405,10 +1383,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1435,14 +1412,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1469,7 +1445,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1479,8 +1455,7 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1507,7 +1482,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.ext( @@ -1519,8 +1494,7 @@ private: 32, true)), tu.constant(1, 32U), - tu.constant(0, 32U)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1547,10 +1521,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1577,14 +1550,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1611,14 +1583,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(32, 32U), - tu.constant(1, 32U)))), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 32U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1645,10 +1616,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1675,10 +1645,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1702,15 +1671,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.l_or( - tu.shl( - tu.constant(pred, 32U), - tu.constant(4, 32U)), - tu.constant(succ, 32U)), 32); tu.write_mem( traits::FENCE, tu.constant(0, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.l_or( + tu.shl( + tu.constant(pred, 32U), + tu.constant(4, 32U)), + tu.constant(succ, 32U)), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 37); @@ -1732,11 +1700,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(imm, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(1, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.constant(imm, 32U), 32)); tu.close_scope(); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1867,16 +1834,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(rs1, 32U), 32); tu.write_mem( traits::FENCE, tu.constant(2, 64U), - FENCEtmp0_val_v); - auto FENCEtmp1_val_v = tu.assignment("FENCEtmp1_val", tu.constant(rs2, 32U), 32); + tu.trunc(tu.constant(rs1, 32U), 32)); tu.write_mem( traits::FENCE, tu.constant(3, 64U), - FENCEtmp1_val_v); + tu.trunc(tu.constant(rs2, 32U), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 45); @@ -1901,22 +1866,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto rs_val_val = tu.load(rs1 + traits::X0, 0); + auto rs_val_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto csr_val_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", rs_val_val, 32); + auto csr_val_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", csr_val_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(rs_val_val, 32)); + tu.store(csr_val_val, rd + traits::X0); } else { - auto CSRtmp2_val_v = tu.assignment("CSRtmp2_val", rs_val_val, 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp2_val_v); + tu.trunc(rs_val_val, 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1942,20 +1904,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_or( - xrd_val, - xrs1_val), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_or( + xrd_val, + xrs1_val), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1981,20 +1941,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - xrd_val, - tu.l_not(xrs1_val)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + xrd_val, + tu.l_not(xrs1_val)), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2021,17 +1979,15 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), rd + traits::X0); } - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.ext( - tu.constant(zimm, 32U), - 32, - true), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.ext( + tu.constant(zimm, 32U), + 32, + true), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 49); @@ -2056,22 +2012,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(zimm != 0){ - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", tu.l_or( - res_val, - tu.ext( - tu.constant(zimm, 32U), - 32, - true)), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); + tu.trunc(tu.l_or( + res_val, + tu.ext( + tu.constant(zimm, 32U), + 32, + true)), 32)); } if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", res_val, 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2097,22 +2051,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 32), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } if(zimm != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - res_val, - tu.l_not(tu.ext( - tu.constant(zimm, 32U), - 32, - true))), 32); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + res_val, + tu.l_not(tu.ext( + tu.constant(zimm, 32U), + 32, + true))), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2139,20 +2091,19 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, true), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( res_val, 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2179,22 +2130,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - false)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + false)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2221,22 +2171,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2263,22 +2212,21 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), - 128, + 64, true), tu.ext( tu.load(rs2 + traits::X0, 0), - 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + 64, + true)), 64); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(32, 32U)), 32, - true), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2322,21 +2270,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 32U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(MMIN_val, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.sdiv( + tu.store(tu.constant(MMIN_val, 32U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.sdiv( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 32, false)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + 32, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.neg(tu.constant(1, 32U)), 32); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 32U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2368,13 +2313,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.udiv( + tu.store(tu.udiv( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.neg(tu.constant(1, 32U)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 32U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2419,21 +2362,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 32U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(0, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.srem( + tu.store(tu.constant(0, 32U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.srem( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 32, false)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + 32, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.load(rs1 + traits::X0, 0), 32); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2465,13 +2405,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.urem( + tu.store(tu.urem( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.load(rs1 + traits::X0, 0), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -2500,20 +2438,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto REStmp1_val_v = tu.assignment("REStmp1_val", tu.ext( - tu.neg(tu.constant(1, 8U)), - 32, - false), 32); + false), rd + traits::X0); tu.write_mem( traits::RES, offs_val, - REStmp1_val_v); + tu.trunc(tu.ext( + tu.neg(tu.constant(1, 8U)), + 32, + false), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2541,20 +2477,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.read_mem(traits::RES, offs_val, 32); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.read_mem(traits::RES, offs_val, 32), 32); tu( " if({}) {{", tu.icmp( ICmpInst::ICMP_NE, res1_val, tu.constant(0, 32U))); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_NE, res1_val, @@ -2563,8 +2498,7 @@ private: 32, true)), tu.constant(0, 32U), - tu.constant(1, 32U)), 32); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.constant(1, 32U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2592,19 +2526,17 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 62); @@ -2631,23 +2563,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.add( + auto res2_val = tu.assignment(tu.add( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 63); @@ -2674,23 +2604,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_xor( + auto res2_val = tu.assignment(tu.l_xor( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 64); @@ -2717,23 +2645,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_and( + auto res2_val = tu.assignment(tu.l_and( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 65); @@ -2760,23 +2686,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_or( + auto res2_val = tu.assignment(tu.l_or( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 66); @@ -2803,16 +2727,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SGT, tu.ext( @@ -2822,12 +2745,11 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 67); @@ -2854,16 +2776,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -2873,12 +2794,11 @@ private: tu.load(rs2 + traits::X0, 0), 32, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 68); @@ -2905,27 +2825,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_UGT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 69); @@ -2952,27 +2870,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 32); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false); + false), 32); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 70); @@ -2999,10 +2915,9 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + tu.constant(imm, 32U)), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 71); @@ -3027,14 +2942,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 72); @@ -3059,14 +2973,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + 8 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + 8 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 73); @@ -3090,12 +3003,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(imm, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 74); @@ -3137,10 +3049,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( cur_pc_val, @@ -3176,8 +3087,7 @@ private: if(rd == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 77); @@ -3207,8 +3117,7 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 32U), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 32U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 78); @@ -3231,12 +3140,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(2 + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, 2 + traits::X0); + tu.constant(imm, 32U)), 2 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 79); @@ -3261,10 +3169,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 80); @@ -3289,10 +3196,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 81); @@ -3317,12 +3223,11 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1_idx_val + traits::X0, 0), 32, false), - tu.constant(imm, 32U)), 32); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(imm, 32U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 82); @@ -3347,10 +3252,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 83); @@ -3375,10 +3279,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 84); @@ -3403,10 +3306,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 85); @@ -3431,10 +3333,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 86); @@ -3572,10 +3473,9 @@ private: if(rs1 == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 32U)), 32); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(shamt, 32U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 90); @@ -3599,14 +3499,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 32U)), 32); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 32, - false), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 91); @@ -3630,8 +3529,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.load(rs2 + traits::X0, 0), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.load(rs2 + traits::X0, 0), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 92); @@ -3679,10 +3577,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rd + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 32); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 94); @@ -3705,10 +3602,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 32U)), 32); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 32U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits::X0, 0), 32); tu.store(PC_val_v, traits::NEXT_PC); tu.store(tu.constant(std::numeric_limits::max(), 32U), traits::LAST_BRANCH); @@ -3752,14 +3648,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 32U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(uimm, 32U)), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 97); diff --git a/src/vm/tcc/vm_rv64gc.cpp b/src/vm/tcc/vm_rv64gc.cpp index 89131c9..8c5343f 100644 --- a/src/vm/tcc/vm_rv64gc.cpp +++ b/src/vm/tcc/vm_rv64gc.cpp @@ -612,8 +612,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 64U), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -639,12 +638,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( cur_pc_val, 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -670,10 +668,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 64U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( @@ -708,16 +705,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto new_pc_val = tu.add( + auto new_pc_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 64U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.l_and( new_pc_val, @@ -1001,17 +997,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1037,17 +1032,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1073,17 +1067,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1109,17 +1102,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1145,17 +1137,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1181,16 +1172,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 8); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 8)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 15); @@ -1215,16 +1205,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 16); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 16)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 16); @@ -1249,16 +1238,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 17); @@ -1284,12 +1272,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1316,7 +1303,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1324,8 +1311,7 @@ private: 64, false), tu.constant(imm, 64U)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1353,14 +1339,13 @@ private: tu.open_scope(); int64_t full_imm_val = imm; if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.load(rs1 + traits::X0, 0), tu.constant(full_imm_val, 64U)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1387,12 +1372,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1419,12 +1403,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1451,12 +1434,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1486,10 +1468,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } } tu.close_scope(); @@ -1520,10 +1501,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } } tu.close_scope(); @@ -1554,10 +1534,9 @@ private: this->gen_raise_trap(tu, 0, 0); } else { if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } } tu.close_scope(); @@ -1585,10 +1564,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1615,10 +1593,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1645,14 +1622,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1679,7 +1655,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1689,8 +1665,7 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1717,7 +1692,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.ext( @@ -1729,8 +1704,7 @@ private: 64, true)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1757,10 +1731,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1787,14 +1760,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1821,14 +1793,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1855,10 +1826,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1885,10 +1855,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1912,15 +1881,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.l_or( - tu.shl( - tu.constant(pred, 64U), - tu.constant(4, 64U)), - tu.constant(succ, 64U)), 64); tu.write_mem( traits::FENCE, tu.constant(0, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.l_or( + tu.shl( + tu.constant(pred, 64U), + tu.constant(4, 64U)), + tu.constant(succ, 64U)), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 37); @@ -1942,11 +1910,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(imm, 64U), 64); tu.write_mem( traits::FENCE, tu.constant(1, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.constant(imm, 64U), 64)); tu.close_scope(); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2077,16 +2044,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(rs1, 64U), 64); tu.write_mem( traits::FENCE, tu.constant(2, 64U), - FENCEtmp0_val_v); - auto FENCEtmp1_val_v = tu.assignment("FENCEtmp1_val", tu.constant(rs2, 64U), 64); + tu.trunc(tu.constant(rs1, 64U), 64)); tu.write_mem( traits::FENCE, tu.constant(3, 64U), - FENCEtmp1_val_v); + tu.trunc(tu.constant(rs2, 64U), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 45); @@ -2111,22 +2076,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto rs_val_val = tu.load(rs1 + traits::X0, 0); + auto rs_val_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto csr_val_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", rs_val_val, 64); + auto csr_val_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", csr_val_val, 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(rs_val_val, 64)); + tu.store(csr_val_val, rd + traits::X0); } else { - auto CSRtmp2_val_v = tu.assignment("CSRtmp2_val", rs_val_val, 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp2_val_v); + tu.trunc(rs_val_val, 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2152,20 +2114,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_or( - xrd_val, - xrs1_val), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_or( + xrd_val, + xrs1_val), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2191,20 +2151,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - xrd_val, - tu.l_not(xrs1_val)), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + xrd_val, + tu.l_not(xrs1_val)), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2231,17 +2189,15 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), rd + traits::X0); } - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.ext( - tu.constant(zimm, 64U), - 64, - true), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.ext( + tu.constant(zimm, 64U), + 64, + true), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 49); @@ -2266,22 +2222,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); if(zimm != 0){ - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", tu.l_or( - res_val, - tu.ext( - tu.constant(zimm, 64U), - 64, - true)), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); + tu.trunc(tu.l_or( + res_val, + tu.ext( + tu.constant(zimm, 64U), + 64, + true)), 64)); } if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", res_val, 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2307,22 +2261,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } if(zimm != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - res_val, - tu.l_not(tu.ext( - tu.constant(zimm, 64U), - 64, - true))), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + res_val, + tu.l_not(tu.ext( + tu.constant(zimm, 64U), + 64, + true))), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2348,17 +2300,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2384,17 +2335,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2420,16 +2370,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 64); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 54); @@ -2455,19 +2404,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), 32, false), - tu.constant(imm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(imm, 32U)), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2494,17 +2442,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.shl( + auto sh_val_val = tu.assignment(tu.shl( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2531,17 +2478,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.lshr( + auto sh_val_val = tu.assignment(tu.lshr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2568,17 +2514,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.ashr( + auto sh_val_val = tu.assignment(tu.ashr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2602,7 +2547,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -2610,12 +2555,11 @@ private: tu.trunc( tu.load(rs2 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2639,7 +2583,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.sub( + auto res_val = tu.assignment(tu.sub( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -2647,12 +2591,11 @@ private: tu.trunc( tu.load(rs2 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2680,23 +2623,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.shl( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.shl( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2724,23 +2666,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.lshr( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.lshr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2768,23 +2709,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.ashr( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.ashr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2811,7 +2751,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), 128, @@ -2819,12 +2759,11 @@ private: tu.ext( tu.load(rs2 + traits::X0, 0), 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + true)), 128); + tu.store(tu.ext( res_val, 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2851,7 +2790,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), 128, @@ -2859,14 +2798,13 @@ private: tu.ext( tu.load(rs2 + traits::X0, 0), 128, - false)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + false)), 128); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(64, 64U)), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2893,7 +2831,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), 128, @@ -2901,14 +2839,13 @@ private: tu.ext( tu.load(rs2 + traits::X0, 0), 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + true)), 128); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(64, 64U)), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2935,7 +2872,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.mul( + auto res_val = tu.assignment(tu.mul( tu.ext( tu.load(rs1 + traits::X0, 0), 128, @@ -2943,14 +2880,13 @@ private: tu.ext( tu.load(rs2 + traits::X0, 0), 128, - true)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + true)), 128); + tu.store(tu.ext( tu.lshr( res_val, tu.constant(64, 64U)), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2994,21 +2930,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 64U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(MMIN_val, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.sdiv( + tu.store(tu.constant(MMIN_val, 64U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.sdiv( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 64, false)), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + 64, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.neg(tu.constant(1, 64U)), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 64U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3040,13 +2973,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 64U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.udiv( + tu.store(tu.udiv( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.neg(tu.constant(1, 64U)), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 64U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3091,21 +3022,18 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 64U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(0, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.srem( + tu.store(tu.constant(0, 64U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.srem( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), tu.ext( tu.load(rs2 + traits::X0, 0), - 64, false)), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + 64, false)), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.load(rs1 + traits::X0, 0), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3137,13 +3065,11 @@ private: ICmpInst::ICMP_NE, tu.load(rs2 + traits::X0, 0), tu.constant(0, 64U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.urem( + tu.store(tu.urem( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.load(rs1 + traits::X0, 0), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.load(rs1 + traits::X0, 0), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3171,7 +3097,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.mul( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -3182,8 +3108,7 @@ private: 32 )), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -3232,12 +3157,11 @@ private: 32 ), tu.constant(M1_val, 32U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.neg(tu.constant(1, 64U)), - tu.constant(31, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + tu.constant(31, 64U)), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.ext( tu.sdiv( tu.ext( tu.trunc( @@ -3252,12 +3176,10 @@ private: ), 64, false)), 64, - false), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.neg(tu.constant(1, 64U)), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 64U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3292,7 +3214,7 @@ private: 32 ), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.udiv( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -3303,11 +3225,9 @@ private: 32 )), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.neg(tu.constant(1, 64U)), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.neg(tu.constant(1, 64U)), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3354,10 +3274,9 @@ private: ICmpInst::ICMP_EQ, tu.load(rs2 + traits::X0, 0), tu.constant(M1_val, 64U)))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(0, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + tu.store(tu.constant(0, 64U), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.ext( tu.srem( tu.ext( tu.trunc( @@ -3372,18 +3291,16 @@ private: ), 64, false)), 64, - false), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); - tu(" } else {"); - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.ext( + tu(" }} else {{"); + tu.store(tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), 64, - false), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3418,7 +3335,7 @@ private: 32 ), tu.constant(0, 32U))); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.urem( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -3429,17 +3346,15 @@ private: 32 )), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - tu(" } else {"); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + false), rd + traits::X0); + tu(" }} else {{"); + tu.store(tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), 64, - false), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); } tu.close_scope(); @@ -3468,20 +3383,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto REStmp1_val_v = tu.assignment("REStmp1_val", tu.ext( - tu.neg(tu.constant(1, 8U)), - 32, - false), 32); + false), rd + traits::X0); tu.write_mem( traits::RES, offs_val, - REStmp1_val_v); + tu.trunc(tu.ext( + tu.neg(tu.constant(1, 8U)), + 32, + false), 32)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -3509,20 +3422,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.read_mem(traits::RES, offs_val, 32); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.read_mem(traits::RES, offs_val, 32), 32); tu( " if({}) {{", tu.icmp( ICmpInst::ICMP_NE, res1_val, tu.constant(0, 32U))); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_NE, res1_val, @@ -3531,8 +3443,7 @@ private: 32, true)), tu.constant(0, 64U), - tu.constant(1, 64U)), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.constant(1, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -3560,19 +3471,17 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", tu.load(rs2 + traits::X0, 0), 32); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 79); @@ -3599,23 +3508,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.add( + auto res2_val = tu.assignment(tu.add( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 80); @@ -3642,23 +3549,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_xor( + auto res2_val = tu.assignment(tu.l_xor( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 81); @@ -3685,23 +3590,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_and( + auto res2_val = tu.assignment(tu.l_and( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 82); @@ -3728,23 +3631,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.l_or( + auto res2_val = tu.assignment(tu.l_or( res1_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 83); @@ -3771,16 +3672,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SGT, tu.ext( @@ -3790,12 +3690,11 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 84); @@ -3822,16 +3721,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -3841,12 +3739,11 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 85); @@ -3873,27 +3770,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_UGT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 86); @@ -3920,27 +3815,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 32); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 87); @@ -3967,20 +3860,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto REStmp1_val_v = tu.assignment("REStmp1_val", tu.ext( - tu.neg(tu.constant(1, 8U)), - 64, - false), 64); + false), rd + traits::X0); tu.write_mem( traits::RES, offs_val, - REStmp1_val_v); + tu.trunc(tu.ext( + tu.neg(tu.constant(1, 8U)), + 64, + false), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4008,24 +3899,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.read_mem(traits::RES, offs_val, 8); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.read_mem(traits::RES, offs_val, 8), 64); tu( " if({}) {{", tu.icmp( ICmpInst::ICMP_NE, res_val, tu.constant(0, 64U))); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v);if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.constant(0, 64U), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(tu.load(rs2 + traits::X0, 0), 64));if(rd != 0){ + tu.store(tu.constant(0, 64U), rd + traits::X0); } - tu(" } else {"); + tu(" }} else {{"); if(rd != 0){ - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.constant(1, 64U), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); + tu.store(tu.constant(1, 64U), rd + traits::X0); } tu.close_scope(); tu.close_scope(); @@ -4054,19 +3942,17 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", tu.load(rs2 + traits::X0, 0), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 90); @@ -4093,23 +3979,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.add( + auto res2_val = tu.assignment(tu.add( res_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 91); @@ -4136,23 +4020,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.l_xor( + auto res2_val = tu.assignment(tu.l_xor( res_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 92); @@ -4179,23 +4061,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.l_and( + auto res2_val = tu.assignment(tu.l_and( res_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 93); @@ -4222,23 +4102,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.l_or( + auto res2_val = tu.assignment(tu.l_or( res_val, - tu.load(rs2 + traits::X0, 0)); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + tu.load(rs2 + traits::X0, 0)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 94); @@ -4265,16 +4143,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SGT, tu.ext( @@ -4284,12 +4161,11 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 95); @@ -4316,16 +4192,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -4335,12 +4210,11 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.load(rs2 + traits::X0, 0), - res_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + res_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 96); @@ -4367,27 +4241,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_UGT, res_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + res_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 97); @@ -4414,27 +4286,25 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.load(rs1 + traits::X0, 0); - auto res1_val = tu.ext( + auto offs_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); + auto res1_val = tu.assignment(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false); + false), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res1_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res1_val, rd + traits::X0); } - auto res2_val = tu.choose( + auto res2_val = tu.assignment(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, res1_val, tu.load(rs2 + traits::X0, 0)), tu.load(rs2 + traits::X0, 0), - res1_val); - auto MEMtmp1_val_v = tu.assignment("MEMtmp1_val", res2_val, 64); + res1_val), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp1_val_v); + tu.trunc(res2_val, 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 98); @@ -4452,33 +4322,31 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rd}, {imm}(x{rs1})", fmt::arg("mnemonic", "flw"), - fmt::arg("rd", rd), fmt::arg("imm", imm), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rd}, {imm}({rs1})", fmt::arg("mnemonic", "flw"), + fmt::arg("rd", rd), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(imm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -4497,26 +4365,25 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rs2}, {imm}(x{rs1})", fmt::arg("mnemonic", "fsw"), - fmt::arg("rs2", rs2), fmt::arg("imm", imm), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rs2}, {imm}({name(rs1)])", fmt::arg("mnemonic", "fsw"), + fmt::arg("rs2", rs2), fmt::arg("imm", imm)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 32 - ), 32); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 100); @@ -4536,15 +4403,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmadd.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmadd.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -4562,19 +4429,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -4592,20 +4458,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4631,15 +4496,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmsub.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fmsub.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -4657,19 +4522,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -4687,20 +4551,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4726,15 +4589,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmadd.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} name(rd), f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmadd.s"), + fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -4752,19 +4615,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -4782,20 +4644,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4821,15 +4682,15 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmsub.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); + "{mnemonic:10} {rd}, f{rs1}, f{rs2}, f{rs3}", fmt::arg("mnemonic", "fnmsub.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1), fmt::arg("rs2", rs2), fmt::arg("rs3", rs3)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmadd_s", + tu.store(tu.callf("fmadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.load(rs3 + traits::F0, 0), @@ -4847,19 +4708,18 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto frs3_val = tu.callf("unbox_s", + ), 32); + auto frs3_val = tu.assignment(tu.callf("unbox_s", tu.load(rs3 + traits::F0, 0) - ); - auto res_val = tu.callf("fmadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmadd_s", frs1_val, frs2_val, frs3_val, @@ -4877,20 +4737,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -4923,7 +4782,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fadd_s", + tu.store(tu.callf("fadd_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -4936,16 +4795,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fadd_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fadd_s", frs1_val, frs2_val, tu.choose( @@ -4958,20 +4816,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5004,7 +4861,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsub_s", + tu.store(tu.callf("fsub_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -5017,16 +4874,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsub_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsub_s", frs1_val, frs2_val, tu.choose( @@ -5039,20 +4895,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5085,7 +4940,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fmul_s", + tu.store(tu.callf("fmul_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -5098,16 +4953,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fmul_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fmul_s", frs1_val, frs2_val, tu.choose( @@ -5120,20 +4974,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5166,7 +5019,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fdiv_s", + tu.store(tu.callf("fdiv_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.choose( @@ -5179,16 +5032,15 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fdiv_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fdiv_s", frs1_val, frs2_val, tu.choose( @@ -5201,20 +5053,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5246,7 +5097,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsqrt_s", + tu.store(tu.callf("fsqrt_s", tu.load(rs1 + traits::F0, 0), tu.choose( tu.icmp( @@ -5258,13 +5109,12 @@ private: tu.load(traits::FCSR, 0), 8 )) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto res_val = tu.callf("fsqrt_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsqrt_s", frs1_val, tu.choose( tu.icmp( @@ -5276,20 +5126,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5321,38 +5170,36 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.l_and( tu.load(rs1 + traits::F0, 0), tu.constant(0x7fffffff, 64U)), tu.l_and( tu.load(rs2 + traits::F0, 0), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_or( + ), 32); + auto res_val = tu.assignment(tu.l_or( tu.l_and( frs1_val, tu.constant(0x7fffffff, 32U)), tu.l_and( frs2_val, - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5379,38 +5226,36 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.l_and( tu.load(rs1 + traits::F0, 0), tu.constant(0x7fffffff, 64U)), tu.l_and( tu.l_not(tu.load(rs2 + traits::F0, 0)), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_or( + ), 32); + auto res_val = tu.assignment(tu.l_or( tu.l_and( frs1_val, tu.constant(0x7fffffff, 32U)), tu.l_and( tu.l_not(frs2_val), - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5437,34 +5282,32 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::F0, 0), tu.l_and( tu.load(rs2 + traits::F0, 0), - tu.constant(0x80000000, 64U))), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.constant(0x80000000, 64U))), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.l_xor( + ), 32); + auto res_val = tu.assignment(tu.l_xor( frs1_val, tu.l_and( frs2_val, - tu.constant(0x80000000, 32U))); + tu.constant(0x80000000, 32U))), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -5491,43 +5334,41 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsel_s", + tu.store(tu.callf("fsel_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.ext( tu.constant(0LL, 64U), 32, true) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsel_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsel_s", frs1_val, frs2_val, tu.ext( tu.constant(0LL, 64U), 32, true) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5559,43 +5400,41 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fsel_s", + tu.store(tu.callf("fsel_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), tu.ext( tu.constant(1LL, 64U), 32, true) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto res_val = tu.callf("fsel_s", + ), 32); + auto res_val = tu.assignment(tu.callf("fsel_s", frs1_val, frs2_val, tu.ext( tu.constant(1LL, 64U), 32, true) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5627,7 +5466,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_s", tu.load(rs1 + traits::F0, 0), tu.ext( @@ -5637,13 +5476,12 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcvt_s", frs1_val, tu.ext( @@ -5653,11 +5491,10 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5689,7 +5526,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_s", tu.load(rs1 + traits::F0, 0), tu.ext( @@ -5699,13 +5536,12 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcvt_s", frs1_val, tu.ext( @@ -5715,11 +5551,10 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + false), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5751,7 +5586,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -5761,16 +5596,15 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -5780,11 +5614,10 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5816,7 +5649,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -5826,16 +5659,15 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -5845,10 +5677,9 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto Xtmp2_val_v = tu.assignment("Xtmp2_val", tu.callf("fcmp_s", + tu.store(tu.callf("fcmp_s", tu.trunc( tu.load(rs1 + traits::F0, 0), 32 @@ -5861,10 +5692,9 @@ private: tu.constant(2LL, 64U), 32, true) - ), 64); - tu.store(Xtmp2_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + ), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5896,7 +5726,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_s", tu.load(rs1 + traits::F0, 0), tu.load(rs2 + traits::F0, 0), @@ -5906,16 +5736,15 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } else { - auto frs1_val = tu.callf("unbox_s", + auto frs1_val = tu.assignment(tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) - ); - auto frs2_val = tu.callf("unbox_s", + ), 32); + auto frs2_val = tu.assignment(tu.callf("unbox_s", tu.load(rs2 + traits::F0, 0) - ); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", tu.ext( + ), 32); + tu.store(tu.ext( tu.callf("fcmp_s", frs1_val, frs2_val, @@ -5925,11 +5754,10 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + true), rd + traits::X0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -5959,12 +5787,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.callf("fclass_s", + tu.store(tu.callf("fclass_s", tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) ) - ), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + ), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 120); @@ -5990,7 +5817,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fcvt_s", + tu.store(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -6000,10 +5827,9 @@ private: 32, true), tu.constant(rm, 8U) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto res_val = tu.callf("fcvt_s", + auto res_val = tu.assignment(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -6013,17 +5839,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6050,7 +5875,7 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.callf("fcvt_s", + tu.store(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -6060,10 +5885,9 @@ private: 32, true), tu.constant(rm, 8U) - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { - auto res_val = tu.callf("fcvt_s", + auto res_val = tu.assignment(tu.callf("fcvt_s", tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -6073,17 +5897,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6108,14 +5931,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.trunc( tu.load(rs1 + traits::F0, 0), 32 ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 123); @@ -6140,14 +5962,13 @@ private: pc=pc+4; tu.open_scope(); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.trunc( + tu.store(tu.trunc( tu.load(rs1 + traits::X0, 0), 32 - ), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + ), rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), @@ -6157,8 +5978,7 @@ private: 32 ), 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6177,14 +5997,14 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}", fmt::arg("mnemonic", "fcvt.l.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1)); + "{mnemonic:10} {rd}, f{rs1}", fmt::arg("mnemonic", "fcvt.l.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) ), @@ -6193,14 +6013,13 @@ private: 32, true), tu.constant(rm, 8U) - ); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + ), 64); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6224,14 +6043,14 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} x{rd}, f{rs1}", fmt::arg("mnemonic", "fcvt.lu.s"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1)); + "{mnemonic:10} {rd}, f{rs1}", fmt::arg("mnemonic", "fcvt.lu.s"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", rs1)); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.callf("unbox_s", tu.load(rs1 + traits::F0, 0) ), @@ -6240,14 +6059,13 @@ private: 32, true), tu.constant(rm, 8U) - ); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + ), 64); + tu.store(tu.ext( res_val, 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6271,35 +6089,33 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rd}, x{rs1}", fmt::arg("mnemonic", "fcvt.s.l"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rd}, {rs1}", fmt::arg("mnemonic", "fcvt.s.l"), + fmt::arg("rd", rd), fmt::arg("rs1", name(rs1))); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_64_32", + auto res_val = tu.assignment(tu.callf("fcvt_64_32", tu.load(rs1 + traits::X0, 0), tu.ext( tu.constant(2LL, 64U), 32, true), tu.constant(rm, 8U) - ); + ), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6318,35 +6134,33 @@ private: if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} f{rd}, x{rs1}", fmt::arg("mnemonic", "fcvt.s.lu"), - fmt::arg("rd", rd), fmt::arg("rs1", rs1)); + "{mnemonic:10} f{rd}, {rs1}", fmt::arg("mnemonic", "fcvt.s.lu"), + fmt::arg("rd", rd), fmt::arg("rs1", name(rs1))); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic); } auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_64_32", + auto res_val = tu.assignment(tu.callf("fcvt_64_32", tu.load(rs1 + traits::X0, 0), tu.ext( tu.constant(3LL, 64U), 32, true), tu.constant(rm, 8U) - ); + ), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6372,23 +6186,21 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(imm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -6414,19 +6226,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 64 - ), 64); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 130); @@ -6453,7 +6264,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6480,21 +6291,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6527,7 +6336,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6554,21 +6363,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6601,7 +6408,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6628,21 +6435,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6675,7 +6480,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmadd_d", + auto res_val = tu.assignment(tu.callf("fmadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6702,21 +6507,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6748,7 +6551,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fadd_d", + auto res_val = tu.assignment(tu.callf("fadd_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6767,21 +6570,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6813,7 +6614,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsub_d", + auto res_val = tu.assignment(tu.callf("fsub_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6832,21 +6633,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6878,7 +6677,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fmul_d", + auto res_val = tu.assignment(tu.callf("fmul_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6897,21 +6696,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -6943,7 +6740,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fdiv_d", + auto res_val = tu.assignment(tu.callf("fdiv_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -6962,21 +6759,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7007,7 +6802,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsqrt_d", + auto res_val = tu.assignment(tu.callf("fsqrt_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -7022,21 +6817,19 @@ private: tu.load(traits::FCSR, 0), 8 )) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7070,7 +6863,7 @@ private: uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; uint64_t MSK2_val = MSK1_val - 1; - auto res_val = tu.l_or( + auto res_val = tu.assignment(tu.l_or( tu.l_and( tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7082,18 +6875,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 ), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7122,7 +6913,7 @@ private: uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; uint64_t MSK2_val = MSK1_val - 1; - auto res_val = tu.l_or( + auto res_val = tu.assignment(tu.l_or( tu.l_and( tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7134,18 +6925,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 )), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7173,7 +6962,7 @@ private: tu.open_scope(); uint64_t ONE_val = 1; uint64_t MSK1_val = ONE_val << 63; - auto res_val = tu.l_xor( + auto res_val = tu.assignment(tu.l_xor( tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -7183,18 +6972,16 @@ private: tu.load(rs2 + traits::F0, 0), 64 ), - tu.constant(MSK1_val, 64U))); + tu.constant(MSK1_val, 64U))), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7220,7 +7007,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsel_d", + auto res_val = tu.assignment(tu.callf("fsel_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -7233,21 +7020,19 @@ private: tu.constant(0LL, 64U), 32, true) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7278,7 +7063,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fsel_d", + auto res_val = tu.assignment(tu.callf("fsel_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 @@ -7291,21 +7076,19 @@ private: tu.constant(1LL, 64U), 32, true) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } - auto flags_val = tu.callf("fget_flags" - ); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7336,20 +7119,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fconv_d2f", + auto res_val = tu.assignment(tu.callf("fconv_d2f", tu.load(rs1 + traits::F0, 0), tu.constant(rm, 8U) - ); + ), 32); uint64_t upper_val = - 1; - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + true)), rd + traits::F0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 145); @@ -7374,24 +7156,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fconv_f2d", + auto res_val = tu.assignment(tu.callf("fconv_f2d", tu.trunc( tu.load(rs1 + traits::F0, 0), 32 ), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7417,7 +7197,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7433,10 +7213,9 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7467,7 +7246,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7483,10 +7262,9 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7517,7 +7295,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcmp_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7533,10 +7311,9 @@ private: true) ), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + true), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7566,13 +7343,12 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.callf("fclass_d", + tu.store(tu.callf("fclass_d", tu.trunc( tu.load(rs1 + traits::F0, 0), 64 ) - ), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + ), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 150); @@ -7597,7 +7373,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_64_32", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7610,10 +7386,9 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7644,7 +7419,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_64_32", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7657,10 +7432,9 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7691,7 +7465,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -7704,18 +7478,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7741,7 +7513,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_32_64", + auto res_val = tu.assignment(tu.callf("fcvt_32_64", tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), @@ -7754,18 +7526,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7791,7 +7561,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7804,10 +7574,9 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7838,7 +7607,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.callf("fcvt_d", tu.trunc( tu.load(rs1 + traits::F0, 0), @@ -7851,10 +7620,9 @@ private: tu.constant(rm, 8U) ), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); - auto flags_val = tu.callf("fget_flags" - ); + false), rd + traits::X0); + auto flags_val = tu.assignment(tu.callf("fget_flags" + ), 32); auto FCSR_val_v = tu.assignment("FCSR_val", tu.add( tu.l_and( tu.load(traits::FCSR, 0), @@ -7885,7 +7653,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_d", + auto res_val = tu.assignment(tu.callf("fcvt_d", tu.ext( tu.load(rs1 + traits::X0, 0), 64, @@ -7895,18 +7663,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7932,7 +7698,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.callf("fcvt_d", + auto res_val = tu.assignment(tu.callf("fcvt_d", tu.ext( tu.load(rs1 + traits::X0, 0), 64, @@ -7942,18 +7708,16 @@ private: 32, true), tu.constant(rm, 8U) - ); + ), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + res_val), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -7978,11 +7742,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.load(rs1 + traits::F0, 0), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 159); @@ -8006,11 +7769,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", tu.ext( + tu.store(tu.ext( tu.load(rs1 + traits::X0, 0), 64, - true), 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + true), rd + traits::F0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 160); @@ -8037,10 +7799,9 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + tu.constant(imm, 64U)), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 161); @@ -8065,14 +7826,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 64U)), 64); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 162); @@ -8097,14 +7857,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + 8 + traits::X0, 0), 32); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + 8 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 163); @@ -8128,12 +7887,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(imm, 64U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 164); @@ -8175,10 +7933,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 64U)), 64); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 64U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( cur_pc_val, @@ -8214,8 +7971,7 @@ private: if(rd == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 64U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 167); @@ -8245,8 +8001,7 @@ private: if(imm == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 64U), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 168); @@ -8269,12 +8024,11 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(2 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, 2 + traits::X0); + tu.constant(imm, 64U)), 2 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 169); @@ -8299,10 +8053,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 64U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 170); @@ -8327,10 +8080,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1_idx_val + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(shamt, 64U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 171); @@ -8355,12 +8107,11 @@ private: pc=pc+2; tu.open_scope(); uint8_t rs1_idx_val = rs1 + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1_idx_val + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rs1_idx_val + traits::X0); + tu.constant(imm, 64U)), rs1_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 172); @@ -8385,10 +8136,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 173); @@ -8413,10 +8163,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 174); @@ -8441,10 +8190,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 175); @@ -8469,10 +8217,9 @@ private: pc=pc+2; tu.open_scope(); uint8_t rd_idx_val = rd + 8; - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rd_idx_val + traits::X0, 0), - tu.load(rs2 + 8 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd_idx_val + traits::X0); + tu.load(rs2 + 8 + traits::X0, 0)), rd_idx_val + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 176); @@ -8610,10 +8357,9 @@ private: if(rs1 == 0){ this->gen_raise_trap(tu, 0, 2); } - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + tu.constant(shamt, 64U)), rs1 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 180); @@ -8637,14 +8383,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 64U)), 64); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 181); @@ -8668,8 +8413,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.load(rs2 + traits::X0, 0), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.load(rs2 + traits::X0, 0), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 182); @@ -8717,10 +8461,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rd + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 184); @@ -8743,10 +8486,9 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(2, 64U)), 64); - tu.store(Xtmp0_val_v, 1 + traits::X0); + tu.constant(2, 64U)), 1 + traits::X0); auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits::X0, 0), 64); tu.store(PC_val_v, traits::NEXT_PC); tu.store(tu.constant(std::numeric_limits::max(), 32U), traits::LAST_BRANCH); @@ -8790,14 +8532,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 187); @@ -8840,14 +8581,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(uimm, 64U)), 64); + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 189); @@ -8872,14 +8612,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + 8 + traits::X0, 0), 64); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + 8 + traits::X0, 0), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 190); @@ -8903,7 +8642,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto res_val = tu.sub( + auto res_val = tu.assignment(tu.sub( tu.trunc( tu.load(rd + 8 + traits::X0, 0), 32 @@ -8911,12 +8650,11 @@ private: tu.trunc( tu.load(rs2 + 8 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 191); @@ -8940,7 +8678,7 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.trunc( tu.load(rd + 8 + traits::X0, 0), 32 @@ -8948,12 +8686,11 @@ private: tu.trunc( tu.load(rs2 + 8 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + 8 + traits::X0); + false), rd + 8 + traits::X0); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 192); @@ -8978,19 +8715,18 @@ private: pc=pc+2; tu.open_scope(); if(rs1 != 0){ - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), 32, false), - tu.constant(imm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(imm, 32U)), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rs1 + traits::X0); + false), rs1 + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9015,15 +8751,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); + tu.constant(uimm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9048,14 +8783,13 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 64); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 195); @@ -9080,24 +8814,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(uimm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + 8 + traits::F0); + tu.store(res_val, rd + 8 + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + 8 + traits::F0); + true)), rd + 8 + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9123,17 +8855,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + 8 + traits::F0, 0), - 32 - ), 32); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + 8 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 197); @@ -9157,24 +8888,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 32); + tu.constant(uimm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 32), 32); if(64 == 32){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(32, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9199,17 +8928,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 32 - ), 32); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 32 + ), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 199); @@ -9234,21 +8962,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(uimm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + 8 + traits::F0); + tu.store(res_val, rd + 8 + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), - res_val), 64); - tu.store(Ftmp1_val_v, rd + 8 + traits::F0); + res_val), rd + 8 + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9274,17 +9000,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(rs1 + 8 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + 8 + traits::F0, 0), - 64 - ), 64); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + 8 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 201); @@ -9308,24 +9033,22 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto res_val = tu.read_mem(traits::MEM, offs_val, 64); + tu.constant(uimm, 64U)), 64); + auto res_val = tu.assignment(tu.read_mem(traits::MEM, offs_val, 64), 64); if(64 == 64){ - auto Ftmp0_val_v = tu.assignment("Ftmp0_val", res_val, 64); - tu.store(Ftmp0_val_v, rd + traits::F0); + tu.store(res_val, rd + traits::F0); } else { uint64_t upper_val = - 1; - auto Ftmp1_val_v = tu.assignment("Ftmp1_val", tu.l_or( + tu.store(tu.l_or( tu.shl( tu.constant(upper_val, 64U), tu.constant(64, 64U)), tu.ext( res_val, 64, - true)), 64); - tu.store(Ftmp1_val_v, rd + traits::F0); + true)), rd + traits::F0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -9350,17 +9073,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+2; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.load(2 + traits::X0, 0), - tu.constant(uimm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.trunc( - tu.load(rs2 + traits::F0, 0), - 64 - ), 64); + tu.constant(uimm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.trunc( + tu.load(rs2 + traits::F0, 0), + 64 + ), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 203); diff --git a/src/vm/tcc/vm_rv64i.cpp b/src/vm/tcc/vm_rv64i.cpp index 02966a4..9c92f33 100644 --- a/src/vm/tcc/vm_rv64i.cpp +++ b/src/vm/tcc/vm_rv64i.cpp @@ -332,8 +332,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.constant(imm, 64U), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.constant(imm, 64U), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -359,12 +358,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( cur_pc_val, 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -390,10 +388,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 64U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.add( tu.ext( @@ -428,25 +425,24 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto new_pc_val = tu.add( + auto new_pc_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto align_val = tu.l_and( + tu.constant(imm, 64U)), 64); + auto align_val = tu.assignment(tu.l_and( new_pc_val, - tu.constant(0x2, 64U)); + tu.constant(0x2, 64U)), 64); tu( " if({}) {{", tu.icmp( ICmpInst::ICMP_NE, align_val, tu.constant(0, 64U))); this->gen_raise_trap(tu, 0, 0); - tu(" } else {"); + tu(" }} else {{"); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( cur_pc_val, - tu.constant(4, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(4, 64U)), rd + traits::X0); } auto PC_val_v = tu.assignment("PC_val", tu.l_and( new_pc_val, @@ -731,17 +727,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -767,17 +762,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -803,17 +797,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -839,17 +832,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 8), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -875,17 +867,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 16), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -911,16 +902,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 8); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 8)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 15); @@ -945,16 +935,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 16); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 16)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 16); @@ -979,16 +968,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 32); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 32)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 17); @@ -1014,12 +1002,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1046,7 +1033,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1054,8 +1041,7 @@ private: 64, false), tu.constant(imm, 64U)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1083,14 +1069,13 @@ private: tu.open_scope(); int64_t full_imm_val = imm; if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.load(rs1 + traits::X0, 0), tu.constant(full_imm_val, 64U)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1117,12 +1102,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1149,12 +1133,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1181,12 +1164,11 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(imm, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1213,10 +1195,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1243,10 +1224,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1273,10 +1253,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), - tu.constant(shamt, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(shamt, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1303,10 +1282,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.add( + tu.store(tu.add( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1333,10 +1311,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.sub( + tu.store(tu.sub( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1363,14 +1340,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.shl( + tu.store(tu.shl( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1397,7 +1373,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_SLT, tu.ext( @@ -1407,8 +1383,7 @@ private: tu.load(rs2 + traits::X0, 0), 64, false)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1435,7 +1410,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.choose( + tu.store(tu.choose( tu.icmp( ICmpInst::ICMP_ULT, tu.ext( @@ -1447,8 +1422,7 @@ private: 64, true)), tu.constant(1, 64U), - tu.constant(0, 64U)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(0, 64U)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1475,10 +1449,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_xor( + tu.store(tu.l_xor( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1505,14 +1478,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.lshr( + tu.store(tu.lshr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1539,14 +1511,13 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ashr( + tu.store(tu.ashr( tu.load(rs1 + traits::X0, 0), tu.l_and( tu.load(rs2 + traits::X0, 0), tu.sub( tu.constant(64, 64U), - tu.constant(1, 64U)))), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.constant(1, 64U)))), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1573,10 +1544,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_or( + tu.store(tu.l_or( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1603,10 +1573,9 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.l_and( + tu.store(tu.l_and( tu.load(rs1 + traits::X0, 0), - tu.load(rs2 + traits::X0, 0)), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.load(rs2 + traits::X0, 0)), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1630,15 +1599,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.l_or( - tu.shl( - tu.constant(pred, 64U), - tu.constant(4, 64U)), - tu.constant(succ, 64U)), 64); tu.write_mem( traits::FENCE, tu.constant(0, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.l_or( + tu.shl( + tu.constant(pred, 64U), + tu.constant(4, 64U)), + tu.constant(succ, 64U)), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 37); @@ -1660,11 +1628,10 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(imm, 64U), 64); tu.write_mem( traits::FENCE, tu.constant(1, 64U), - FENCEtmp0_val_v); + tu.trunc(tu.constant(imm, 64U), 64)); tu.close_scope(); tu.store(tu.constant(std::numeric_limits::max(), 32),traits::LAST_BRANCH); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1795,16 +1762,14 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto FENCEtmp0_val_v = tu.assignment("FENCEtmp0_val", tu.constant(rs1, 64U), 64); tu.write_mem( traits::FENCE, tu.constant(2, 64U), - FENCEtmp0_val_v); - auto FENCEtmp1_val_v = tu.assignment("FENCEtmp1_val", tu.constant(rs2, 64U), 64); + tu.trunc(tu.constant(rs1, 64U), 64)); tu.write_mem( traits::FENCE, tu.constant(3, 64U), - FENCEtmp1_val_v); + tu.trunc(tu.constant(rs2, 64U), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 45); @@ -1829,22 +1794,19 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto rs_val_val = tu.load(rs1 + traits::X0, 0); + auto rs_val_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto csr_val_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", rs_val_val, 64); + auto csr_val_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", csr_val_val, 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.trunc(rs_val_val, 64)); + tu.store(csr_val_val, rd + traits::X0); } else { - auto CSRtmp2_val_v = tu.assignment("CSRtmp2_val", rs_val_val, 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp2_val_v); + tu.trunc(rs_val_val, 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1870,20 +1832,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_or( - xrd_val, - xrs1_val), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_or( + xrd_val, + xrs1_val), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1909,20 +1869,18 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto xrd_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); - auto xrs1_val = tu.load(rs1 + traits::X0, 0); + auto xrd_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); + auto xrs1_val = tu.assignment(tu.load(rs1 + traits::X0, 0), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", xrd_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(xrd_val, rd + traits::X0); } if(rs1 != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - xrd_val, - tu.l_not(xrs1_val)), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + xrd_val, + tu.l_not(xrs1_val)), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -1949,17 +1907,15 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), rd + traits::X0); } - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.ext( - tu.constant(zimm, 64U), - 64, - true), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.ext( + tu.constant(zimm, 64U), + 64, + true), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 49); @@ -1984,22 +1940,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); if(zimm != 0){ - auto CSRtmp0_val_v = tu.assignment("CSRtmp0_val", tu.l_or( - res_val, - tu.ext( - tu.constant(zimm, 64U), - 64, - true)), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp0_val_v); + tu.trunc(tu.l_or( + res_val, + tu.ext( + tu.constant(zimm, 64U), + 64, + true)), 64)); } if(rd != 0){ - auto Xtmp1_val_v = tu.assignment("Xtmp1_val", res_val, 64); - tu.store(Xtmp1_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2025,22 +1979,20 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto res_val = tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64); + auto res_val = tu.assignment(tu.read_mem(traits::CSR, tu.constant(csr, 16U), 64), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", res_val, 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + tu.store(res_val, rd + traits::X0); } if(zimm != 0){ - auto CSRtmp1_val_v = tu.assignment("CSRtmp1_val", tu.l_and( - res_val, - tu.l_not(tu.ext( - tu.constant(zimm, 64U), - 64, - true))), 64); tu.write_mem( traits::CSR, tu.constant(csr, 16U), - CSRtmp1_val_v); + tu.trunc(tu.l_and( + res_val, + tu.l_not(tu.ext( + tu.constant(zimm, 64U), + 64, + true))), 64)); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2066,17 +2018,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 32), 64, - true), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + true), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2102,17 +2053,16 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); + tu.constant(imm, 64U)), 64); if(rd != 0){ - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.store(tu.ext( tu.read_mem(traits::MEM, offs_val, 64), 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2138,16 +2088,15 @@ private: auto cur_pc_val = tu.constant(pc.val, arch::traits::reg_bit_widths[traits::PC]); pc=pc+4; tu.open_scope(); - auto offs_val = tu.add( + auto offs_val = tu.assignment(tu.add( tu.ext( tu.load(rs1 + traits::X0, 0), 64, false), - tu.constant(imm, 64U)); - auto MEMtmp0_val_v = tu.assignment("MEMtmp0_val", tu.load(rs2 + traits::X0, 0), 64); + tu.constant(imm, 64U)), 64); tu.write_mem( traits::MEM, offs_val, - MEMtmp0_val_v); + tu.trunc(tu.load(rs2 + traits::X0, 0), 64)); tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); vm_base::gen_sync(tu, POST_SYNC, 54); @@ -2173,19 +2122,18 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.ext( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), 32, false), - tu.constant(imm, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(imm, 32U)), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2212,17 +2160,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.shl( + auto sh_val_val = tu.assignment(tu.shl( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2249,17 +2196,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.lshr( + auto sh_val_val = tu.assignment(tu.lshr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2286,17 +2232,16 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto sh_val_val = tu.ashr( + auto sh_val_val = tu.assignment(tu.ashr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - tu.constant(shamt, 32U)); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + tu.constant(shamt, 32U)), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2320,7 +2265,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.add( + auto res_val = tu.assignment(tu.add( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -2328,12 +2273,11 @@ private: tu.trunc( tu.load(rs2 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2357,7 +2301,7 @@ private: pc=pc+4; tu.open_scope(); if(rd != 0){ - auto res_val = tu.sub( + auto res_val = tu.assignment(tu.sub( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 @@ -2365,12 +2309,11 @@ private: tu.trunc( tu.load(rs2 + traits::X0, 0), 32 - )); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + )), 32); + tu.store(tu.ext( res_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2398,23 +2341,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.shl( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.shl( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2442,23 +2384,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.lshr( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.lshr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC); @@ -2486,23 +2427,22 @@ private: tu.open_scope(); if(rd != 0){ uint32_t mask_val = 0x1f; - auto count_val = tu.l_and( + auto count_val = tu.assignment(tu.l_and( tu.trunc( tu.load(rs2 + traits::X0, 0), 32 ), - tu.constant(mask_val, 32U)); - auto sh_val_val = tu.ashr( + tu.constant(mask_val, 32U)), 32); + auto sh_val_val = tu.assignment(tu.ashr( tu.trunc( tu.load(rs1 + traits::X0, 0), 32 ), - count_val); - auto Xtmp0_val_v = tu.assignment("Xtmp0_val", tu.ext( + count_val), 32); + tu.store(tu.ext( sh_val_val, 64, - false), 64); - tu.store(Xtmp0_val_v, rd + traits::X0); + false), rd + traits::X0); } tu.close_scope(); gen_set_pc(tu, pc, traits::NEXT_PC);