DBT-RISE
/
DBT-RISE-TGC
11
0
Fork 0
Code Issues 1 Pull Requests 1 Projects Releases Wiki Activity

fixes wrong array size which led to unintended CSR definitions

This commit is contained in:
Eyck Jentzsch 2023-03-15 14:16:08 +01:00
parent fedbff5971
commit a943dd3bdf
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/iss/arch/riscv_hart_m_p.h
View File

@ -375,7 +375,7 @@ riscv_hart_m_p<BASE, FEAT>::riscv_hart_m_p(feature_config cfg)
//csr_wr_cb[addr] = &this_class::write_csr_reg; //csr_wr_cb[addr] = &this_class::write_csr_reg;
} }
// common regs // common regs
const std::array<unsigned, 9> addrs{{ const std::array<unsigned, 8> addrs{{
misa, mvendorid, marchid, mimpid, misa, mvendorid, marchid, mimpid,
mepc, mtvec, mscratch, mtval mepc, mtvec, mscratch, mtval
}}; }};

2
src/iss/arch/riscv_hart_mu_p.h
View File

@ -393,7 +393,7 @@ riscv_hart_mu_p<BASE, FEAT>::riscv_hart_mu_p(feature_config cfg)
//csr_wr_cb[addr] = &this_class::write_csr_reg; //csr_wr_cb[addr] = &this_class::write_csr_reg;
} }
// common regs // common regs
const std::array<unsigned, 14> addrs{{ const std::array<unsigned, 12> addrs{{
misa, mvendorid, marchid, mimpid, misa, mvendorid, marchid, mimpid,
mepc, mtvec, mscratch, mtval, mepc, mtvec, mscratch, mtval,
uepc, utvec, uscratch, utval, uepc, utvec, uscratch, utval,