diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 86d5877..36aec51 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -375,7 +375,7 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) //csr_wr_cb[addr] = &this_class::write_csr_reg; } // common regs - const std::array addrs{{ + const std::array addrs{{ misa, mvendorid, marchid, mimpid, mepc, mtvec, mscratch, mtval }}; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 1c377eb..ac2e6b7 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -393,7 +393,7 @@ riscv_hart_mu_p::riscv_hart_mu_p(feature_config cfg) //csr_wr_cb[addr] = &this_class::write_csr_reg; } // common regs - const std::array addrs{{ + const std::array addrs{{ misa, mvendorid, marchid, mimpid, mepc, mtvec, mscratch, mtval, uepc, utvec, uscratch, utval,