DBT-RISE/DBT-RISE-TGC
Archived
10
0 Fork 0
Code Issues 1 Projects Releases Wiki Activity

removes setting of NEXT_PC to max if trap

Browse Source
This commit is contained in:
alex committed 2024-07-18 11:37:53 +02:00
1 parent 2ec7ea4b41
commit 8361f88718
2 files changed
-2
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

gen_input/templates/interp/CORENAME.cpp.gtl
-1
View File
@@ -106,7 +106,6 @@ protected:
inline void raise(uint16_t trap_id, uint16_t cause){
auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id;
this->core.reg.trap_state = trap_val;
this->template get_reg<uint${addrDataWidth}_t>(traits::NEXT_PC) = std::numeric_limits<uint${addrDataWidth}_t>::max();
}
inline void leave(unsigned lvl){
src/vm/interp/vm_tgc5c.cpp
-1
View File
@@ -102,7 +102,6 @@ protected:
inline void raise(uint16_t trap_id, uint16_t cause){
auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id;
this->core.reg.trap_state = trap_val;
this->template get_reg<uint32_t>(traits::NEXT_PC) = std::numeric_limits<uint32_t>::max();
}
inline void leave(unsigned lvl){