DBT-RISE/DBT-RISE-TGC
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Update TGF naming convention

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This commit is contained in:
Stanislaw Kaushanski
2020-09-11 10:45:44 +02:00
parent f3d578f050
commit 43488676dd
15 changed files with 102 additions and 102 deletions
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22
src/iss/tgf01.cpp → src/iss/tgf_b.cpp
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@@ -32,26 +32,26 @@
#include "util/ities.h"
#include <util/logging.h>
#include <iss/arch/tgf01.h>
#include <iss/arch/tgf_b.h>
#include <cstdio>
#include <cstring>
#include <fstream>
using namespace iss::arch;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf01>::reg_names;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf01>::reg_aliases;
constexpr std::array<const uint32_t, 39> iss::arch::traits<iss::arch::tgf01>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf01>::reg_byte_offsets;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf_b>::reg_names;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf_b>::reg_aliases;
constexpr std::array<const uint32_t, 39> iss::arch::traits<iss::arch::tgf_b>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_b>::reg_byte_offsets;
tgf01::tgf01() {
tgf_b::tgf_b() {
reg.icount = 0;
}
tgf01::~tgf01() = default;
tgf_b::~tgf_b() = default;
void tgf01::reset(uint64_t address) {
for(size_t i=0; i<traits<tgf01>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf01>::reg_t),0));
void tgf_b::reset(uint64_t address) {
for(size_t i=0; i<traits<tgf_b>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf_b>::reg_t),0));
reg.PC=address;
reg.NEXT_PC=reg.PC;
reg.trap_state=0;
@@ -59,11 +59,11 @@ void tgf01::reset(uint64_t address) {
reg.icount=0;
}
uint8_t *tgf01::get_regs_base_ptr() {
uint8_t *tgf_b::get_regs_base_ptr() {
return reinterpret_cast<uint8_t*>(&reg);
}
tgf01::phys_addr_t tgf01::virt2phys(const iss::addr_t &pc) {
tgf_b::phys_addr_t tgf_b::virt2phys(const iss::addr_t &pc) {
return phys_addr_t(pc); // change logical address to physical address
}

22
src/iss/tgf02.cpp → src/iss/tgf_c.cpp
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@@ -32,26 +32,26 @@
#include "util/ities.h"
#include <util/logging.h>
#include <iss/arch/tgf02.h>
#include <iss/arch/tgf_c.h>
#include <cstdio>
#include <cstring>
#include <fstream>
using namespace iss::arch;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf02>::reg_names;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf02>::reg_aliases;
constexpr std::array<const uint32_t, 39> iss::arch::traits<iss::arch::tgf02>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf02>::reg_byte_offsets;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf_c>::reg_names;
constexpr std::array<const char*, 33> iss::arch::traits<iss::arch::tgf_c>::reg_aliases;
constexpr std::array<const uint32_t, 39> iss::arch::traits<iss::arch::tgf_c>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_c>::reg_byte_offsets;
tgf02::tgf02() {
tgf_c::tgf_c() {
reg.icount = 0;
}
tgf02::~tgf02() = default;
tgf_c::~tgf_c() = default;
void tgf02::reset(uint64_t address) {
for(size_t i=0; i<traits<tgf02>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf02>::reg_t),0));
void tgf_c::reset(uint64_t address) {
for(size_t i=0; i<traits<tgf_c>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf_c>::reg_t),0));
reg.PC=address;
reg.NEXT_PC=reg.PC;
reg.trap_state=0;
@@ -59,11 +59,11 @@ void tgf02::reset(uint64_t address) {
reg.icount=0;
}
uint8_t *tgf02::get_regs_base_ptr() {
uint8_t *tgf_c::get_regs_base_ptr() {
return reinterpret_cast<uint8_t*>(&reg);
}
tgf02::phys_addr_t tgf02::virt2phys(const iss::addr_t &pc) {
tgf_c::phys_addr_t tgf_c::virt2phys(const iss::addr_t &pc) {
return phys_addr_t(pc); // change logical address to physical address
}