diff --git a/CMakeLists.txt b/CMakeLists.txt index 2f91cb2..167dd8c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -30,21 +30,21 @@ add_subdirectory(softfloat) FILE(GLOB RiscVSCHeaders ${CMAKE_CURRENT_SOURCE_DIR}/incl/sysc/*.h ${CMAKE_CURRENT_SOURCE_DIR}/incl/sysc/*/*.h) set(LIB_HEADERS ${RiscVSCHeaders} ) set(LIB_SOURCES - src/iss/tgf01.cpp - src/iss/tgf02.cpp + src/iss/tgf_b.cpp + src/iss/tgf_c.cpp src/vm/fp_functions.cpp - src/vm/tcc/vm_tgf01.cpp - src/vm/tcc/vm_tgf02.cpp - src/vm/interp/vm_tgf01.cpp - src/vm/interp/vm_tgf02.cpp + src/vm/tcc/vm_tgf_b.cpp + src/vm/tcc/vm_tgf_c.cpp + src/vm/interp/vm_tgf_b.cpp + src/vm/interp/vm_tgf_c.cpp src/plugin/instruction_count.cpp src/plugin/cycle_estimate.cpp ) if(WITH_LLVM) set(LIB_SOURCES ${LIB_SOURCES} src/vm/llvm/fp_impl.cpp - src/vm/llvm/vm_tgf01.cpp - src/vm/llvm/vm_tgf02.cpp + src/vm/llvm/vm_tgf_b.cpp + src/vm/llvm/vm_tgf_c.cpp ) endif() diff --git a/README.md b/README.md index f8ea3af..9801acf 100644 --- a/README.md +++ b/README.md @@ -5,8 +5,8 @@ This repo contains only the code of the RISC-V ISS and can only be used with the This library provide the infrastructure to build RISC-V ISS. Currently part of the library are the following implementations adhering to version 2.2 of the 'The RISC-V Instruction Set Manual Volume I: User-Level ISA': -* RV32I (TGF01) -* RV32MIC (TGF02) +* RV32I (TGF-B) +* RV32MIC (TGF-C) All pass the respective compliance tests. Along with those ISA implementations there is a wrapper (riscv_hart_m_p.h) implementing the Machine privileged mode as of privileged spec 1.10. The main.cpp in src allows to build a stand-alone ISS when integrated into a top-level project. For further information please have a look at [https://git.minres.com/VP/RISCV-VP](https://git.minres.com/VP/RISCV-VP). diff --git a/gen_input/TGFS.core_desc b/gen_input/TGFS.core_desc index eb7e963..29944f6 100644 --- a/gen_input/TGFS.core_desc +++ b/gen_input/TGFS.core_desc @@ -2,7 +2,7 @@ import "CoreDSL-Instruction-Set-Description/RV32I.core_desc" import "CoreDSL-Instruction-Set-Description/RVM.core_desc" import "CoreDSL-Instruction-Set-Description/RVC.core_desc" -Core TGF01 provides RV32I { +Core TGF_B provides RV32I { constants { XLEN:=32; PCLEN:=32; @@ -14,7 +14,7 @@ Core TGF01 provides RV32I { } } -Core TGF02 provides RV32I, RV32M, RV32IC { +Core TGF_C provides RV32I, RV32M, RV32IC { constants { XLEN:=32; PCLEN:=32; diff --git a/incl/iss/arch/tgf01.h b/incl/iss/arch/tgf_b.h similarity index 92% rename from incl/iss/arch/tgf01.h rename to incl/iss/arch/tgf_b.h index 7a7cb58..eeaba8d 100644 --- a/incl/iss/arch/tgf01.h +++ b/incl/iss/arch/tgf_b.h @@ -31,8 +31,8 @@ *******************************************************************************/ -#ifndef _TGF01_H_ -#define _TGF01_H_ +#ifndef _TGF_B_H_ +#define _TGF_B_H_ #include #include @@ -42,11 +42,11 @@ namespace iss { namespace arch { -struct tgf01; +struct tgf_b; -template <> struct traits { +template <> struct traits { - constexpr static char const* const core_type = "TGF01"; + constexpr static char const* const core_type = "TGF_B"; static constexpr std::array reg_names{ {"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31", "pc"}}; @@ -156,15 +156,15 @@ template <> struct traits { enum mem_type_e { MEM, CSR, FENCE, RES }; }; -struct tgf01: public arch_if { +struct tgf_b: public arch_if { - using virt_addr_t = typename traits::virt_addr_t; - using phys_addr_t = typename traits::phys_addr_t; - using reg_t = typename traits::reg_t; - using addr_t = typename traits::addr_t; + using virt_addr_t = typename traits::virt_addr_t; + using phys_addr_t = typename traits::phys_addr_t; + using reg_t = typename traits::reg_t; + using addr_t = typename traits::addr_t; - tgf01(); - ~tgf01(); + tgf_b(); + ~tgf_b(); void reset(uint64_t address=0) override; @@ -185,9 +185,9 @@ struct tgf01: public arch_if { inline uint64_t stop_code() { return interrupt_sim; } inline phys_addr_t v2p(const iss::addr_t& addr){ - if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || + if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || addr_mode[static_cast(addr.access)&0x3]==address_type::PHYSICAL) { - return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); + return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); } else return virt2phys(addr); } @@ -199,7 +199,7 @@ struct tgf01: public arch_if { inline uint32_t get_last_branch() { return reg.last_branch; } protected: - struct TGF01_regs { + struct TGF_B_regs { uint32_t X0 = 0; uint32_t X1 = 0; uint32_t X2 = 0; @@ -249,4 +249,4 @@ protected: } } -#endif /* _TGF01_H_ */ +#endif /* _TGF_B_H_ */ diff --git a/incl/iss/arch/tgf02.h b/incl/iss/arch/tgf_c.h similarity index 92% rename from incl/iss/arch/tgf02.h rename to incl/iss/arch/tgf_c.h index a2d1ca3..a008841 100644 --- a/incl/iss/arch/tgf02.h +++ b/incl/iss/arch/tgf_c.h @@ -31,8 +31,8 @@ *******************************************************************************/ -#ifndef _TGF02_H_ -#define _TGF02_H_ +#ifndef _TGF_C_H_ +#define _TGF_C_H_ #include #include @@ -42,11 +42,11 @@ namespace iss { namespace arch { -struct tgf02; +struct tgf_c; -template <> struct traits { +template <> struct traits { - constexpr static char const* const core_type = "TGF02"; + constexpr static char const* const core_type = "TGF_C"; static constexpr std::array reg_names{ {"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31", "pc"}}; @@ -156,15 +156,15 @@ template <> struct traits { enum mem_type_e { MEM, CSR, FENCE, RES }; }; -struct tgf02: public arch_if { +struct tgf_c: public arch_if { - using virt_addr_t = typename traits::virt_addr_t; - using phys_addr_t = typename traits::phys_addr_t; - using reg_t = typename traits::reg_t; - using addr_t = typename traits::addr_t; + using virt_addr_t = typename traits::virt_addr_t; + using phys_addr_t = typename traits::phys_addr_t; + using reg_t = typename traits::reg_t; + using addr_t = typename traits::addr_t; - tgf02(); - ~tgf02(); + tgf_c(); + ~tgf_c(); void reset(uint64_t address=0) override; @@ -185,9 +185,9 @@ struct tgf02: public arch_if { inline uint64_t stop_code() { return interrupt_sim; } inline phys_addr_t v2p(const iss::addr_t& addr){ - if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || + if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || addr_mode[static_cast(addr.access)&0x3]==address_type::PHYSICAL) { - return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); + return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); } else return virt2phys(addr); } @@ -199,7 +199,7 @@ struct tgf02: public arch_if { inline uint32_t get_last_branch() { return reg.last_branch; } protected: - struct TGF02_regs { + struct TGF_C_regs { uint32_t X0 = 0; uint32_t X1 = 0; uint32_t X2 = 0; @@ -249,4 +249,4 @@ protected: } } -#endif /* _TGF02_H_ */ +#endif /* _TGF_C_H_ */ diff --git a/src/iss/tgf01.cpp b/src/iss/tgf_b.cpp similarity index 84% rename from src/iss/tgf01.cpp rename to src/iss/tgf_b.cpp index 49200c3..f757e84 100644 --- a/src/iss/tgf01.cpp +++ b/src/iss/tgf_b.cpp @@ -32,26 +32,26 @@ #include "util/ities.h" #include -#include +#include #include #include #include using namespace iss::arch; -constexpr std::array iss::arch::traits::reg_names; -constexpr std::array iss::arch::traits::reg_aliases; -constexpr std::array iss::arch::traits::reg_bit_widths; -constexpr std::array iss::arch::traits::reg_byte_offsets; +constexpr std::array iss::arch::traits::reg_names; +constexpr std::array iss::arch::traits::reg_aliases; +constexpr std::array iss::arch::traits::reg_bit_widths; +constexpr std::array iss::arch::traits::reg_byte_offsets; -tgf01::tgf01() { +tgf_b::tgf_b() { reg.icount = 0; } -tgf01::~tgf01() = default; +tgf_b::~tgf_b() = default; -void tgf01::reset(uint64_t address) { - for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); +void tgf_b::reset(uint64_t address) { + for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); reg.PC=address; reg.NEXT_PC=reg.PC; reg.trap_state=0; @@ -59,11 +59,11 @@ void tgf01::reset(uint64_t address) { reg.icount=0; } -uint8_t *tgf01::get_regs_base_ptr() { +uint8_t *tgf_b::get_regs_base_ptr() { return reinterpret_cast(®); } -tgf01::phys_addr_t tgf01::virt2phys(const iss::addr_t &pc) { +tgf_b::phys_addr_t tgf_b::virt2phys(const iss::addr_t &pc) { return phys_addr_t(pc); // change logical address to physical address } diff --git a/src/iss/tgf02.cpp b/src/iss/tgf_c.cpp similarity index 84% rename from src/iss/tgf02.cpp rename to src/iss/tgf_c.cpp index 7a238c1..93f818f 100644 --- a/src/iss/tgf02.cpp +++ b/src/iss/tgf_c.cpp @@ -32,26 +32,26 @@ #include "util/ities.h" #include -#include +#include #include #include #include using namespace iss::arch; -constexpr std::array iss::arch::traits::reg_names; -constexpr std::array iss::arch::traits::reg_aliases; -constexpr std::array iss::arch::traits::reg_bit_widths; -constexpr std::array iss::arch::traits::reg_byte_offsets; +constexpr std::array iss::arch::traits::reg_names; +constexpr std::array iss::arch::traits::reg_aliases; +constexpr std::array iss::arch::traits::reg_bit_widths; +constexpr std::array iss::arch::traits::reg_byte_offsets; -tgf02::tgf02() { +tgf_c::tgf_c() { reg.icount = 0; } -tgf02::~tgf02() = default; +tgf_c::~tgf_c() = default; -void tgf02::reset(uint64_t address) { - for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); +void tgf_c::reset(uint64_t address) { + for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); reg.PC=address; reg.NEXT_PC=reg.PC; reg.trap_state=0; @@ -59,11 +59,11 @@ void tgf02::reset(uint64_t address) { reg.icount=0; } -uint8_t *tgf02::get_regs_base_ptr() { +uint8_t *tgf_c::get_regs_base_ptr() { return reinterpret_cast(®); } -tgf02::phys_addr_t tgf02::virt2phys(const iss::addr_t &pc) { +tgf_c::phys_addr_t tgf_c::virt2phys(const iss::addr_t &pc) { return phys_addr_t(pc); // change logical address to physical address } diff --git a/src/main.cpp b/src/main.cpp index 817d9ee..b44af9f 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -36,8 +36,8 @@ #include #include #include -#include -#include +#include +#include #ifdef WITH_LLVM #include #endif @@ -84,7 +84,7 @@ int main(int argc, char *argv[]) { ("mem,m", po::value(), "the memory input file") ("plugin,p", po::value>(), "plugin to activate") ("backend", po::value()->default_value("tcc"), "the memory input file") - ("isa", po::value()->default_value("tgf02"), "isa to use for simulation"); + ("isa", po::value()->default_value("tgf_c"), "isa to use for simulation"); // clang-format on auto parsed = po::command_line_parser(argc, argv).options(desc).allow_unregistered().run(); try { @@ -129,12 +129,12 @@ int main(int argc, char *argv[]) { vm_ptr vm{nullptr}; cpu_ptr cpu{nullptr}; std::string isa_opt(clim["isa"].as()); - if (isa_opt == "tgf01") { + if (isa_opt == "tgf_b") { std::tie(cpu, vm) = - create_cpu(clim["backend"].as(), clim["gdb-port"].as()); - } else if (isa_opt == "tgf02") { + create_cpu(clim["backend"].as(), clim["gdb-port"].as()); + } else if (isa_opt == "tgf_c") { std::tie(cpu, vm) = - create_cpu(clim["backend"].as(), clim["gdb-port"].as()); + create_cpu(clim["backend"].as(), clim["gdb-port"].as()); } else { LOG(ERROR) << "Illegal argument value for '--isa': " << clim["isa"].as() << std::endl; return 127; @@ -174,7 +174,7 @@ int main(int argc, char *argv[]) { } uint64_t start_address = 0; if (clim.count("mem")) - vm->get_arch()->load_file(clim["mem"].as(), iss::arch::traits::MEM); + vm->get_arch()->load_file(clim["mem"].as(), iss::arch::traits::MEM); if (clim.count("elf")) for (std::string input : clim["elf"].as>()) { auto start_addr = vm->get_arch()->load_file(input); diff --git a/src/sysc/core_complex.cpp b/src/sysc/core_complex.cpp index 772c9c9..505e1d0 100644 --- a/src/sysc/core_complex.cpp +++ b/src/sysc/core_complex.cpp @@ -32,7 +32,7 @@ #include "sysc/core_complex.h" #include "iss/arch/riscv_hart_m_p.h" -#include "iss/arch/tgf02.h" +#include "iss/arch/tgf_c.h" #include "iss/debugger/encoderdecoder.h" #include "iss/debugger/gdb_session.h" #include "iss/debugger/server.h" @@ -59,7 +59,7 @@ namespace { iss::debugger::encoder_decoder encdec; } -using core_type = iss::arch::tgf02; +using core_type = iss::arch::tgf_c; namespace { diff --git a/src/vm/interp/vm_tgf01.cpp b/src/vm/interp/vm_tgf_b.cpp similarity index 99% rename from src/vm/interp/vm_tgf01.cpp rename to src/vm/interp/vm_tgf_b.cpp index 9e13b96..7b0987a 100644 --- a/src/vm/interp/vm_tgf01.cpp +++ b/src/vm/interp/vm_tgf_b.cpp @@ -31,7 +31,7 @@ *******************************************************************************/ #include "../fp_functions.h" -#include +#include #include #include #include @@ -50,7 +50,7 @@ namespace iss { namespace interp { -namespace tgf01 { +namespace tgf_b { using namespace iss::arch; using namespace iss::debugger; @@ -2063,8 +2063,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(virt_addr_t star } // namespace mnrv32 template <> -std::unique_ptr create(arch::tgf01 *core, unsigned short port, bool dump) { - auto ret = new tgf01::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_b *core, unsigned short port, bool dump) { + auto ret = new tgf_b::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/interp/vm_tgf02.cpp b/src/vm/interp/vm_tgf_c.cpp similarity index 99% rename from src/vm/interp/vm_tgf02.cpp rename to src/vm/interp/vm_tgf_c.cpp index 208a1be..07f67a5 100644 --- a/src/vm/interp/vm_tgf02.cpp +++ b/src/vm/interp/vm_tgf_c.cpp @@ -31,7 +31,7 @@ *******************************************************************************/ #include "../fp_functions.h" -#include +#include #include #include #include @@ -50,7 +50,7 @@ namespace iss { namespace interp { -namespace tgf02 { +namespace tgf_c { using namespace iss::arch; using namespace iss::debugger; @@ -3314,8 +3314,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(virt_addr_t star } // namespace mnrv32 template <> -std::unique_ptr create(arch::tgf02 *core, unsigned short port, bool dump) { - auto ret = new tgf02::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_c *core, unsigned short port, bool dump) { + auto ret = new tgf_c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/llvm/vm_tgf01.cpp b/src/vm/llvm/vm_tgf_b.cpp similarity index 99% rename from src/vm/llvm/vm_tgf01.cpp rename to src/vm/llvm/vm_tgf_b.cpp index a69e455..1fc6548 100644 --- a/src/vm/llvm/vm_tgf01.cpp +++ b/src/vm/llvm/vm_tgf_b.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -52,7 +52,7 @@ namespace fp_impl { void add_fp_functions_2_module(::llvm::Module *, unsigned, unsigned); } -namespace tgf01 { +namespace tgf_b { using namespace ::llvm; using namespace iss::arch; using namespace iss::debugger; @@ -2570,11 +2570,11 @@ template inline void vm_impl::gen_trap_check(BasicBlock *b bb, this->trap_blk, 1); } -} // namespace tgf01 +} // namespace tgf_b template <> -std::unique_ptr create(arch::tgf01 *core, unsigned short port, bool dump) { - auto ret = new tgf01::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_b *core, unsigned short port, bool dump) { + auto ret = new tgf_b::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/llvm/vm_tgf02.cpp b/src/vm/llvm/vm_tgf_c.cpp similarity index 99% rename from src/vm/llvm/vm_tgf02.cpp rename to src/vm/llvm/vm_tgf_c.cpp index f23fa2d..aa881d5 100644 --- a/src/vm/llvm/vm_tgf02.cpp +++ b/src/vm/llvm/vm_tgf_c.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -52,7 +52,7 @@ namespace fp_impl { void add_fp_functions_2_module(::llvm::Module *, unsigned, unsigned); } -namespace tgf02 { +namespace tgf_c { using namespace ::llvm; using namespace iss::arch; using namespace iss::debugger; @@ -4151,11 +4151,11 @@ template inline void vm_impl::gen_trap_check(BasicBlock *b bb, this->trap_blk, 1); } -} // namespace tgf02 +} // namespace tgf_c template <> -std::unique_ptr create(arch::tgf02 *core, unsigned short port, bool dump) { - auto ret = new tgf02::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_c *core, unsigned short port, bool dump) { + auto ret = new tgf_c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/tcc/vm_tgf01.cpp b/src/vm/tcc/vm_tgf_b.cpp similarity index 99% rename from src/vm/tcc/vm_tgf01.cpp rename to src/vm/tcc/vm_tgf_b.cpp index 3ba3109..b65c2a1 100644 --- a/src/vm/tcc/vm_tgf01.cpp +++ b/src/vm/tcc/vm_tgf_b.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -49,7 +49,7 @@ namespace iss { namespace tcc { -namespace tgf01 { +namespace tgf_b { using namespace iss::arch; using namespace iss::debugger; @@ -2077,8 +2077,8 @@ template void vm_impl::gen_trap_behavior(tu_builder& tu) { } // namespace mnrv32 template <> -std::unique_ptr create(arch::tgf01 *core, unsigned short port, bool dump) { - auto ret = new tgf01::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_b *core, unsigned short port, bool dump) { + auto ret = new tgf_b::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); } diff --git a/src/vm/tcc/vm_tgf02.cpp b/src/vm/tcc/vm_tgf_c.cpp similarity index 99% rename from src/vm/tcc/vm_tgf02.cpp rename to src/vm/tcc/vm_tgf_c.cpp index 66428b8..c32d982 100644 --- a/src/vm/tcc/vm_tgf02.cpp +++ b/src/vm/tcc/vm_tgf_c.cpp @@ -30,7 +30,7 @@ * *******************************************************************************/ -#include +#include #include #include #include @@ -49,7 +49,7 @@ namespace iss { namespace tcc { -namespace tgf02 { +namespace tgf_c { using namespace iss::arch; using namespace iss::debugger; @@ -3269,8 +3269,8 @@ template void vm_impl::gen_trap_behavior(tu_builder& tu) { } // namespace mnrv32 template <> -std::unique_ptr create(arch::tgf02 *core, unsigned short port, bool dump) { - auto ret = new tgf02::vm_impl(*core, dump); +std::unique_ptr create(arch::tgf_c *core, unsigned short port, bool dump) { + auto ret = new tgf_c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); }