2e955b934236b4be7f7802d9c3ebb3edbaab493a
As the offsets into the TX_THREAD are needed to access certain fields and the members for smp are quite difficult to obtain this was the safest option
Running the RTOS
This repositiory contains prototypical RISC-V implementation of ThreadX designed to run on the RISC-V VP by MINRES (tested on commit d96cd4a).
Building the RTOS
Four presets are provided, targetting RV32 and RV64 combined with GC or IMAC. The presets use rv32imac and rv64imac.
Running on the VP
A run command can look like this:
riscv-vp --isa=rv64gc_m -f build/Debug/main.elf
What is running?
The current implementation is just a demo, taken from the existing threadx qemu implementation.
Description
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