fa665fcc2e
corrects saving of floating point registers The previous implementation always made space for XLEN sized registers, in RV32D this leads to overlaps
main
alex2026-09-16 08:01:11 +02:00
86c9d25b5f
adds markers to scheduler for identification for plugins
alex2026-07-06 12:31:15 +02:00
47e15e1eb9
actually adds linker map to test cases
alex2026-06-14 14:01:30 +02:00
12ae01cda2
WIP: makes moonlight now the base library with no dependencies to be consumed by others
alex2026-04-10 13:14:40 +02:00
ff0f81e9c0
corrects bootup code not tested if tls actually works
alex2026-04-10 13:14:04 +02:00
f989e21bad
makes uart.h now also provide init
alex2026-04-10 13:13:05 +02:00
e3a7a9ccaf
adds missing build system changes from a prio commit
alex2026-04-10 13:12:35 +02:00
c717297b30
removes more dependencies
alex2026-04-10 13:12:05 +02:00
b16a0ed956
splits low_level_init to allow usage of c file this also makes threadx hook into the isrs
alex2026-04-10 13:10:50 +02:00
21f95341af
removes dependency of board.c to libc
alex2026-04-10 13:09:26 +02:00
86025e020d
moves linker script file into moonlight
alex2026-04-10 12:35:55 +02:00
764ccd4a52
adds tracing to thread demo this hardcodes the trace buffer
alex2026-04-10 10:13:14 +02:00
27438ef6a5
also corrects LONG (not just ULONG)
alex2026-04-04 11:45:39 +02:00
f58aa42abd
changes regression such that non-smp test run before smp tests
alex2026-04-02 14:52:02 +02:00
ac1fb36e2c
adds MinSizeRel to the regression
alex2026-04-02 14:49:43 +02:00
c0386ea4a1
makes bootup code work for any number of cores
alex2026-04-02 14:26:24 +02:00
ffc49bc6a9
small formatting
alex2026-04-02 14:25:58 +02:00
8772df619f
adds 64 bit versions to regression
alex2026-04-02 11:38:16 +02:00
a6a6a034d6
removes convoluted generation of offsets Ass ULONG is now 8 bytes on RV64, the SMP offset is the only one left, harcoding it as a magic number is simpler
alex2026-04-02 11:16:02 +02:00
9212d40d86
adds newest version of patched threadx tests
alex2026-04-02 11:00:50 +02:00
c16e6b0446
adjust SMP port to also use ULONG = 8 bytes
alex2026-04-02 10:48:43 +02:00
eda2a85dc1
makes ULONG 64 bit on RV64
alex2026-04-02 10:31:12 +02:00
bdf3893bf2
updates latest image for regression
alex2026-04-01 18:21:20 +02:00
8dfc5ab688
parallelizes ctest and build in regression
alex2026-03-31 22:52:50 +02:00
870a5f9c36
adds newer version of threadx fork; regression tx and smp now works for Debug32 and Release32
alex2026-03-26 16:18:04 +01:00
ab6c2d0bc4
adds newest version of threadx fork ATP Debug32 passes all tx and smp regression tests
alex2026-03-26 15:56:47 +01:00
8a41f3e0fa
small cleanuo to smp asm files
alex2026-03-26 15:55:32 +01:00
1aa9944581
corrects timeout for smp ctest
alex2026-03-25 09:27:44 +01:00
c9c2d2009f
adds regression for smp
alex2026-03-25 08:49:20 +01:00
c11f68d20c
initial test harness for smp regression
alex2026-03-24 18:00:50 +01:00
7253aadd52
corrects alignment for 64bit in port
alex2026-03-24 14:38:16 +01:00
24d22e42f6
moves threadx to minres fork
alex2026-03-24 14:37:47 +01:00
e02a58e25f
switches to tohost based exit code, reducing complexity in deciding failure / pass
alex2026-03-23 16:58:56 +01:00
4e87ae718b
removes patching of kernel tets, as a correct testsuite requires a patched threadx anyways This will not build, as atp threadx is still checked in clean
alex2026-03-23 16:32:33 +01:00
47ba20d762
Changes simulation ending mechanism (exit function) As higher optimization might actually schedule a jump to self while waiting for timer interrupts this is a more robust implementation in that sense
alex2026-03-22 22:47:26 +01:00
59b9e9e7e3
adds explicit dependencies for generated files
alex2026-03-22 21:37:30 +01:00
bbbdae160a
makes the timer tick actually every ms
alex2026-03-22 21:18:40 +01:00
b8d4472657
corrects interrupt disable and restore macros Turns out the port was really that shitty
alex2026-03-22 21:14:39 +01:00
78163ebb99
adds test harness
alex2026-03-22 18:27:07 +01:00
bbad53cc1a
adds all regression tests
alex2026-03-22 17:12:16 +01:00
9947ce8d52
corrects naming of TX_INTERRUPT_SAVE_AREA to meet test expectations Also corrects the sizes, as ULONG is XLEN bits
alex2026-03-22 15:56:00 +01:00
7307a86860
adds ISR check that is closer to productive code This approach patches the existing trap handler to call the test routine
alex2026-03-21 20:27:16 +01:00
8bcbc9881e
Revert "adds testing hook for trap_non_vectored"
alex2026-03-21 20:19:42 +01:00
014cf9f8ee
adds testing hook for trap_non_vectored
alex2026-03-21 20:15:46 +01:00