adds initial low_level_init
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84
port/threadx_smp/src/tx_initialize_low_level.S
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84
port/threadx_smp/src/tx_initialize_low_level.S
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/***************************************************************************
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* Copyright (c) 2024 Microsoft Corporation
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*
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* This program and the accompanying materials are made available under the
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* terms of the MIT License which is available at
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* https://opensource.org/licenses/MIT.
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*
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* SPDX-License-Identifier: MIT
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**************************************************************************/
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#include "csr.h"
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#include "tx_port.h"
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.section .text
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/**************************************************************************/
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_initialize_low_level RISC-V64/GNU */
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/* 6.2.1 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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/* */
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/* DESCRIPTION */
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/* */
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/* This function is responsible for any low-level processor */
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/* initialization, including setting up interrupt vectors, setting */
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/* up a periodic timer interrupt source, saving the system stack */
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/* pointer for use in ISR processing later, and finding the first */
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/* available RAM memory address for tx_application_define. */
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/* */
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/* INPUT */
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/* */
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/* None */
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/* */
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/* OUTPUT */
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/* */
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/* None */
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/* */
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/* CALLS */
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/* */
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/* None */
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/* */
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/* CALLED BY */
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/* */
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/* _tx_initialize_kernel_enter ThreadX entry function */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
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/* */
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/**************************************************************************/
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/* VOID _tx_initialize_low_level(VOID)
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*/
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.global _tx_initialize_low_level
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.weak _tx_initialize_low_level
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.extern __heap_start
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.extern board_init
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_tx_initialize_low_level:
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STORE sp, _tx_thread_system_stack_ptr, t0 // Save system stack pointer
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la t0, __heap_start // Pickup first free address
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STORE t0, _tx_initialize_unused_memory, t1 // Save unused memory address
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li t0, MSTATUS_MIE
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csrrc zero, mstatus, t0 // clear MSTATUS_MIE bit
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li t0, (MSTATUS_MPP_M | MSTATUS_MPIE )
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csrrs zero, mstatus, t0 // set MSTATUS_MPP, MPIE bit
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li t0, (MIE_MTIE | MIE_MSIE | MIE_MEIE)
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csrrs zero, mie, t0 // set mie
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#ifdef __riscv_flen
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li t0, MSTATUS_FS
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csrrs zero, mstatus, t0 // set MSTATUS_FS bit to open f/d isa in riscv
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fscsr x0
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#endif
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addi sp, sp, -8
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STORE ra, 0(sp)
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call board_init
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LOAD ra, 0(sp)
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addi sp, sp, 8
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la t0, trap_entry
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csrw mtvec, t0
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ret
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