applies clang--format
This commit is contained in:
@@ -4,34 +4,39 @@
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#include "gen/aclint.h"
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#include "gen/aclint.h"
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#include <stdint.h>
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#include <stdint.h>
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static void set_aclint_mtime(volatile aclint_t* reg, uint64_t value) {
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static void set_aclint_mtime(volatile aclint_t* reg, uint64_t value)
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{
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set_aclint_mtime_hi(reg, (uint32_t)(value >> 32));
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set_aclint_mtime_hi(reg, (uint32_t)(value >> 32));
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set_aclint_mtime_lo(reg, (uint32_t)value);
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set_aclint_mtime_lo(reg, (uint32_t)value);
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}
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}
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static uint64_t get_aclint_mtime(volatile aclint_t* reg) {
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static uint64_t get_aclint_mtime(volatile aclint_t* reg)
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#if(__riscv_xlen == 64)
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{
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#if (__riscv_xlen == 64)
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// this assume little endianness
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// this assume little endianness
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volatile uint64_t* mtime = (volatile uint64_t*)(uint64_t)(®->MTIME_LO);
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volatile uint64_t* mtime = (volatile uint64_t*)(uint64_t)(®->MTIME_LO);
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return *mtime;
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return *mtime;
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#else
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#else
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uint32_t mtimeh_val;
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uint32_t mtimeh_val;
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uint32_t mtimel_val;
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uint32_t mtimel_val;
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do {
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do
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{
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mtimeh_val = get_aclint_mtime_hi(reg);
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mtimeh_val = get_aclint_mtime_hi(reg);
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mtimel_val = get_aclint_mtime_lo(reg);
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mtimel_val = get_aclint_mtime_lo(reg);
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} while(mtimeh_val != get_aclint_mtime_hi(reg));
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} while (mtimeh_val != get_aclint_mtime_hi(reg));
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return (uint64_t)((((uint64_t)mtimeh_val) << 32) | mtimel_val);
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return (uint64_t)((((uint64_t)mtimeh_val) << 32) | mtimel_val);
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#endif
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#endif
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}
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}
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static void set_aclint_mtimecmp(volatile aclint_t* reg, uint64_t value) {
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static void set_aclint_mtimecmp(volatile aclint_t* reg, uint64_t value)
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{
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set_aclint_mtimecmp0lo(reg, (uint32_t)0xFFFFFFFF);
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set_aclint_mtimecmp0lo(reg, (uint32_t)0xFFFFFFFF);
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set_aclint_mtimecmp0hi(reg, (uint32_t)(value >> 32));
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set_aclint_mtimecmp0hi(reg, (uint32_t)(value >> 32));
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set_aclint_mtimecmp0lo(reg, (uint32_t)value);
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set_aclint_mtimecmp0lo(reg, (uint32_t)value);
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}
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}
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static uint64_t get_aclint_mtimecmp(volatile aclint_t* reg) {
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static uint64_t get_aclint_mtimecmp(volatile aclint_t* reg)
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{
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uint64_t value = ((uint64_t)get_aclint_mtimecmp0hi(reg) << 32) | (uint64_t)get_aclint_mtimecmp0lo(reg);
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uint64_t value = ((uint64_t)get_aclint_mtimecmp0hi(reg) << 32) | (uint64_t)get_aclint_mtimecmp0lo(reg);
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return value;
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return value;
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}
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}
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@@ -17,13 +17,15 @@
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#define TICKNUM_PER_SECOND 32768
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#define TICKNUM_PER_SECOND 32768
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#define TICKNUM_PER_TIMER (TICKNUM_PER_SECOND / 100) // ~ 1ms timer
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#define TICKNUM_PER_TIMER (TICKNUM_PER_SECOND / 100) // ~ 1ms timer
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static inline int hwtimer_init(void) {
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static inline int hwtimer_init(void)
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{
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uint64_t time = get_aclint_mtime(aclint);
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uint64_t time = get_aclint_mtime(aclint);
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set_aclint_mtimecmp(aclint, time + TICKNUM_PER_TIMER);
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set_aclint_mtimecmp(aclint, time + TICKNUM_PER_TIMER);
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return 0;
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return 0;
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}
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}
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static inline int hwtimer_handler(void) {
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static inline int hwtimer_handler(void)
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{
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uint64_t time = get_aclint_mtime(aclint);
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uint64_t time = get_aclint_mtime(aclint);
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set_aclint_mtimecmp(aclint, time + TICKNUM_PER_TIMER);
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set_aclint_mtimecmp(aclint, time + TICKNUM_PER_TIMER);
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return 0;
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return 0;
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@@ -1,8 +1,8 @@
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#include "uart.h"
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#include "gen/ethmac.h"
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#include "aclint.h"
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#include "aclint.h"
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#include "gen/ethmac.h"
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#include "riscv-csr.h"
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#include "riscv-csr.h"
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#include "riscv-traps.h"
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#include "riscv-traps.h"
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#include "uart.h"
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#define PERIPH(TYPE, ADDR) ((volatile TYPE*)(ADDR))
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#define PERIPH(TYPE, ADDR) ((volatile TYPE*)(ADDR))
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#define PERIPH_BASE 0x10000000
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#define PERIPH_BASE 0x10000000
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@@ -21,4 +21,3 @@
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#define GPIO_ORQ 23
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#define GPIO_ORQ 23
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#define ETH0_IRQ 24
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#define ETH0_IRQ 24
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#define ETH1_IRQ 25
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#define ETH1_IRQ 25
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File diff suppressed because it is too large
Load Diff
@@ -9,7 +9,8 @@
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#ifndef RISCV_TRAPS_H
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#ifndef RISCV_TRAPS_H
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#define RISCV_TRAPS_H
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#define RISCV_TRAPS_H
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enum {
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enum
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{
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RISCV_INT_MSI = 3,
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RISCV_INT_MSI = 3,
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RISCV_INT_MTI = 7,
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RISCV_INT_MTI = 7,
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RISCV_INT_MEI = 11,
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RISCV_INT_MEI = 11,
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@@ -21,7 +22,8 @@ enum {
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RISCV_INT_UEI = 8,
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RISCV_INT_UEI = 8,
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};
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};
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enum {
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enum
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{
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RISCV_INT_POS_MSI = 3,
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RISCV_INT_POS_MSI = 3,
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RISCV_INT_POS_MTI = 7,
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RISCV_INT_POS_MTI = 7,
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RISCV_INT_POS_MEI = 11,
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RISCV_INT_POS_MEI = 11,
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@@ -33,36 +35,37 @@ enum {
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RISCV_INT_POS_UEI = 8,
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RISCV_INT_POS_UEI = 8,
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};
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};
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enum {
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enum
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RISCV_INT_MASK_MSI = (1UL<<RISCV_INT_POS_MSI),
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{
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RISCV_INT_MASK_MTI = (1UL<<RISCV_INT_POS_MTI),
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RISCV_INT_MASK_MSI = (1UL << RISCV_INT_POS_MSI),
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RISCV_INT_MASK_MEI = (1UL<<RISCV_INT_POS_MEI),
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RISCV_INT_MASK_MTI = (1UL << RISCV_INT_POS_MTI),
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RISCV_INT_MASK_SSI = (1UL<<RISCV_INT_POS_SSI),
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RISCV_INT_MASK_MEI = (1UL << RISCV_INT_POS_MEI),
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RISCV_INT_MASK_STI = (1UL<<RISCV_INT_POS_STI),
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RISCV_INT_MASK_SSI = (1UL << RISCV_INT_POS_SSI),
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RISCV_INT_MASK_SEI = (1UL<<RISCV_INT_POS_SEI),
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RISCV_INT_MASK_STI = (1UL << RISCV_INT_POS_STI),
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RISCV_INT_MASK_USI = (1UL<<RISCV_INT_POS_USI),
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RISCV_INT_MASK_SEI = (1UL << RISCV_INT_POS_SEI),
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RISCV_INT_MASK_UTI = (1UL<<RISCV_INT_POS_UTI),
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RISCV_INT_MASK_USI = (1UL << RISCV_INT_POS_USI),
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RISCV_INT_MASK_UEI = (1UL<<RISCV_INT_POS_UEI),
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RISCV_INT_MASK_UTI = (1UL << RISCV_INT_POS_UTI),
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RISCV_INT_MASK_UEI = (1UL << RISCV_INT_POS_UEI),
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};
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};
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enum {
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enum
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RISCV_EXCP_INSTRUCTION_ADDRESS_MISALIGNED=0, /* Instruction address misaligned */
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{
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RISCV_EXCP_INSTRUCTION_ACCESS_FAULT=1, /* Instruction access fault */
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RISCV_EXCP_INSTRUCTION_ADDRESS_MISALIGNED = 0, /* Instruction address misaligned */
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RISCV_EXCP_ILLEGAL_INSTRUCTION=2, /* Illegal instruction */
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RISCV_EXCP_INSTRUCTION_ACCESS_FAULT = 1, /* Instruction access fault */
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RISCV_EXCP_BREAKPOINT=3, /* Breakpoint */
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RISCV_EXCP_ILLEGAL_INSTRUCTION = 2, /* Illegal instruction */
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RISCV_EXCP_LOAD_ADDRESS_MISALIGNED=4, /* Load address misaligned */
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RISCV_EXCP_BREAKPOINT = 3, /* Breakpoint */
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RISCV_EXCP_LOAD_ACCESS_FAULT=5, /* Load access fault */
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RISCV_EXCP_LOAD_ADDRESS_MISALIGNED = 4, /* Load address misaligned */
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RISCV_EXCP_STORE_AMO_ADDRESS_MISALIGNED =6, /* Store/AMO address misaligned */
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RISCV_EXCP_LOAD_ACCESS_FAULT = 5, /* Load access fault */
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RISCV_EXCP_STORE_AMO_ACCESS_FAULT=7, /* Store/AMO access fault */
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RISCV_EXCP_STORE_AMO_ADDRESS_MISALIGNED = 6, /* Store/AMO address misaligned */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_U_MODE=8, /* Environment call from U-mode */
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RISCV_EXCP_STORE_AMO_ACCESS_FAULT = 7, /* Store/AMO access fault */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_S_MODE=9, /* Environment call from S-mode */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_U_MODE = 8, /* Environment call from U-mode */
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RISCV_EXCP_RESERVED10=10, /* Reserved */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_S_MODE = 9, /* Environment call from S-mode */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_M_MODE=11, /* Environment call from M-mode */
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RISCV_EXCP_RESERVED10 = 10, /* Reserved */
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RISCV_EXCP_INSTRUCTION_PAGE_FAULT=12, /* Instruction page fault */
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RISCV_EXCP_ENVIRONMENT_CALL_FROM_M_MODE = 11, /* Environment call from M-mode */
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RISCV_EXCP_LOAD_PAGE_FAULT=13, /* Load page fault */
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RISCV_EXCP_INSTRUCTION_PAGE_FAULT = 12, /* Instruction page fault */
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RISCV_EXCP_RESERVED14=14, /* Reserved */
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RISCV_EXCP_LOAD_PAGE_FAULT = 13, /* Load page fault */
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RISCV_EXCP_STORE_AMO_PAGE_FAULT=15, /* Store/AMO page fault */
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RISCV_EXCP_RESERVED14 = 14, /* Reserved */
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RISCV_EXCP_STORE_AMO_PAGE_FAULT = 15, /* Store/AMO page fault */
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};
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};
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#endif /* RISCV_TRAPS_H */
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#endif /* RISCV_TRAPS_H */
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@@ -3,21 +3,32 @@
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#include "gen/uart.h"
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#include "gen/uart.h"
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#include <stdint.h>
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#include <stdint.h>
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static inline uint32_t uart_get_tx_free(volatile uart_t* reg) { return get_uart_rx_tx_reg_tx_free(reg); }
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static inline uint32_t uart_get_tx_free(volatile uart_t* reg)
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{
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return get_uart_rx_tx_reg_tx_free(reg);
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}
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static inline uint32_t uart_get_tx_empty(volatile uart_t* reg) { return get_uart_rx_tx_reg_tx_empty(reg); }
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static inline uint32_t uart_get_tx_empty(volatile uart_t* reg)
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{
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return get_uart_rx_tx_reg_tx_empty(reg);
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}
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static inline uint32_t uart_get_rx_avail(volatile uart_t* reg) { return get_uart_rx_tx_reg_rx_avail(reg); }
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static inline uint32_t uart_get_rx_avail(volatile uart_t* reg)
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{
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return get_uart_rx_tx_reg_rx_avail(reg);
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}
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static inline void uart_write(volatile uart_t* reg, uint8_t data) {
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static inline void uart_write(volatile uart_t* reg, uint8_t data)
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while(get_uart_rx_tx_reg_tx_free(reg) == 0)
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{
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while (get_uart_rx_tx_reg_tx_free(reg) == 0)
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;
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;
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set_uart_rx_tx_reg_data(reg, data);
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set_uart_rx_tx_reg_data(reg, data);
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}
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}
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static inline uint8_t uart_read(volatile uart_t* reg) {
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static inline uint8_t uart_read(volatile uart_t* reg)
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{
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uint32_t res = get_uart_rx_tx_reg_data(reg);
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uint32_t res = get_uart_rx_tx_reg_data(reg);
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while((res & 0x10000) == 0)
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while ((res & 0x10000) == 0)
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res = get_uart_rx_tx_reg_data(reg);
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res = get_uart_rx_tx_reg_data(reg);
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return res;
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return res;
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}
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}
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@@ -17,12 +17,11 @@
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#ifndef VECTOR_TABLE_H
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#ifndef VECTOR_TABLE_H
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#define VECTOR_TABLE_H
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#define VECTOR_TABLE_H
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/** Symbol for machine mode vector table - do not call
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/** Symbol for machine mode vector table - do not call
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*/
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*/
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void riscv_mtvec_table(void) __attribute__ ((naked));
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void riscv_mtvec_table(void) __attribute__((naked));
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void riscv_stvec_table(void) __attribute__ ((naked));
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void riscv_stvec_table(void) __attribute__((naked));
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void riscv_utvec_table(void) __attribute__ ((naked));
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void riscv_utvec_table(void) __attribute__((naked));
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/** Machine mode syncronous exception handler.
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/** Machine mode syncronous exception handler.
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@@ -35,79 +34,77 @@ practice, since user-mode software interrupts are either disabled or
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delegated to user mode.
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delegated to user mode.
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*/
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*/
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void riscv_mtvec_exception(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_exception(void) __attribute__((interrupt("machine")));
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/** Machine mode software interrupt */
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/** Machine mode software interrupt */
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void riscv_mtvec_msi(void) __attribute__ ((interrupt ("machine") ));
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void riscv_mtvec_msi(void) __attribute__((interrupt("machine")));
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/** Machine mode timer interrupt */
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/** Machine mode timer interrupt */
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void riscv_mtvec_mti(void) __attribute__ ((interrupt ("machine") ));
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void riscv_mtvec_mti(void) __attribute__((interrupt("machine")));
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/** Machine mode al interrupt */
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/** Machine mode al interrupt */
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void riscv_mtvec_mei(void) __attribute__ ((interrupt ("machine") ));
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void riscv_mtvec_mei(void) __attribute__((interrupt("machine")));
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/** Supervisor mode software interrupt */
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/** Supervisor mode software interrupt */
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void riscv_mtvec_ssi(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_ssi(void) __attribute__((interrupt("machine")));
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/** Supervisor mode timer interrupt */
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/** Supervisor mode timer interrupt */
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void riscv_mtvec_sti(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_sti(void) __attribute__((interrupt("machine")));
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/** Supervisor mode al interrupt */
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/** Supervisor mode al interrupt */
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void riscv_mtvec_sei(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_sei(void) __attribute__((interrupt("machine")));
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/** Supervisor mode syncronous exception handler. */
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/** Supervisor mode syncronous exception handler. */
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void riscv_stvec_exception(void) __attribute__ ((interrupt ("supervisor")) );
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void riscv_stvec_exception(void) __attribute__((interrupt("supervisor")));
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/** Supervisor mode software interrupt */
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/** Supervisor mode software interrupt */
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void riscv_stvec_ssi(void) __attribute__ ((interrupt ("supervisor")) );
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void riscv_stvec_ssi(void) __attribute__((interrupt("supervisor")));
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/** Supervisor mode timer interrupt */
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/** Supervisor mode timer interrupt */
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void riscv_stvec_sti(void) __attribute__ ((interrupt ("supervisor")) );
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void riscv_stvec_sti(void) __attribute__((interrupt("supervisor")));
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/** Supervisor mode al interrupt */
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/** Supervisor mode al interrupt */
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void riscv_stvec_sei(void) __attribute__ ((interrupt ("supervisor")) );
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void riscv_stvec_sei(void) __attribute__((interrupt("supervisor")));
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/** User mode software interrupt */
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/** User mode software interrupt */
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void riscv_utvec_usi(void) __attribute__ ((interrupt ("user")) );
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void riscv_utvec_usi(void) __attribute__((interrupt("user")));
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/** User mode timer interrupt */
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/** User mode timer interrupt */
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void riscv_utvec_uti(void) __attribute__ ((interrupt ("user")) );
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void riscv_utvec_uti(void) __attribute__((interrupt("user")));
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/** User mode al interrupt */
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/** User mode al interrupt */
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void riscv_utvec_uei(void) __attribute__ ((interrupt ("user")) );
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void riscv_utvec_uei(void) __attribute__((interrupt("user")));
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#ifndef VECTOR_TABLE_MTVEC_PLATFORM_INTS
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#ifndef VECTOR_TABLE_MTVEC_PLATFORM_INTS
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/* Platform interrupts, bits 16+ of mie, mip etc
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/* Platform interrupts, bits 16+ of mie, mip etc
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*/
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*/
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/* Platform interrupt 0, bit 16 of mip/mie */
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/* Platform interrupt 0, bit 16 of mip/mie */
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void riscv_mtvec_platform_irq0(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_platform_irq0(void) __attribute__((interrupt("machine")));
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/* Platform interrupt 1, bit 17 of mip/mie */
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/* Platform interrupt 1, bit 17 of mip/mie */
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void riscv_mtvec_platform_irq1(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_platform_irq1(void) __attribute__((interrupt("machine")));
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/* Platform interrupt 2, bit 18 of mip/mie */
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/* Platform interrupt 2, bit 18 of mip/mie */
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void riscv_mtvec_platform_irq2(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_platform_irq2(void) __attribute__((interrupt("machine")));
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/* Platform interrupt 3, bit 19 of mip/mie */
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/* Platform interrupt 3, bit 19 of mip/mie */
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void riscv_mtvec_platform_irq3(void) __attribute__ ((interrupt ("machine")) );
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void riscv_mtvec_platform_irq3(void) __attribute__((interrupt("machine")));
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/* Platform interrupt 4, bit 20 of mip/mie */
|
/* Platform interrupt 4, bit 20 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq4(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq4(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 5, bit 21 of mip/mie */
|
/* Platform interrupt 5, bit 21 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq5(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq5(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 6, bit 22 of mip/mie */
|
/* Platform interrupt 6, bit 22 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq6(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq6(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 7, bit 23 of mip/mie */
|
/* Platform interrupt 7, bit 23 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq7(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq7(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 8, bit 24 of mip/mie */
|
/* Platform interrupt 8, bit 24 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq8(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq8(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 9, bit 25 of mip/mie */
|
/* Platform interrupt 9, bit 25 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq9(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq9(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 10, bit 26 of mip/mie */
|
/* Platform interrupt 10, bit 26 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq10(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq10(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 11, bit 27 of mip/mie */
|
/* Platform interrupt 11, bit 27 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq11(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq11(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 12, bit 28 of mip/mie */
|
/* Platform interrupt 12, bit 28 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq12(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq12(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 13, bit 29 of mip/mie */
|
/* Platform interrupt 13, bit 29 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq13(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq13(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 14, bit 30 of mip/mie */
|
/* Platform interrupt 14, bit 30 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq14(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq14(void) __attribute__((interrupt("machine")));
|
||||||
/* Platform interrupt 15, bit 31 of mip/mie */
|
/* Platform interrupt 15, bit 31 of mip/mie */
|
||||||
void riscv_mtvec_platform_irq15(void) __attribute__ ((interrupt ("machine")) );
|
void riscv_mtvec_platform_irq15(void) __attribute__((interrupt("machine")));
|
||||||
|
|
||||||
|
|
||||||
#endif // #ifndef VECTOR_TABLE_MTVEC_PLATFORM_INTS
|
#endif // #ifndef VECTOR_TABLE_MTVEC_PLATFORM_INTS
|
||||||
|
|
||||||
|
|
||||||
#endif // #ifndef VECTOR_TABLE_H
|
#endif // #ifndef VECTOR_TABLE_H
|
||||||
@@ -8,11 +8,9 @@
|
|||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
**************************************************************************/
|
**************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
#ifndef CSR_H
|
#ifndef CSR_H
|
||||||
#define CSR_H
|
#define CSR_H
|
||||||
|
|
||||||
|
|
||||||
// Machine Status Register, mstatus
|
// Machine Status Register, mstatus
|
||||||
#define MSTATUS_MPP_MASK (3L << 11) // previous mode.
|
#define MSTATUS_MPP_MASK (3L << 11) // previous mode.
|
||||||
#define MSTATUS_MPP_M (3L << 11)
|
#define MSTATUS_MPP_M (3L << 11)
|
||||||
@@ -51,20 +49,20 @@
|
|||||||
static inline uint64_t riscv_get_core()
|
static inline uint64_t riscv_get_core()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, mhartid" : "=r" (x) );
|
asm volatile("csrr %0, mhartid" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_mstatus()
|
static inline uint64_t riscv_get_mstatus()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, mstatus" : "=r" (x) );
|
asm volatile("csrr %0, mstatus" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_mstatus(uint64_t x)
|
static inline void riscv_writ_mstatus(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw mstatus, %0" : : "r" (x));
|
asm volatile("csrw mstatus, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// machine exception program counter, holds the
|
// machine exception program counter, holds the
|
||||||
@@ -72,56 +70,56 @@ static inline void riscv_writ_mstatus(uint64_t x)
|
|||||||
// exception will go.
|
// exception will go.
|
||||||
static inline void riscv_writ_mepc(uint64_t x)
|
static inline void riscv_writ_mepc(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw mepc, %0" : : "r" (x));
|
asm volatile("csrw mepc, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_sstatus()
|
static inline uint64_t riscv_get_sstatus()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, sstatus" : "=r" (x) );
|
asm volatile("csrr %0, sstatus" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_sstatus(uint64_t x)
|
static inline void riscv_writ_sstatus(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw sstatus, %0" : : "r" (x));
|
asm volatile("csrw sstatus, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Supervisor Interrupt Pending
|
// Supervisor Interrupt Pending
|
||||||
static inline uint64_t riscv_get_sip()
|
static inline uint64_t riscv_get_sip()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, sip" : "=r" (x) );
|
asm volatile("csrr %0, sip" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_sip(uint64_t x)
|
static inline void riscv_writ_sip(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw sip, %0" : : "r" (x));
|
asm volatile("csrw sip, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_sie()
|
static inline uint64_t riscv_get_sie()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, sie" : "=r" (x) );
|
asm volatile("csrr %0, sie" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_sie(uint64_t x)
|
static inline void riscv_writ_sie(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw sie, %0" : : "r" (x));
|
asm volatile("csrw sie, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_mie()
|
static inline uint64_t riscv_get_mie()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, mie" : "=r" (x) );
|
asm volatile("csrr %0, mie" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_mie(uint64_t x)
|
static inline void riscv_writ_mie(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw mie, %0" : : "r" (x));
|
asm volatile("csrw mie, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// supervisor exception program counter, holds the
|
// supervisor exception program counter, holds the
|
||||||
@@ -129,13 +127,13 @@ static inline void riscv_writ_mie(uint64_t x)
|
|||||||
// exception will go.
|
// exception will go.
|
||||||
static inline void riscv_writ_sepc(uint64_t x)
|
static inline void riscv_writ_sepc(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw sepc, %0" : : "r" (x));
|
asm volatile("csrw sepc, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_sepc()
|
static inline uint64_t riscv_get_sepc()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, sepc" : "=r" (x) );
|
asm volatile("csrr %0, sepc" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -143,39 +141,39 @@ static inline uint64_t riscv_get_sepc()
|
|||||||
static inline uint64_t riscv_get_medeleg()
|
static inline uint64_t riscv_get_medeleg()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, medeleg" : "=r" (x) );
|
asm volatile("csrr %0, medeleg" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_medeleg(uint64_t x)
|
static inline void riscv_writ_medeleg(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw medeleg, %0" : : "r" (x));
|
asm volatile("csrw medeleg, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Machine Interrupt Delegation
|
// Machine Interrupt Delegation
|
||||||
static inline uint64_t riscv_get_mideleg()
|
static inline uint64_t riscv_get_mideleg()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, mideleg" : "=r" (x) );
|
asm volatile("csrr %0, mideleg" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_mideleg(uint64_t x)
|
static inline void riscv_writ_mideleg(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw mideleg, %0" : : "r" (x));
|
asm volatile("csrw mideleg, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Supervisor Trap-Vector Base Address
|
// Supervisor Trap-Vector Base Address
|
||||||
// low two bits are mode.
|
// low two bits are mode.
|
||||||
static inline void riscv_writ_stvec(uint64_t x)
|
static inline void riscv_writ_stvec(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw stvec, %0" : : "r" (x));
|
asm volatile("csrw stvec, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_stvec()
|
static inline uint64_t riscv_get_stvec()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, stvec" : "=r" (x) );
|
asm volatile("csrr %0, stvec" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -184,14 +182,14 @@ static inline uint64_t riscv_get_stimecmp()
|
|||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
// asm volatile("csrr %0, stimecmp" : "=r" (x) );
|
// asm volatile("csrr %0, stimecmp" : "=r" (x) );
|
||||||
asm volatile("csrr %0, 0x14d" : "=r" (x) );
|
asm volatile("csrr %0, 0x14d" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_stimecmp(uint64_t x)
|
static inline void riscv_writ_stimecmp(uint64_t x)
|
||||||
{
|
{
|
||||||
// asm volatile("csrw stimecmp, %0" : : "r" (x));
|
// asm volatile("csrw stimecmp, %0" : : "r" (x));
|
||||||
asm volatile("csrw 0x14d, %0" : : "r" (x));
|
asm volatile("csrw 0x14d, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Machine Environment Configuration Register
|
// Machine Environment Configuration Register
|
||||||
@@ -199,38 +197,38 @@ static inline uint64_t riscv_get_menvcfg()
|
|||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
// asm volatile("csrr %0, menvcfg" : "=r" (x) );
|
// asm volatile("csrr %0, menvcfg" : "=r" (x) );
|
||||||
asm volatile("csrr %0, 0x30a" : "=r" (x) );
|
asm volatile("csrr %0, 0x30a" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_menvcfg(uint64_t x)
|
static inline void riscv_writ_menvcfg(uint64_t x)
|
||||||
{
|
{
|
||||||
// asm volatile("csrw menvcfg, %0" : : "r" (x));
|
// asm volatile("csrw menvcfg, %0" : : "r" (x));
|
||||||
asm volatile("csrw 0x30a, %0" : : "r" (x));
|
asm volatile("csrw 0x30a, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// Physical Memory Protection
|
// Physical Memory Protection
|
||||||
static inline void riscv_writ_pmpcfg0(uint64_t x)
|
static inline void riscv_writ_pmpcfg0(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw pmpcfg0, %0" : : "r" (x));
|
asm volatile("csrw pmpcfg0, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_pmpaddr0(uint64_t x)
|
static inline void riscv_writ_pmpaddr0(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw pmpaddr0, %0" : : "r" (x));
|
asm volatile("csrw pmpaddr0, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
// supervisor address translation and protection;
|
// supervisor address translation and protection;
|
||||||
// holds the address of the page table.
|
// holds the address of the page table.
|
||||||
static inline void riscv_writ_satp(uint64_t x)
|
static inline void riscv_writ_satp(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw satp, %0" : : "r" (x));
|
asm volatile("csrw satp, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_satp()
|
static inline uint64_t riscv_get_satp()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, satp" : "=r" (x) );
|
asm volatile("csrr %0, satp" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -238,7 +236,7 @@ static inline uint64_t riscv_get_satp()
|
|||||||
static inline uint64_t riscv_get_scause()
|
static inline uint64_t riscv_get_scause()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, scause" : "=r" (x) );
|
asm volatile("csrr %0, scause" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -246,20 +244,20 @@ static inline uint64_t riscv_get_scause()
|
|||||||
static inline uint64_t riscv_get_stval()
|
static inline uint64_t riscv_get_stval()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, stval" : "=r" (x) );
|
asm volatile("csrr %0, stval" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Machine-mode Counter-Enable
|
// Machine-mode Counter-Enable
|
||||||
static inline void riscv_writ_mcounteren(uint64_t x)
|
static inline void riscv_writ_mcounteren(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("csrw mcounteren, %0" : : "r" (x));
|
asm volatile("csrw mcounteren, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_mcounteren()
|
static inline uint64_t riscv_get_mcounteren()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, mcounteren" : "=r" (x) );
|
asm volatile("csrr %0, mcounteren" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -267,7 +265,7 @@ static inline uint64_t riscv_get_mcounteren()
|
|||||||
static inline uint64_t riscv_get_time()
|
static inline uint64_t riscv_get_time()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("csrr %0, time" : "=r" (x) );
|
asm volatile("csrr %0, time" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -296,7 +294,7 @@ static inline int riscv_sintr_get()
|
|||||||
|
|
||||||
static inline void riscv_sintr_restore(int x)
|
static inline void riscv_sintr_restore(int x)
|
||||||
{
|
{
|
||||||
if(x)
|
if (x)
|
||||||
riscv_sintr_on();
|
riscv_sintr_on();
|
||||||
else
|
else
|
||||||
riscv_sintr_off();
|
riscv_sintr_off();
|
||||||
@@ -327,7 +325,7 @@ static inline int riscv_mintr_get()
|
|||||||
|
|
||||||
static inline void riscv_mintr_restore(int x)
|
static inline void riscv_mintr_restore(int x)
|
||||||
{
|
{
|
||||||
if(x)
|
if (x)
|
||||||
riscv_mintr_on();
|
riscv_mintr_on();
|
||||||
else
|
else
|
||||||
riscv_mintr_off();
|
riscv_mintr_off();
|
||||||
@@ -336,7 +334,7 @@ static inline void riscv_mintr_restore(int x)
|
|||||||
static inline uint64_t riscv_get_sp()
|
static inline uint64_t riscv_get_sp()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("mv %0, sp" : "=r" (x) );
|
asm volatile("mv %0, sp" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -345,19 +343,19 @@ static inline uint64_t riscv_get_sp()
|
|||||||
static inline uint64_t riscv_get_tp()
|
static inline uint64_t riscv_get_tp()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("mv %0, tp" : "=r" (x) );
|
asm volatile("mv %0, tp" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void riscv_writ_tp(uint64_t x)
|
static inline void riscv_writ_tp(uint64_t x)
|
||||||
{
|
{
|
||||||
asm volatile("mv tp, %0" : : "r" (x));
|
asm volatile("mv tp, %0" : : "r"(x));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline uint64_t riscv_get_ra()
|
static inline uint64_t riscv_get_ra()
|
||||||
{
|
{
|
||||||
uint64_t x;
|
uint64_t x;
|
||||||
asm volatile("mv %0, ra" : "=r" (x) );
|
asm volatile("mv %0, ra" : "=r"(x));
|
||||||
return x;
|
return x;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -131,21 +131,22 @@
|
|||||||
extern volatile ULONG TX_THREAD_GET_SYSTEM_STATE();
|
extern volatile ULONG TX_THREAD_GET_SYSTEM_STATE();
|
||||||
|
|
||||||
#define NX_THREADS_ONLY_CALLER_CHECKING \
|
#define NX_THREADS_ONLY_CALLER_CHECKING \
|
||||||
if((TX_THREAD_GET_SYSTEM_STATE()) || (_tx_thread_current_ptr == TX_NULL) || (_tx_thread_current_ptr == &_tx_timer_thread)) \
|
if ((TX_THREAD_GET_SYSTEM_STATE()) || (_tx_thread_current_ptr == TX_NULL) || \
|
||||||
|
(_tx_thread_current_ptr == &_tx_timer_thread)) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_INIT_AND_THREADS_CALLER_CHECKING \
|
#define NX_INIT_AND_THREADS_CALLER_CHECKING \
|
||||||
if(((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) || \
|
if (((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) || \
|
||||||
(_tx_thread_current_ptr == &_tx_timer_thread)) \
|
(_tx_thread_current_ptr == &_tx_timer_thread)) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_NOT_ISR_CALLER_CHECKING \
|
#define NX_NOT_ISR_CALLER_CHECKING \
|
||||||
if((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) \
|
if ((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_THREAD_WAIT_CALLER_CHECKING \
|
#define NX_THREAD_WAIT_CALLER_CHECKING \
|
||||||
if((wait_option) && \
|
if ((wait_option) && ((_tx_thread_current_ptr == NX_NULL) || (TX_THREAD_GET_SYSTEM_STATE()) || \
|
||||||
((_tx_thread_current_ptr == NX_NULL) || (TX_THREAD_GET_SYSTEM_STATE()) || (_tx_thread_current_ptr == &_tx_timer_thread))) \
|
(_tx_thread_current_ptr == &_tx_timer_thread))) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
@@ -155,19 +156,19 @@
|
|||||||
extern volatile ULONG TX_THREAD_GET_SYSTEM_STATE();
|
extern volatile ULONG TX_THREAD_GET_SYSTEM_STATE();
|
||||||
|
|
||||||
#define NX_THREADS_ONLY_CALLER_CHECKING \
|
#define NX_THREADS_ONLY_CALLER_CHECKING \
|
||||||
if((TX_THREAD_GET_SYSTEM_STATE()) || (_tx_thread_current_ptr == TX_NULL)) \
|
if ((TX_THREAD_GET_SYSTEM_STATE()) || (_tx_thread_current_ptr == TX_NULL)) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_INIT_AND_THREADS_CALLER_CHECKING \
|
#define NX_INIT_AND_THREADS_CALLER_CHECKING \
|
||||||
if(((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0)))) \
|
if (((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0)))) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_NOT_ISR_CALLER_CHECKING \
|
#define NX_NOT_ISR_CALLER_CHECKING \
|
||||||
if((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) \
|
if ((TX_THREAD_GET_SYSTEM_STATE()) && (TX_THREAD_GET_SYSTEM_STATE() < ((ULONG)0xF0F0F0F0))) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#define NX_THREAD_WAIT_CALLER_CHECKING \
|
#define NX_THREAD_WAIT_CALLER_CHECKING \
|
||||||
if((wait_option) && ((_tx_thread_current_ptr == NX_NULL) || (TX_THREAD_GET_SYSTEM_STATE()))) \
|
if ((wait_option) && ((_tx_thread_current_ptr == NX_NULL) || (TX_THREAD_GET_SYSTEM_STATE()))) \
|
||||||
return (NX_CALLER_ERROR);
|
return (NX_CALLER_ERROR);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -430,7 +430,7 @@
|
|||||||
|
|
||||||
/* Automatically define NX_TCP_ACK_EVERY_N_PACKETS to 1 if NX_TCP_IMMEDIATE_ACK is defined.
|
/* Automatically define NX_TCP_ACK_EVERY_N_PACKETS to 1 if NX_TCP_IMMEDIATE_ACK is defined.
|
||||||
This is needed for backward compatibility. */
|
This is needed for backward compatibility. */
|
||||||
#if(defined(NX_TCP_IMMEDIATE_ACK) && !defined(NX_TCP_ACK_EVERY_N_PACKETS))
|
#if (defined(NX_TCP_IMMEDIATE_ACK) && !defined(NX_TCP_ACK_EVERY_N_PACKETS))
|
||||||
#define NX_TCP_ACK_EVERY_N_PACKETS 1
|
#define NX_TCP_ACK_EVERY_N_PACKETS 1
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@@ -765,11 +765,12 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C"
|
||||||
|
{
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
int rand(void);
|
int rand(void);
|
||||||
void srand(unsigned seed);
|
void srand(unsigned seed);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -67,8 +67,8 @@
|
|||||||
#define LOG_REGBYTES 2
|
#define LOG_REGBYTES 2
|
||||||
#endif
|
#endif
|
||||||
#define REGBYTES (1 << LOG_REGBYTES)
|
#define REGBYTES (1 << LOG_REGBYTES)
|
||||||
#define TX_THREAD_STACK_END_OFFSET 2*4 + 2*REGBYTES
|
#define TX_THREAD_STACK_END_OFFSET 2 * 4 + 2 * REGBYTES
|
||||||
#define TX_THREAD_TIME_SLICE_OFFSET 3*4+ 3*REGBYTES
|
#define TX_THREAD_TIME_SLICE_OFFSET 3 * 4 + 3 * REGBYTES
|
||||||
|
|
||||||
#else /*not __ASSEMBLER__ */
|
#else /*not __ASSEMBLER__ */
|
||||||
|
|
||||||
@@ -248,7 +248,9 @@ ULONG64 _tx_thread_interrupt_control(unsigned int new_posture);
|
|||||||
#define TX_INTERRUPT_SAVE_AREA ULONG64 interrupt_save;
|
#define TX_INTERRUPT_SAVE_AREA ULONG64 interrupt_save;
|
||||||
/* Atomically read mstatus into interrupt_save and clear bit 3 of mstatus. */
|
/* Atomically read mstatus into interrupt_save and clear bit 3 of mstatus. */
|
||||||
#define TX_DISABLE \
|
#define TX_DISABLE \
|
||||||
{ __asm__("csrrci %0, mstatus, 0x08" : "=r"(interrupt_save) :); };
|
{ \
|
||||||
|
__asm__("csrrci %0, mstatus, 0x08" : "=r"(interrupt_save) :); \
|
||||||
|
};
|
||||||
/* We only care about mstatus.mie (bit 3), so mask interrupt_save and write to mstatus. */
|
/* We only care about mstatus.mie (bit 3), so mask interrupt_save and write to mstatus. */
|
||||||
#define TX_RESTORE \
|
#define TX_RESTORE \
|
||||||
{ \
|
{ \
|
||||||
|
|||||||
@@ -8,7 +8,6 @@
|
|||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
**************************************************************************/
|
**************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
/**************************************************************************/
|
/**************************************************************************/
|
||||||
/**************************************************************************/
|
/**************************************************************************/
|
||||||
/** */
|
/** */
|
||||||
@@ -19,7 +18,6 @@
|
|||||||
/**************************************************************************/
|
/**************************************************************************/
|
||||||
/**************************************************************************/
|
/**************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
/**************************************************************************/
|
/**************************************************************************/
|
||||||
/* */
|
/* */
|
||||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||||
@@ -71,7 +69,6 @@
|
|||||||
#ifndef TX_USER_H
|
#ifndef TX_USER_H
|
||||||
#define TX_USER_H
|
#define TX_USER_H
|
||||||
|
|
||||||
|
|
||||||
/* Define various build options for the ThreadX port. The application should either make changes
|
/* Define various build options for the ThreadX port. The application should either make changes
|
||||||
here by commenting or un-commenting the conditional compilation defined OR supply the defines
|
here by commenting or un-commenting the conditional compilation defined OR supply the defines
|
||||||
though the compiler's equivalent of the -D option.
|
though the compiler's equivalent of the -D option.
|
||||||
@@ -105,7 +102,6 @@
|
|||||||
therefore return an error if this option is used. This may or may not be desirable for a
|
therefore return an error if this option is used. This may or may not be desirable for a
|
||||||
given application. */
|
given application. */
|
||||||
|
|
||||||
|
|
||||||
/* Override various options with default values already assigned in tx_port.h. Please also refer
|
/* Override various options with default values already assigned in tx_port.h. Please also refer
|
||||||
to tx_port.h for descriptions on each of these options. */
|
to tx_port.h for descriptions on each of these options. */
|
||||||
|
|
||||||
@@ -129,10 +125,8 @@
|
|||||||
version in tx_port.h or here.
|
version in tx_port.h or here.
|
||||||
Note: the actual hardware timer value may need to be changed (usually in tx_initialize_low_level). */
|
Note: the actual hardware timer value may need to be changed (usually in tx_initialize_low_level). */
|
||||||
|
|
||||||
|
|
||||||
#define TX_TIMER_TICKS_PER_SECOND (100) // for moonlight with 32,7kHz Frequency (divided by 1000)
|
#define TX_TIMER_TICKS_PER_SECOND (100) // for moonlight with 32,7kHz Frequency (divided by 1000)
|
||||||
|
|
||||||
|
|
||||||
/* Determine if there is a FileX pointer in the thread control block.
|
/* Determine if there is a FileX pointer in the thread control block.
|
||||||
By default, the pointer is there for legacy/backwards compatibility.
|
By default, the pointer is there for legacy/backwards compatibility.
|
||||||
The pointer must also be there for applications using FileX.
|
The pointer must also be there for applications using FileX.
|
||||||
@@ -225,7 +219,6 @@
|
|||||||
#define TX_DISABLE_NOTIFY_CALLBACKS
|
#define TX_DISABLE_NOTIFY_CALLBACKS
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Determine if the tx_thread_resume and tx_thread_suspend services should have their internal
|
/* Determine if the tx_thread_resume and tx_thread_suspend services should have their internal
|
||||||
code in-line. This results in a larger image, but improves the performance of the thread
|
code in-line. This results in a larger image, but improves the performance of the thread
|
||||||
resume and suspend services. */
|
resume and suspend services. */
|
||||||
@@ -234,7 +227,6 @@
|
|||||||
#define TX_INLINE_THREAD_RESUME_SUSPEND
|
#define TX_INLINE_THREAD_RESUME_SUSPEND
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Determine if the internal ThreadX code is non-interruptable. This results in smaller code
|
/* Determine if the internal ThreadX code is non-interruptable. This results in smaller code
|
||||||
size and less processing overhead, but increases the interrupt lockout time. */
|
size and less processing overhead, but increases the interrupt lockout time. */
|
||||||
|
|
||||||
@@ -242,7 +234,6 @@
|
|||||||
#define TX_NOT_INTERRUPTABLE
|
#define TX_NOT_INTERRUPTABLE
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Determine if the trace event logging code should be enabled. This causes slight increases in
|
/* Determine if the trace event logging code should be enabled. This causes slight increases in
|
||||||
code size and overhead, but provides the ability to generate system trace information which
|
code size and overhead, but provides the ability to generate system trace information which
|
||||||
is available for viewing in TraceX. */
|
is available for viewing in TraceX. */
|
||||||
@@ -251,7 +242,6 @@
|
|||||||
#define TX_ENABLE_EVENT_TRACE
|
#define TX_ENABLE_EVENT_TRACE
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Determine if block pool performance gathering is required by the application. When the following is
|
/* Determine if block pool performance gathering is required by the application. When the following is
|
||||||
defined, ThreadX gathers various block pool performance information. */
|
defined, ThreadX gathers various block pool performance information. */
|
||||||
|
|
||||||
@@ -321,4 +311,3 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
@@ -44,13 +44,15 @@ void _nx_mnrs_network_driver(struct NX_IP_DRIVER_STRUCT* driver_req);
|
|||||||
|
|
||||||
/* Define main entry point. */
|
/* Define main entry point. */
|
||||||
|
|
||||||
int main() {
|
int main()
|
||||||
|
{
|
||||||
/* Enter the ThreadX kernel. */
|
/* Enter the ThreadX kernel. */
|
||||||
tx_kernel_enter();
|
tx_kernel_enter();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Define what the initial system looks like. */
|
/* Define what the initial system looks like. */
|
||||||
void tx_application_define(void* first_unused_memory) {
|
void tx_application_define(void* first_unused_memory)
|
||||||
|
{
|
||||||
CHAR* pointer;
|
CHAR* pointer;
|
||||||
UINT status;
|
UINT status;
|
||||||
puts("Setting up application");
|
puts("Setting up application");
|
||||||
@@ -58,12 +60,14 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
pointer = (CHAR*)first_unused_memory;
|
pointer = (CHAR*)first_unused_memory;
|
||||||
|
|
||||||
/* Create the main thread. */
|
/* Create the main thread. */
|
||||||
tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(
|
||||||
|
&thread_0, "thread 0", thread_0_entry, 0, pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||||
|
|
||||||
pointer = pointer + DEMO_STACK_SIZE;
|
pointer = pointer + DEMO_STACK_SIZE;
|
||||||
|
|
||||||
/* Create the main thread. */
|
/* Create the main thread. */
|
||||||
tx_thread_create(&thread_1, "thread 1", thread_1_entry, 0, pointer, DEMO_STACK_SIZE, 3, 3, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(
|
||||||
|
&thread_1, "thread 1", thread_1_entry, 0, pointer, DEMO_STACK_SIZE, 3, 3, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||||
|
|
||||||
pointer = pointer + DEMO_STACK_SIZE;
|
pointer = pointer + DEMO_STACK_SIZE;
|
||||||
|
|
||||||
@@ -73,19 +77,23 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
/* Create a packet pool. */
|
/* Create a packet pool. */
|
||||||
status = nx_packet_pool_create(&pool_0, "packet_pool0", PACKET_SIZE, pool_buffer, POOL_SIZE);
|
status = nx_packet_pool_create(&pool_0, "packet_pool0", PACKET_SIZE, pool_buffer, POOL_SIZE);
|
||||||
|
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Create an IP instance. */
|
/* Create an IP instance. */
|
||||||
status = nx_ip_create(&ip_0, "eth0", IP_ADDRESS(1, 2, 3, 4), 0xFFFFFF00UL, &pool_0, NETWORK_DRIVER, pointer, 2048, 1);
|
status =
|
||||||
|
nx_ip_create(&ip_0, "eth0", IP_ADDRESS(1, 2, 3, 4), 0xFFFFFF00UL, &pool_0, NETWORK_DRIVER, pointer, 2048, 1);
|
||||||
pointer = pointer + 2048;
|
pointer = pointer + 2048;
|
||||||
|
|
||||||
/* Create another IP instance. */
|
/* Create another IP instance. */
|
||||||
status += nx_ip_create(&ip_1, "eth1", IP_ADDRESS(1, 2, 3, 5), 0xFFFFFF00UL, &pool_0, NETWORK_DRIVER, pointer, 2048, 1);
|
status +=
|
||||||
|
nx_ip_create(&ip_1, "eth1", IP_ADDRESS(1, 2, 3, 5), 0xFFFFFF00UL, &pool_0, NETWORK_DRIVER, pointer, 2048, 1);
|
||||||
pointer = pointer + 2048;
|
pointer = pointer + 2048;
|
||||||
|
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -98,18 +106,21 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
pointer = pointer + 1024;
|
pointer = pointer + 1024;
|
||||||
|
|
||||||
/* Check ARP enable status. */
|
/* Check ARP enable status. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Enable ICMP */
|
/* Enable ICMP */
|
||||||
status = nxd_icmp_enable(&ip_0);
|
status = nxd_icmp_enable(&ip_0);
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
status = nxd_icmp_enable(&ip_1);
|
status = nxd_icmp_enable(&ip_1);
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -122,7 +133,8 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
|
|
||||||
/* Define the test threads. */
|
/* Define the test threads. */
|
||||||
|
|
||||||
void thread_0_entry(ULONG thread_input) {
|
void thread_0_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
NX_PACKET* my_packet;
|
NX_PACKET* my_packet;
|
||||||
@@ -142,14 +154,23 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
server_ipv4_address.nxd_ip_address.v4 = IP_ADDRESS(1, 2, 3, 5);
|
server_ipv4_address.nxd_ip_address.v4 = IP_ADDRESS(1, 2, 3, 5);
|
||||||
/* Loop to repeat things over and over again! */
|
/* Loop to repeat things over and over again! */
|
||||||
puts("Entering client loop");
|
puts("Entering client loop");
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
|
|
||||||
/* Create a socket. */
|
/* Create a socket. */
|
||||||
status = nx_tcp_socket_create(&ip_0, &client_socket, "Client Socket", NX_IP_NORMAL, NX_FRAGMENT_OKAY, NX_IP_TIME_TO_LIVE, 200,
|
status = nx_tcp_socket_create(&ip_0,
|
||||||
NX_NULL, NX_NULL);
|
&client_socket,
|
||||||
|
"Client Socket",
|
||||||
|
NX_IP_NORMAL,
|
||||||
|
NX_FRAGMENT_OKAY,
|
||||||
|
NX_IP_TIME_TO_LIVE,
|
||||||
|
200,
|
||||||
|
NX_NULL,
|
||||||
|
NX_NULL);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -157,7 +178,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_client_socket_bind(&client_socket, 12, NX_WAIT_FOREVER);
|
status = nx_tcp_client_socket_bind(&client_socket, 12, NX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -165,7 +187,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nxd_tcp_client_socket_connect(&client_socket, &server_ipv4_address, 12, NX_IP_PERIODIC_RATE);
|
status = nxd_tcp_client_socket_connect(&client_socket, &server_ipv4_address, 12, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
printf("Error with socket connect: 0x%x\n", status);
|
printf("Error with socket connect: 0x%x\n", status);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@@ -176,7 +199,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_packet_allocate(&pool_0, &my_packet, NX_TCP_PACKET, NX_WAIT_FOREVER);
|
status = nx_packet_allocate(&pool_0, &my_packet, NX_TCP_PACKET, NX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != NX_SUCCESS) {
|
if (status != NX_SUCCESS)
|
||||||
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -184,7 +208,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
nx_packet_data_append(my_packet, DEMO_DATA, sizeof(DEMO_DATA), &pool_0, TX_WAIT_FOREVER);
|
nx_packet_data_append(my_packet, DEMO_DATA, sizeof(DEMO_DATA), &pool_0, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
status = nx_packet_length_get(my_packet, &length);
|
status = nx_packet_length_get(my_packet, &length);
|
||||||
if((status) || (length != sizeof(DEMO_DATA))) {
|
if ((status) || (length != sizeof(DEMO_DATA)))
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -192,7 +217,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_socket_send(&client_socket, my_packet, NX_IP_PERIODIC_RATE);
|
status = nx_tcp_socket_send(&client_socket, my_packet, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Determine if the status is valid. */
|
/* Determine if the status is valid. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
nx_packet_release(my_packet);
|
nx_packet_release(my_packet);
|
||||||
}
|
}
|
||||||
@@ -201,7 +227,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_socket_disconnect(&client_socket, NX_IP_PERIODIC_RATE);
|
status = nx_tcp_socket_disconnect(&client_socket, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Determine if the status is valid. */
|
/* Determine if the status is valid. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -209,7 +236,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_client_socket_unbind(&client_socket);
|
status = nx_tcp_client_socket_unbind(&client_socket);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -217,7 +245,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_socket_delete(&client_socket);
|
status = nx_tcp_socket_delete(&client_socket);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -226,7 +255,8 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_1_entry(ULONG thread_input) {
|
void thread_1_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
NX_PACKET* packet_ptr;
|
NX_PACKET* packet_ptr;
|
||||||
@@ -241,18 +271,27 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_ip_status_check(&ip_1, NX_IP_INITIALIZE_DONE, &actual_status, NX_IP_PERIODIC_RATE);
|
status = nx_ip_status_check(&ip_1, NX_IP_INITIALIZE_DONE, &actual_status, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Check status... */
|
/* Check status... */
|
||||||
if(status != NX_SUCCESS) {
|
if (status != NX_SUCCESS)
|
||||||
|
{
|
||||||
|
|
||||||
error_counter++;
|
error_counter++;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Create a socket. */
|
/* Create a socket. */
|
||||||
status = nx_tcp_socket_create(&ip_1, &server_socket, "Server Socket", NX_IP_NORMAL, NX_FRAGMENT_OKAY, NX_IP_TIME_TO_LIVE, 100, NX_NULL,
|
status = nx_tcp_socket_create(&ip_1,
|
||||||
|
&server_socket,
|
||||||
|
"Server Socket",
|
||||||
|
NX_IP_NORMAL,
|
||||||
|
NX_FRAGMENT_OKAY,
|
||||||
|
NX_IP_TIME_TO_LIVE,
|
||||||
|
100,
|
||||||
|
NX_NULL,
|
||||||
thread_1_disconnect_received);
|
thread_1_disconnect_received);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -260,13 +299,15 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_server_socket_listen(&ip_1, 12, &server_socket, 5, thread_1_connect_received);
|
status = nx_tcp_server_socket_listen(&ip_1, 12, &server_socket, 5, thread_1_connect_received);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Loop to create and establish server connections. */
|
/* Loop to create and establish server connections. */
|
||||||
puts("Entering server loop");
|
puts("Entering server loop");
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
|
|
||||||
/* Increment thread 1's counter. */
|
/* Increment thread 1's counter. */
|
||||||
thread_1_counter++;
|
thread_1_counter++;
|
||||||
@@ -275,7 +316,8 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_server_socket_accept(&server_socket, NX_WAIT_FOREVER);
|
status = nx_tcp_server_socket_accept(&server_socket, NX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -283,9 +325,12 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_socket_receive(&server_socket, &packet_ptr, NX_IP_PERIODIC_RATE);
|
status = nx_tcp_socket_receive(&server_socket, &packet_ptr, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
char buffer[64];
|
char buffer[64];
|
||||||
ULONG size;
|
ULONG size;
|
||||||
nx_packet_data_extract_offset(packet_ptr, 0, buffer, 64, &size);
|
nx_packet_data_extract_offset(packet_ptr, 0, buffer, 64, &size);
|
||||||
@@ -299,7 +344,8 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_socket_disconnect(&server_socket, NX_IP_PERIODIC_RATE);
|
status = nx_tcp_socket_disconnect(&server_socket, NX_IP_PERIODIC_RATE);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -307,7 +353,8 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_server_socket_unaccept(&server_socket);
|
status = nx_tcp_server_socket_unaccept(&server_socket);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -315,24 +362,29 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = nx_tcp_server_socket_relisten(&ip_1, 12, &server_socket);
|
status = nx_tcp_server_socket_relisten(&ip_1, 12, &server_socket);
|
||||||
|
|
||||||
/* Check for error. */
|
/* Check for error. */
|
||||||
if(status) {
|
if (status)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_1_connect_received(NX_TCP_SOCKET* socket_ptr, UINT port) {
|
void thread_1_connect_received(NX_TCP_SOCKET* socket_ptr, UINT port)
|
||||||
|
{
|
||||||
|
|
||||||
/* Check for the proper socket and port. */
|
/* Check for the proper socket and port. */
|
||||||
if((socket_ptr != &server_socket) || (port != 12)) {
|
if ((socket_ptr != &server_socket) || (port != 12))
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_1_disconnect_received(NX_TCP_SOCKET* socket) {
|
void thread_1_disconnect_received(NX_TCP_SOCKET* socket)
|
||||||
|
{
|
||||||
|
|
||||||
/* Check for proper disconnected socket. */
|
/* Check for proper disconnected socket. */
|
||||||
if(socket != &server_socket) {
|
if (socket != &server_socket)
|
||||||
|
{
|
||||||
error_counter++;
|
error_counter++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -51,14 +51,16 @@ void thread_5_entry(ULONG thread_input);
|
|||||||
void thread_6_and_7_entry(ULONG thread_input);
|
void thread_6_and_7_entry(ULONG thread_input);
|
||||||
|
|
||||||
/* Define main entry point. */
|
/* Define main entry point. */
|
||||||
int main() {
|
int main()
|
||||||
|
{
|
||||||
/* Enter the ThreadX kernel. */
|
/* Enter the ThreadX kernel. */
|
||||||
tx_kernel_enter();
|
tx_kernel_enter();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Define what the initial system looks like. */
|
/* Define what the initial system looks like. */
|
||||||
|
|
||||||
void tx_application_define(void* first_unused_memory) {
|
void tx_application_define(void* first_unused_memory)
|
||||||
|
{
|
||||||
|
|
||||||
CHAR* pointer = TX_NULL;
|
CHAR* pointer = TX_NULL;
|
||||||
|
|
||||||
@@ -72,7 +74,8 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
|
|
||||||
/* Create the main thread. */
|
/* Create the main thread. */
|
||||||
tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(
|
||||||
|
&thread_0, "thread 0", thread_0_entry, 0, pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the stack for thread 1. */
|
/* Allocate the stack for thread 1. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
@@ -93,30 +96,67 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
/* Create threads 3 and 4. These threads compete for a ThreadX counting
|
/* Create threads 3 and 4. These threads compete for a ThreadX counting
|
||||||
semaphore. An interesting thing here is that both threads share the same
|
semaphore. An interesting thing here is that both threads share the same
|
||||||
instruction area. */
|
instruction area. */
|
||||||
tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(&thread_3,
|
||||||
|
"thread 3",
|
||||||
|
thread_3_and_4_entry,
|
||||||
|
3,
|
||||||
|
pointer,
|
||||||
|
DEMO_STACK_SIZE,
|
||||||
|
8,
|
||||||
|
8,
|
||||||
|
TX_NO_TIME_SLICE,
|
||||||
|
TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the stack for thread 4. */
|
/* Allocate the stack for thread 4. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
|
|
||||||
tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(&thread_4,
|
||||||
|
"thread 4",
|
||||||
|
thread_3_and_4_entry,
|
||||||
|
4,
|
||||||
|
pointer,
|
||||||
|
DEMO_STACK_SIZE,
|
||||||
|
8,
|
||||||
|
8,
|
||||||
|
TX_NO_TIME_SLICE,
|
||||||
|
TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the stack for thread 5. */
|
/* Allocate the stack for thread 5. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
|
|
||||||
/* Create thread 5. This thread simply pends on an event flag which will be
|
/* Create thread 5. This thread simply pends on an event flag which will be
|
||||||
set by thread_0. */
|
set by thread_0. */
|
||||||
tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(
|
||||||
|
&thread_5, "thread 5", thread_5_entry, 5, pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the stack for thread 6. */
|
/* Allocate the stack for thread 6. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
|
|
||||||
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
|
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
|
||||||
tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(&thread_6,
|
||||||
|
"thread 6",
|
||||||
|
thread_6_and_7_entry,
|
||||||
|
6,
|
||||||
|
pointer,
|
||||||
|
DEMO_STACK_SIZE,
|
||||||
|
8,
|
||||||
|
8,
|
||||||
|
TX_NO_TIME_SLICE,
|
||||||
|
TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the stack for thread 7. */
|
/* Allocate the stack for thread 7. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||||
|
|
||||||
tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
tx_thread_create(&thread_7,
|
||||||
|
"thread 7",
|
||||||
|
thread_6_and_7_entry,
|
||||||
|
7,
|
||||||
|
pointer,
|
||||||
|
DEMO_STACK_SIZE,
|
||||||
|
8,
|
||||||
|
8,
|
||||||
|
TX_NO_TIME_SLICE,
|
||||||
|
TX_AUTO_START);
|
||||||
|
|
||||||
/* Allocate the message queue. */
|
/* Allocate the message queue. */
|
||||||
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_QUEUE_SIZE * sizeof(ULONG), TX_NO_WAIT);
|
tx_byte_allocate(&byte_pool_0, (VOID**)&pointer, DEMO_QUEUE_SIZE * sizeof(ULONG), TX_NO_WAIT);
|
||||||
@@ -148,12 +188,14 @@ void tx_application_define(void* first_unused_memory) {
|
|||||||
|
|
||||||
/* Define the test threads. */
|
/* Define the test threads. */
|
||||||
|
|
||||||
void thread_0_entry(ULONG thread_input) {
|
void thread_0_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
|
|
||||||
/* This thread simply sits in while-forever-sleep loop. */
|
/* This thread simply sits in while-forever-sleep loop. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
puts("[Thread] : thread_0_entry is here!");
|
puts("[Thread] : thread_0_entry is here!");
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
thread_0_counter++;
|
thread_0_counter++;
|
||||||
@@ -165,17 +207,19 @@ void thread_0_entry(ULONG thread_input) {
|
|||||||
status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
|
status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_1_entry(ULONG thread_input) {
|
void thread_1_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
|
|
||||||
/* This thread simply sends messages to a queue shared by thread 2. */
|
/* This thread simply sends messages to a queue shared by thread 2. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
thread_1_counter++;
|
thread_1_counter++;
|
||||||
|
|
||||||
@@ -183,7 +227,7 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
|
status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check completion status. */
|
/* Check completion status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Increment the message sent. */
|
/* Increment the message sent. */
|
||||||
@@ -192,13 +236,15 @@ void thread_1_entry(ULONG thread_input) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_2_entry(ULONG thread_input) {
|
void thread_2_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
ULONG received_message;
|
ULONG received_message;
|
||||||
UINT status;
|
UINT status;
|
||||||
|
|
||||||
/* This thread retrieves messages placed on the queue by thread 1. */
|
/* This thread retrieves messages placed on the queue by thread 1. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
thread_2_counter++;
|
thread_2_counter++;
|
||||||
|
|
||||||
@@ -208,7 +254,7 @@ void thread_2_entry(ULONG thread_input) {
|
|||||||
|
|
||||||
/* Check completion status and make sure the message is what we
|
/* Check completion status and make sure the message is what we
|
||||||
expected. */
|
expected. */
|
||||||
if((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
|
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Otherwise, all is okay. Increment the received message count. */
|
/* Otherwise, all is okay. Increment the received message count. */
|
||||||
@@ -216,17 +262,19 @@ void thread_2_entry(ULONG thread_input) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_3_and_4_entry(ULONG thread_input) {
|
void thread_3_and_4_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
|
|
||||||
/* This function is executed from thread 3 and thread 4. As the loop
|
/* This function is executed from thread 3 and thread 4. As the loop
|
||||||
below shows, these function compete for ownership of semaphore_0. */
|
below shows, these function compete for ownership of semaphore_0. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
puts("[Thread] : thread_3_and_4_entry is here!");
|
puts("[Thread] : thread_3_and_4_entry is here!");
|
||||||
|
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
if(thread_input == 3)
|
if (thread_input == 3)
|
||||||
thread_3_counter++;
|
thread_3_counter++;
|
||||||
else
|
else
|
||||||
thread_4_counter++;
|
thread_4_counter++;
|
||||||
@@ -235,7 +283,7 @@ void thread_3_and_4_entry(ULONG thread_input) {
|
|||||||
status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER);
|
status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Sleep for 2 ticks to hold the semaphore. */
|
/* Sleep for 2 ticks to hold the semaphore. */
|
||||||
@@ -245,18 +293,20 @@ void thread_3_and_4_entry(ULONG thread_input) {
|
|||||||
status = tx_semaphore_put(&semaphore_0);
|
status = tx_semaphore_put(&semaphore_0);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_5_entry(ULONG thread_input) {
|
void thread_5_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
ULONG actual_flags;
|
ULONG actual_flags;
|
||||||
|
|
||||||
/* This thread simply waits for an event in a forever loop. */
|
/* This thread simply waits for an event in a forever loop. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
puts("[Thread] : thread_5_entry is here!");
|
puts("[Thread] : thread_5_entry is here!");
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
thread_5_counter++;
|
thread_5_counter++;
|
||||||
@@ -265,21 +315,23 @@ void thread_5_entry(ULONG thread_input) {
|
|||||||
status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER);
|
status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if((status != TX_SUCCESS) || (actual_flags != 0x1))
|
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void thread_6_and_7_entry(ULONG thread_input) {
|
void thread_6_and_7_entry(ULONG thread_input)
|
||||||
|
{
|
||||||
|
|
||||||
UINT status;
|
UINT status;
|
||||||
|
|
||||||
/* This function is executed from thread 6 and thread 7. As the loop
|
/* This function is executed from thread 6 and thread 7. As the loop
|
||||||
below shows, these function compete for ownership of mutex_0. */
|
below shows, these function compete for ownership of mutex_0. */
|
||||||
while(1) {
|
while (1)
|
||||||
|
{
|
||||||
puts("[Thread] : thread_6_and_7_entry is here!");
|
puts("[Thread] : thread_6_and_7_entry is here!");
|
||||||
/* Increment the thread counter. */
|
/* Increment the thread counter. */
|
||||||
if(thread_input == 6)
|
if (thread_input == 6)
|
||||||
thread_6_counter++;
|
thread_6_counter++;
|
||||||
else
|
else
|
||||||
thread_7_counter++;
|
thread_7_counter++;
|
||||||
@@ -288,7 +340,7 @@ void thread_6_and_7_entry(ULONG thread_input) {
|
|||||||
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Get the mutex again with suspension. This shows
|
/* Get the mutex again with suspension. This shows
|
||||||
@@ -297,7 +349,7 @@ void thread_6_and_7_entry(ULONG thread_input) {
|
|||||||
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Sleep for 2 ticks to hold the mutex. */
|
/* Sleep for 2 ticks to hold the mutex. */
|
||||||
@@ -307,7 +359,7 @@ void thread_6_and_7_entry(ULONG thread_input) {
|
|||||||
status = tx_mutex_put(&mutex_0);
|
status = tx_mutex_put(&mutex_0);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Release the mutex again. This will actually
|
/* Release the mutex again. This will actually
|
||||||
@@ -315,7 +367,7 @@ void thread_6_and_7_entry(ULONG thread_input) {
|
|||||||
status = tx_mutex_put(&mutex_0);
|
status = tx_mutex_put(&mutex_0);
|
||||||
|
|
||||||
/* Check status. */
|
/* Check status. */
|
||||||
if(status != TX_SUCCESS)
|
if (status != TX_SUCCESS)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user