388 lines
8.3 KiB
C
388 lines
8.3 KiB
C
#ifndef _FKI_CLUSTER_INFO_H
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#define _FKI_CLUSTER_INFO_H
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static uint8_t fki_ccc(uint8_t cluster);
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static uint8_t fki_dma(uint8_t cluster);
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static uint8_t fki_axi2stream(uint8_t cluster);
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static uint8_t fki_stream2axi(uint8_t cluster);
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static uint8_t fki_dma_adapter(uint8_t cluster);
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static uint64_t fki_addr_ccc_peMapping(uint8_t cluster);
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static uint64_t fki_addr_sram1(uint8_t cluster);
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static uint64_t fki_addr_sram2(uint8_t cluster);
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static uint64_t fki_addr_cntrl_cva5(uint8_t cluster);
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static uint64_t fki_addr_cntrl_tgc(uint8_t cluster);
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static uint64_t fki_addr_ccc_idxTasks(uint8_t cluster);
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static uint64_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster);
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static uint64_t fki_addr_ccc_idxJobs(uint8_t cluster);
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static uint64_t fki_addr_cntrl_cva5_clusterReg(uint8_t cluster);
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static uint64_t fki_addr_ccc_configMem(uint8_t cluster);
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static uint64_t fki_addr_aes_adapter(uint8_t cluster);
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static uint64_t fki_addr_ut_adapter(uint8_t cluster);
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static uint64_t fki_addr_sram0(uint8_t cluster);
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static uint64_t fki_addr_sram3(uint8_t cluster);
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#define Compute0 2
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#define Compute0_ccc 2,0
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#define Compute0_stream2axi 2,1
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#define Compute0_axi2stream 2,2
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#define Compute0_dma 2,4
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#define Compute0_dma_adapter 2,5
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#define ADDR_Compute0_ccc_idxJobs 0x80004000
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#define BYTES_Compute0_ccc_idxJobs 4096
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#define HIGH_Compute0_ccc_idxJobs 0x80004fff
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#define ADDR_Compute0_ccc_idxTasks 0x80005000
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#define BYTES_Compute0_ccc_idxTasks 4096
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#define HIGH_Compute0_ccc_idxTasks 0x80005fff
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#define ADDR_Compute0_ccc_configMem 0x80000000
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#define BYTES_Compute0_ccc_configMem 16384
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#define HIGH_Compute0_ccc_configMem 0x80003fff
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#define ADDR_Compute0_ccc_peMapping 0x80006000
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#define BYTES_Compute0_ccc_peMapping 4096
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#define HIGH_Compute0_ccc_peMapping 0x80006fff
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#define ADDR_Compute0_aes_adapter 0x80007000
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#define BYTES_Compute0_aes_adapter 4096
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#define HIGH_Compute0_aes_adapter 0x80007fff
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#define ADDR_Compute0_cntrl_cva5_clusterReg 0x8000a000
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#define BYTES_Compute0_cntrl_cva5_clusterReg 4096
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#define HIGH_Compute0_cntrl_cva5_clusterReg 0x8000afff
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#define ADDR_Compute0_cntrl_cva5 0x80008000
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#define BYTES_Compute0_cntrl_cva5 8192
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#define HIGH_Compute0_cntrl_cva5 0x80009fff
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#define ADDR_Compute0_cntrl_tgc_clusterReg 0x8000d000
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#define BYTES_Compute0_cntrl_tgc_clusterReg 4096
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#define HIGH_Compute0_cntrl_tgc_clusterReg 0x8000dfff
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#define ADDR_Compute0_cntrl_tgc 0x8000b000
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#define BYTES_Compute0_cntrl_tgc 8192
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#define HIGH_Compute0_cntrl_tgc 0x8000cfff
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#define ADDR_Compute0_ut_adapter 0x8000e000
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#define BYTES_Compute0_ut_adapter 8192
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#define HIGH_Compute0_ut_adapter 0x8000ffff
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#define ADDR_Compute0_sram0 0x80010000
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#define BYTES_Compute0_sram0 524288
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#define HIGH_Compute0_sram0 0x8008ffff
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#define ADDR_Compute0_sram1 0x80090000
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#define BYTES_Compute0_sram1 262144
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#define HIGH_Compute0_sram1 0x800cffff
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#define ADDR_Compute0_sram2 0x800d0000
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#define BYTES_Compute0_sram2 262144
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#define HIGH_Compute0_sram2 0x8010ffff
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#define ADDR_Compute0_sram3 0x80110000
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#define BYTES_Compute0_sram3 262144
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#define HIGH_Compute0_sram3 0x8014ffff
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#define Compute1 3
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#define Compute1_ccc 3,0
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#define Compute1_stream2axi 3,1
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#define Compute1_axi2stream 3,2
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#define Compute1_dma 3,4
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#define Compute1_dma_adapter 3,5
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#define ADDR_Compute1_ccc_idxJobs 0x90004000
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#define BYTES_Compute1_ccc_idxJobs 4096
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#define HIGH_Compute1_ccc_idxJobs 0x90004fff
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#define ADDR_Compute1_ccc_idxTasks 0x90005000
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#define BYTES_Compute1_ccc_idxTasks 4096
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#define HIGH_Compute1_ccc_idxTasks 0x90005fff
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#define ADDR_Compute1_ccc_configMem 0x90000000
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#define BYTES_Compute1_ccc_configMem 16384
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#define HIGH_Compute1_ccc_configMem 0x90003fff
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#define ADDR_Compute1_ccc_peMapping 0x90006000
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#define BYTES_Compute1_ccc_peMapping 4096
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#define HIGH_Compute1_ccc_peMapping 0x90006fff
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#define ADDR_Compute1_aes_adapter 0x90007000
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#define BYTES_Compute1_aes_adapter 4096
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#define HIGH_Compute1_aes_adapter 0x90007fff
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#define ADDR_Compute1_cntrl_cva5_clusterReg 0x8000a000
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#define BYTES_Compute1_cntrl_cva5_clusterReg 4096
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#define HIGH_Compute1_cntrl_cva5_clusterReg 0x8000afff
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#define ADDR_Compute1_cntrl_cva5 0x90008000
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#define BYTES_Compute1_cntrl_cva5 12288
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#define HIGH_Compute1_cntrl_cva5 0x9000afff
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#define ADDR_Compute1_cntrl_tgc_clusterReg 0x8000d000
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#define BYTES_Compute1_cntrl_tgc_clusterReg 4096
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#define HIGH_Compute1_cntrl_tgc_clusterReg 0x8000dfff
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#define ADDR_Compute1_cntrl_tgc 0x9000b000
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#define BYTES_Compute1_cntrl_tgc 12288
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#define HIGH_Compute1_cntrl_tgc 0x9000dfff
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#define ADDR_Compute1_ut_adapter 0x9000e000
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#define BYTES_Compute1_ut_adapter 8192
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#define HIGH_Compute1_ut_adapter 0x9000ffff
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#define ADDR_Compute1_sram0 0x90010000
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#define BYTES_Compute1_sram0 524288
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#define HIGH_Compute1_sram0 0x9008ffff
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#define ADDR_Compute1_sram1 0x90090000
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#define BYTES_Compute1_sram1 262144
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#define HIGH_Compute1_sram1 0x900cffff
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#define ADDR_Compute1_sram2 0x900d0000
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#define BYTES_Compute1_sram2 262144
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#define HIGH_Compute1_sram2 0x9010ffff
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#define ADDR_Compute1_sram3 0x90110000
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#define BYTES_Compute1_sram3 262144
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#define HIGH_Compute1_sram3 0x9014ffff
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static uint8_t fki_ccc(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0;
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}
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case 3: {
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return 0;
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}
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default: {
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return -1;
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}
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}
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}
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static uint8_t fki_dma(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 4;
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}
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case 2: {
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return 4;
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}
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default: {
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return -1;
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}
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}
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}
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static uint8_t fki_axi2stream(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 2;
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}
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case 2: {
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return 2;
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}
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default: {
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return -1;
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}
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}
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}
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static uint8_t fki_stream2axi(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 1;
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}
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case 2: {
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return 1;
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}
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default: {
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return -1;
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}
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}
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}
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static uint8_t fki_dma_adapter(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 5;
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}
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case 3: {
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return 5;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_ccc_peMapping(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80006000;
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}
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case 3: {
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return 0x90006000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_sram1(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 0x90090000;
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}
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case 2: {
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return 0x80090000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_sram2(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x800d0000;
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}
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case 3: {
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return 0x900d0000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_cntrl_cva5(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80008000;
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}
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case 3: {
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return 0x90008000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_cntrl_tgc(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x8000b000;
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}
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case 3: {
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return 0x9000b000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_ccc_idxTasks(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80005000;
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}
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case 3: {
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return 0x90005000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 0x8000d000;
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}
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case 2: {
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return 0x8000d000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_ccc_idxJobs(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80004000;
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}
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case 3: {
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return 0x90004000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_cntrl_cva5_clusterReg(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x8000a000;
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}
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case 3: {
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return 0x8000a000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_ccc_configMem(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 0x90000000;
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}
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case 2: {
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return 0x80000000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_aes_adapter(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80007000;
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}
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case 3: {
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return 0x90007000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_ut_adapter(uint8_t cluster) {
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switch(cluster) {
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case 3: {
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return 0x9000e000;
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}
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case 2: {
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return 0x8000e000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_sram0(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80010000;
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}
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case 3: {
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return 0x90010000;
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}
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default: {
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return -1;
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}
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}
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}
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static uint64_t fki_addr_sram3(uint8_t cluster) {
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switch(cluster) {
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case 2: {
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return 0x80110000;
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}
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case 3: {
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return 0x90110000;
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}
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default: {
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return -1;
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}
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}
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}
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#endif //_FKI_CLUSTER_INFO_H
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