Firmware/MNRS-BM-BSP
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add StreamController pending irq register

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This commit is contained in:
Stanislaw Kaushanski 2025-02-17 15:59:33 +01:00
parent bfc7e9f00b
commit a9aa746f81
2 changed files with 22 additions and 6 deletions
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10
include/ehrenberg/devices/gen/apb3spi.h
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@ -1,9 +1,9 @@
/* /*
* Copyright (c) 2023 - 2024 MINRES Technologies GmbH * Copyright (c) 2023 - 2025 MINRES Technologies GmbH
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2024-12-06 09:43:24 UTC * Generated at 2025-02-17 15:56:47 UTC
* by peakrdl_mnrs version 1.2.9 * by peakrdl_mnrs version 1.2.9
*/ */
@ -242,9 +242,15 @@ inline void set_apb3spi_intr_rx_ie(volatile apb3spi_t* reg, uint8_t value){
inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){ inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){
return (reg->INTR >> 8) & 0x1; return (reg->INTR >> 8) & 0x1;
} }
inline void set_apb3spi_intr_tx_ip(volatile apb3spi_t* reg, uint8_t value){
reg->INTR = (reg->INTR & ~(0x1U << 8)) | (value << 8);
}
inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){ inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){
return (reg->INTR >> 9) & 0x1; return (reg->INTR >> 9) & 0x1;
} }
inline void set_apb3spi_intr_rx_ip(volatile apb3spi_t* reg, uint8_t value){
reg->INTR = (reg->INTR & ~(0x1U << 9)) | (value << 9);
}
inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){ inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){
return (reg->INTR >> 16) & 0x1; return (reg->INTR >> 16) & 0x1;
} }

18
include/ehrenberg/devices/gen/mkcontrolclusterstreamcontroller.h
View File

@ -3,7 +3,7 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Generated at 2025-02-12 08:56:43 UTC * Generated at 2025-02-17 15:56:47 UTC
* by peakrdl_mnrs version 1.2.9 * by peakrdl_mnrs version 1.2.9
*/ */
@ -49,9 +49,13 @@ typedef struct {
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_MASK 0x3 #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_MASK 0x3
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER(V) ((V & MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_MASK) << MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_OFFS) #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER(V) ((V & MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_MASK) << MKCONTROLCLUSTERSTREAMCONTROLLER_REG_HEADER_RECIPIENT_CLUSTER_OFFS)
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_OFFS 0 #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_ACK_OFFS 0
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_MASK 0x1 #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_ACK_MASK 0x1
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK(V) ((V & MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_MASK) << MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_OFFS) #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_ACK(V) ((V & MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_ACK_MASK) << MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_ACK_OFFS)
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_PENDING_RESPONSE_OFFS 1
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_PENDING_RESPONSE_MASK 0x1
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_PENDING_RESPONSE(V) ((V & MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_PENDING_RESPONSE_MASK) << MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK_PENDING_RESPONSE_OFFS)
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID_OFFS 0 #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID_OFFS 0
#define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID_MASK 0xf #define MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID_MASK 0xf
@ -134,12 +138,18 @@ inline void set_mkcontrolclusterstreamcontroller_REG_HEADER_RECIPIENT_CLUSTER(vo
} }
//MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK //MKCONTROLCLUSTERSTREAMCONTROLLER_REG_ACK
inline uint32_t get_mkcontrolclusterstreamcontroller_REG_ACK(volatile mkcontrolclusterstreamcontroller_t* reg){
return reg->REG_ACK;
}
inline void set_mkcontrolclusterstreamcontroller_REG_ACK(volatile mkcontrolclusterstreamcontroller_t* reg, uint32_t value){ inline void set_mkcontrolclusterstreamcontroller_REG_ACK(volatile mkcontrolclusterstreamcontroller_t* reg, uint32_t value){
reg->REG_ACK = value; reg->REG_ACK = value;
} }
inline void set_mkcontrolclusterstreamcontroller_REG_ACK_ACK(volatile mkcontrolclusterstreamcontroller_t* reg, uint8_t value){ inline void set_mkcontrolclusterstreamcontroller_REG_ACK_ACK(volatile mkcontrolclusterstreamcontroller_t* reg, uint8_t value){
reg->REG_ACK = (reg->REG_ACK & ~(0x1U << 0)) | (value << 0); reg->REG_ACK = (reg->REG_ACK & ~(0x1U << 0)) | (value << 0);
} }
inline uint32_t get_mkcontrolclusterstreamcontroller_REG_ACK_PENDING_RESPONSE(volatile mkcontrolclusterstreamcontroller_t* reg){
return (reg->REG_ACK >> 1) & 0x1;
}
//MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID //MKCONTROLCLUSTERSTREAMCONTROLLER_REG_RECV_ID
inline uint32_t get_mkcontrolclusterstreamcontroller_REG_RECV_ID(volatile mkcontrolclusterstreamcontroller_t* reg){ inline uint32_t get_mkcontrolclusterstreamcontroller_REG_RECV_ID(volatile mkcontrolclusterstreamcontroller_t* reg){