fixes for ehrenberg platform, minres peripheral functions and nanolib

This commit is contained in:
2024-03-02 12:18:38 +01:00
parent 96fa7db587
commit 6523206738
4 changed files with 36 additions and 31 deletions

View File

@ -27,11 +27,11 @@ typedef struct {
#define SPI_STATUS_RSP_INT_FLAG = (1 << 9)
static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){
reg->config = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
reg->clk_divider = config->clkDivider;
reg->ss_setup = config->ssSetup;
reg->ss_hold = config->ssHold;
reg->ss_disable =config->ssDisable;
reg->CONFIG = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
reg->SCLK_CONFIG = config->clkDivider;
reg->SSGEN_SETUP = config->ssSetup;
reg->SSGEN_HOLD = config->ssHold;
reg->SSGEN_DISABLE = config->ssDisable;
}
static inline void spi_init(volatile qspi_t* spi){
@ -47,41 +47,41 @@ static inline void spi_init(volatile qspi_t* spi){
}
static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){
return reg->status & 0xFFFF;
return reg->STATUS & 0xFFFF;
}
static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){
return reg->status >> 16;
return reg->STATUS >> 16;
}
static inline void spi_write(volatile qspi_t* reg, uint8_t data){
while(spi_cmd_avail(reg) == 0);
reg->data = data | SPI_CMD_WRITE;
reg->DATA = data | SPI_CMD_WRITE;
}
static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){
while(spi_cmd_avail(reg) == 0);
reg->data = data | SPI_CMD_READ | SPI_CMD_WRITE;
reg->DATA = data | SPI_CMD_READ | SPI_CMD_WRITE;
while(spi_rsp_occupied(reg) == 0);
return reg->data;
return reg->DATA;
}
static inline uint8_t spi_read(volatile qspi_t* reg){
while(spi_cmd_avail(reg) == 0);
reg->data = SPI_CMD_READ;
reg->DATA = SPI_CMD_READ;
while(spi_rsp_occupied(reg) == 0);
while((reg->data & 0x80000000)==0);
return reg->data;
while((reg->DATA & 0x80000000)==0);
return reg->DATA;
}
static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){
while(spi_cmd_avail(reg) == 0);
reg->data = slaveId | 0x80 | SPI_CMD_SS;
reg->DATA = slaveId | 0x80 | SPI_CMD_SS;
}
static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){
while(spi_cmd_avail(reg) == 0);
reg->data = slaveId | SPI_CMD_SS;
reg->DATA = slaveId | SPI_CMD_SS;
}
static inline void spi_wait_tx_idle(volatile qspi_t* reg){

View File

@ -6,12 +6,20 @@
#define uart_t apb3uart_t
static void uart_write(volatile uart_t *reg, uint8_t data){
static inline uint32_t uart_get_tx_free(volatile uart_t *reg){
return (reg->STATUS_REG >> 16) & 0xFF;
}
static inline uint32_t uart_get_rx_avail(volatile uart_t *reg){
return reg->STATUS_REG >> 24;
}
static inline void uart_write(volatile uart_t *reg, uint8_t data){
while(get_uart_rx_tx_reg_tx_free(reg) == 0);
set_uart_rx_tx_reg_data(reg, data);
}
static inline uint8_t uart_read(volatile uart_t *reg){
static inline inline uint8_t uart_read(volatile uart_t *reg){
uint32_t res = get_uart_rx_tx_reg_data(reg);
while((res&0x10000) == 0) res = get_uart_rx_tx_reg_data(reg);
return res;