remove unused timer interrupt handler
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parent
9157a42042
commit
9e9b644e29
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@ -3,7 +3,7 @@ TARGET = hello_raven
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C_SRCS = $(wildcard src/*.c) $(BSP_BASE)/drivers/fe300prci/fe300prci_driver.c $(BSP_BASE)/drivers/plic/plic_driver.c
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CXX_SRCS = $(wildcard src/*.cpp)
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HEADERS = $(wildcard src/*.h)
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CFLAGS = -g -fno-builtin-printf -DUSE_PLIC -DUSE_M_TIME -DNO_INIT -I./src
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CFLAGS = -g -fno-builtin-printf -DUSE_PLIC -I./src
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CXXFLAGS = -fno-use-cxa-atexit
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LDFLAGS = -Wl,--wrap=printf
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LDFLAGS += -g -lstdc++ -fno-use-cxa-atexit -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -mcmodel=medany
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@ -5,10 +5,7 @@
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#include <cstdio>
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#include <cstdint>
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#include "hifive1_io.h"
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#include <array>
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#define IOF_ENABLE_TERMINAL (0x30000)
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@ -34,21 +31,6 @@ extern "C" void handle_m_ext_interrupt() {
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exit(1 + (uintptr_t) int_num);
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PLIC_complete_interrupt(&g_plic, int_num);
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}
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/*! \brief mtime interval interrupt
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*
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*/
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extern "C" void handle_m_time_interrupt(){
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clear_csr(mie, MIP_MTIP);
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// Reset the timer for 3s in the future.
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// This also clears the existing timer interrupt.
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volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
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volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
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uint64_t now = *mtime;
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uint64_t then = now + RTC_FREQ;
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*mtimecmp = then;
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// Re-enable the timer interrupt.
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set_csr(mie, MIP_MTIP);
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}
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/*! \brief dummy interrupt handler
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*
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*/
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@ -83,9 +65,10 @@ static void msi_interrupt_handler(){
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*
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*/
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void platform_init(){
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// configure clocks
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PRCI_use_hfxosc(1); // is equivalent to
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qspi1::sckdiv_reg() = 8;
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// UART init section TODO: clarify how to get the functions from init.c?
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GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
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GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
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UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
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F_CPU=PRCI_measure_mcycle_freq(20, RTC_FREQ);
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printf("core freq at %d Hz\n", F_CPU);
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@ -98,18 +81,10 @@ void platform_init(){
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clear_csr(mie, MIP_MTIP);
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for (auto& h:g_ext_interrupt_handlers) h=no_interrupt_handler;
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configure_irq(1, msi_interrupt_handler);
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// Set the machine timer to go off in 1 second.
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volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
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volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
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uint64_t now = *mtime;
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uint64_t then = now + RTC_FREQ;
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*mtimecmp = then;
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// Enable the Machine-External bit in MIE
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set_csr(mie, MIP_MEIP);
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// Enable the Machine-Timer bit in MIE
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set_csr(mie, MIP_MTIP);
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// Enable interrupts in general.
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set_csr(mstatus, MSTATUS_MIE);
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// Enable the Machine-External bit in MIE
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set_csr(mie, MIP_MEIP);
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}
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/*! \brief main function
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@ -121,15 +96,12 @@ int main() {
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int * plic_b_pending = (int *)(0xA0000000+PLIC_PENDING_OFFSET);
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int * local_sync_bit = (int *)(local_mem_base + 10);
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int * target_sync_bit = (int *)(target_mem_base + 10);
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volatile int * target_sync_bit = (int *)(target_mem_base + 10);
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int hartid = read_csr(mhartid);
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*local_sync_bit = 0;
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GPIO_REG(GPIO_IOF_EN) |= IOF_ENABLE_TERMINAL; // enable GPIO connection to the terminal
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platform_init();
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// Enable the Machine-External bit in MIE
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set_csr(mie, MIP_MEIP);
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if (hartid == 0) {
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int val_a = 5;
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@ -2,6 +2,5 @@
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#define HELLO_RAVEN_H_
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extern "C" void handle_m_ext_interrupt();
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extern "C" void handle_m_time_interrupt();
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#endif /* HELLO_RAVEN_H_ */
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@ -1,16 +0,0 @@
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/*
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* peripherals.c
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*
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* Created on: 10.09.2018
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* Author: eyck
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*/
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#include "hifive1_io.h"
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template<> volatile bool qspi0::spi_active=false;
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template<> volatile bool qspi1::spi_active=false;
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template<> volatile bool qspi2::spi_active=false;
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template<> volatile bool pwm0::pwm_active=false;
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template<> volatile bool pwm1::pwm_active=false;
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template<> volatile bool pwm2::pwm_active=false;
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@ -1,26 +0,0 @@
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/*
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* peripherals.h
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*
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* Created on: 29.07.2018
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* Author: eyck
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*/
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#ifndef HIFIVE1_IO_H_
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#define HIFIVE1_IO_H_
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#include "io/gpio.h"
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#include "io/spi.h"
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#include "io/pwm.h"
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#include "io/uart.h"
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using gpio0=gpio_regs<0x10012000>;
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using uart0=uart_regs<0x10013000>;
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using uart1=uart_regs<0x10023000>;
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using qspi0=spi_regs<0x10014000>;
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using qspi1=spi_regs<0x10024000>;
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using qspi2=spi_regs<0x10034000>;
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using pwm0 =pwm_regs<0x10015000>;
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using pwm1 =pwm_regs<0x10025000>;
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using pwm2 =pwm_regs<0x10035000>;
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#endif /* HIFIVE1_IO_H_ */
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