Eyck Jentzsch 6acf73a40f add template to generate instruction YAML		2021-10-01 13:05:36 +02:00
..
CoreDSL-Instruction-Set-Description@9e3119a806	fix JALR alignment in description	2021-09-29 00:43:42 +02:00
templates	add template to generate instruction YAML	2021-10-01 13:05:36 +02:00
.gitignore	reorganized layout to only contain risc-v stuff	2019-06-11 16:49:37 +00:00
TGC_B.core_desc	add marchid setting to CoreDSL description	2021-09-30 19:26:21 +02:00
TGC_C.core_desc	add marchid setting to CoreDSL description	2021-09-30 19:26:21 +02:00
TGC_D_XRB_MAC.core_desc	add marchid setting to CoreDSL description	2021-09-30 19:26:21 +02:00
TGC_D.core_desc	add marchid setting to CoreDSL description	2021-09-30 19:26:21 +02:00