DBT-RISE/DBT-RISE-TGC
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merge into: DBT-RISE:feature/htif
Branches Tags
DBT-RISE:main
DBT-RISE:develop
DBT-RISE:feature/eve_checkin
DBT-RISE:feature/htif
DBT-RISE:feature/iss_factory
DBT-RISE:feature/core_factory
DBT-RISE:Trace_enhancement
DBT-RISE:feature/reduced_output
DBT-RISE:msvc_compat
DBT-RISE:hotfix/latest_scc
DBT-RISE:feature/interpreter
...
pull from: DBT-RISE:main
Branches Tags
DBT-RISE:develop
DBT-RISE:feature/eve_checkin
DBT-RISE:main
DBT-RISE:feature/htif
DBT-RISE:feature/iss_factory
DBT-RISE:feature/core_factory
DBT-RISE:Trace_enhancement
DBT-RISE:feature/reduced_output
DBT-RISE:msvc_compat
DBT-RISE:hotfix/latest_scc
DBT-RISE:feature/interpreter

11 Commits
feature/ht ... main

Author SHA1 Message Date
Eyck-Alexander Jentzsch
f7e3db11ad Merge remote-tracking branch 'origin/develop' 2024-12-22 16:43:22 +01:00
Eyck Jentzsch
a6a6f51f0b adds clang-format fixes 2024-12-06 15:50:50 +01:00
Eyck-Alexander Jentzsch
21e1f791ad corrects sysc integration template and corresponding file 2024-12-06 09:49:02 +01:00
Eyck-Alexander Jentzsch
be6f5791fa adds update to cyclecount after each instr for asmjit 2024-11-26 20:26:18 +01:00
Eyck-Alexander Jentzsch
ac818f304d increases verbosity incase elf loading goes wrong 2024-10-21 16:42:58 +02:00
Eyck Jentzsch
eb99751ad9 Merge branch 'develop' into main 2024-06-21 08:52:03 +02:00
Eyck Jentzsch
926a03c346 Merge branch 'develop' into main 2023-12-02 14:18:13 +01:00
Eyck Jentzsch
b6824e68e9 Merge branch 'master' of 
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git
 2022-04-23 17:08:05 +02:00
Eyck Jentzsch
1196424e39 Merge branch 'develop' 2022-04-23 17:06:52 +02:00
Eyck Jentzsch
126fdc7e63 update coredsl descriptions to match latest syntax 2022-04-07 11:04:18 +02:00
Eyck Jentzsch
d5fa47ef7f Merge branch 'develop' 2021-11-11 19:34:21 +01:00
6 changed files with 41 additions and 32 deletions
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24
gen_input/templates/CORENAME_sysc.cpp.gtl
View File

@ -45,17 +45,17 @@ namespace interp {
using namespace sysc;
volatile std::array<bool, ${array_count}> ${coreDef.name.toLowerCase()}_init = {
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|interp", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
}),
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|interp", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%if(coreDef.name.toLowerCase()=="tgc5d" || coreDef.name.toLowerCase()=="tgc5e") {%>,
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p_clic_pmp|interp", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}, (iss::arch::features_e)(iss::arch::FEAT_PMP | iss::arch::FEAT_EXT_N | iss::arch::FEAT_CLIC)>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%}%>
@ -66,17 +66,17 @@ namespace llvm {
using namespace sysc;
volatile std::array<bool, ${array_count}> ${coreDef.name.toLowerCase()}_init = {
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|llvm", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
}),
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|llvm", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%if(coreDef.name.toLowerCase()=="tgc5d" || coreDef.name.toLowerCase()=="tgc5e") {%>,
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p_clic_pmp|llvm", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}, (iss::arch::features_e)(iss::arch::FEAT_PMP | iss::arch::FEAT_EXT_N | iss::arch::FEAT_CLIC)>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%}%>
@ -88,17 +88,17 @@ namespace tcc {
using namespace sysc;
volatile std::array<bool, ${array_count}> ${coreDef.name.toLowerCase()}_init = {
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|tcc", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
}),
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|tcc", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%if(coreDef.name.toLowerCase()=="tgc5d" || coreDef.name.toLowerCase()=="tgc5e") {%>,
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p_clic_pmp|tcc", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}, (iss::arch::features_e)(iss::arch::FEAT_PMP | iss::arch::FEAT_EXT_N | iss::arch::FEAT_CLIC)>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%}%>
@ -110,17 +110,17 @@ namespace asmjit {
using namespace sysc;
volatile std::array<bool, ${array_count}> ${coreDef.name.toLowerCase()}_init = {
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|m_p|asmjit", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
}),
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p|asmjit", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%if(coreDef.name.toLowerCase()=="tgc5d" || coreDef.name.toLowerCase()=="tgc5e") {%>,
iss_factory::instance().register_creator("${coreDef.name.toLowerCase()}|mu_p_clic_pmp|asmjit", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto* cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto* cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::${coreDef.name.toLowerCase()}, (iss::arch::features_e)(iss::arch::FEAT_PMP | iss::arch::FEAT_EXT_N | iss::arch::FEAT_CLIC)>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::${coreDef.name.toLowerCase()}*>(cpu), gdb_port)}};
})<%}%>

1
gen_input/templates/asmjit/CORENAME.cpp.gtl
View File

@ -263,6 +263,7 @@ void vm_impl<ARCH>::gen_instr_epilogue(jit_holder& jh) {
cmp(cc, current_trap_state, 0);
cc.jne(jh.trap_entry);
cc.inc(get_ptr_for(jh, traits::ICOUNT));
cc.inc(get_ptr_for(jh, traits::CYCLE));
}
template <typename ARCH>
void vm_impl<ARCH>::gen_block_prologue(jit_holder& jh){

31
src/elfio.cpp
View File

@ -3,34 +3,33 @@
#define ELFIO_NO_INTTYPES
#endif
#include <iostream>
#include <elfio/elfio_dump.hpp>
#include <iostream>
using namespace ELFIO;
int main( int argc, char** argv )
{
if ( argc != 2 ) {
printf( "Usage: elfdump <file_name>\n" );
int main(int argc, char** argv) {
if(argc != 2) {
printf("Usage: elfdump <file_name>\n");
return 1;
}
elfio reader;
if ( !reader.load( argv[1] ) ) {
printf( "File %s is not found or it is not an ELF file\n", argv[1] );
if(!reader.load(argv[1])) {
printf("File %s is not found or it is not an ELF file\n", argv[1]);
return 1;
}
dump::header( std::cout, reader );
dump::section_headers( std::cout, reader );
dump::segment_headers( std::cout, reader );
dump::symbol_tables( std::cout, reader );
dump::notes( std::cout, reader );
dump::modinfo( std::cout, reader );
dump::dynamic_tags( std::cout, reader );
dump::section_datas( std::cout, reader );
dump::segment_datas( std::cout, reader );
dump::header(std::cout, reader);
dump::section_headers(std::cout, reader);
dump::segment_headers(std::cout, reader);
dump::symbol_tables(std::cout, reader);
dump::notes(std::cout, reader);
dump::modinfo(std::cout, reader);
dump::dynamic_tags(std::cout, reader);
dump::section_datas(std::cout, reader);
dump::segment_datas(std::cout, reader);
return 0;
}

12
src/main.cpp
View File

@ -206,13 +206,21 @@ int main(int argc, char* argv[]) {
if(clim.count("elf"))
for(std::string input : clim["elf"].as<std::vector<std::string>>()) {
auto start_addr = vm->get_arch()->load_file(input);
if(start_addr.second) // FIXME: this always evaluates to true as load file always returns <sth, true>
if(start_addr.second)
start_address = start_addr.first;
else {
LOG(ERR) << "Error occured while loading file " << input << std::endl;
return 1;
}
}
for(std::string input : args) {
auto start_addr = vm->get_arch()->load_file(input); // treat remaining arguments as elf files
if(start_addr.second) // FIXME: this always evaluates to true as load file always returns <sth, true>
if(start_addr.second)
start_address = start_addr.first;
else {
LOG(ERR) << "Error occured while loading file " << input << std::endl;
return 1;
}
}
if(clim.count("reset")) {
auto str = clim["reset"].as<std::string>();

4
src/sysc/register_tgc_c.cpp
View File

@ -62,12 +62,12 @@ using namespace sysc;
volatile std::array<bool, 2> tgc_init = {
iss_factory::instance().register_creator("tgc5c|m_p|llvm",
[](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_m_p<arch::tgc5c>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::tgc5c*>(cpu), gdb_port)}};
}),
iss_factory::instance().register_creator("tgc5c|mu_p|llvm", [](unsigned gdb_port, void* data) -> iss_factory::base_t {
auto cc = reinterpret_cast<sysc::tgfs::core_complex*>(data);
auto cc = reinterpret_cast<sysc::tgfs::core_complex_if*>(data);
auto* cpu = new sc_core_adapter<arch::riscv_hart_mu_p<arch::tgc5c>>(cc);
return {sysc::sc_cpu_ptr{cpu}, vm_ptr{create(static_cast<arch::tgc5c*>(cpu), gdb_port)}};
})};

1
src/vm/asmjit/vm_tgc5c.cpp
View File

@ -4822,6 +4822,7 @@ void vm_impl<ARCH>::gen_instr_epilogue(jit_holder& jh) {
cmp(cc, current_trap_state, 0);
cc.jne(jh.trap_entry);
cc.inc(get_ptr_for(jh, traits::ICOUNT));
cc.inc(get_ptr_for(jh, traits::CYCLE));
}
template <typename ARCH>
void vm_impl<ARCH>::gen_block_prologue(jit_holder& jh){