adds RPATH setting to install

CMakeLists.txt

@@ -115,6 +115,7 @@ install(DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/incl/iss COMPONENT ${PROJECT_NAME}
 ###############################################################################
 #
 ###############################################################################
+set(CMAKE_INSTALL_RPATH $ORIGIN/../${CMAKE_INSTALL_LIBDIR})
 project(tgc-sim)
 find_package(Boost COMPONENTS program_options thread REQUIRED)
 

src/iss/arch/riscv_hart_m_p.h

@@ -682,7 +682,7 @@ iss::status riscv_hart_m_p<BASE, FEAT>::read(const address_type type, const acce
                 } else {
                     res = hart_mem_rd_delegate( phys_addr, length, data);
                 }
-                if (unlikely(res != iss::Ok)){
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)){
                     this->reg.trap_state = (1UL << 31) | (5 << 16); // issue trap 5 (load access fault
                     fault_data=addr;
                 }
@@ -775,7 +775,7 @@ iss::status riscv_hart_m_p<BASE, FEAT>::write(const address_type type, const acc
                 } else {
                     res = write_mem( phys_addr, length, data);
                 }
-                if (unlikely(res != iss::Ok)) {
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)) {
                     this->reg.trap_state = (1UL << 31) | (7 << 16); // issue trap 7 (Store/AMO access fault)
                     fault_data=addr;
                 }

src/iss/arch/riscv_hart_msu_vp.h

@@ -636,7 +636,7 @@ iss::status riscv_hart_msu_vp<BASE>::read(const address_type type, const access_
                     }
                 }
                 auto res = read_mem( BASE::v2p(iss::addr_t{access, type, space, addr}), length, data);
-                if (unlikely(res != iss::Ok)){
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)){
                 	this->reg.trap_state = (1 << 31) | (5 << 16); // issue trap 5 (load access fault
                     fault_data=addr;
                 }
@@ -734,7 +734,7 @@ iss::status riscv_hart_msu_vp<BASE>::write(const address_type type, const access
                     }
                 }
                 auto res = write_mem(paddr, length, data);
-                if (unlikely(res != iss::Ok)) {
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)) {
                     this->reg.trap_state = (1UL << 31) | (7UL << 16); // issue trap 7 (Store/AMO access fault)
                     fault_data=addr;
                 }

src/iss/arch/riscv_hart_mu_p.h

@@ -850,7 +850,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::read(const address_type type, const acc
                 } else {
                     res = hart_mem_rd_delegate( phys_addr, length, data);
                 }
-                if (unlikely(res != iss::Ok)){
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)){
                     this->reg.trap_state = (1UL << 31) | (5 << 16); // issue trap 5 (load access fault
                     fault_data=addr;
                 }
@@ -951,7 +951,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::write(const address_type type, const ac
                 } else {
                     res = hart_mem_wr_delegate( phys_addr, length, data);
                 }
-                if (unlikely(res != iss::Ok)) {
+                if (unlikely(res != iss::Ok && (access & access_type::DEBUG) == 0)) {
                     this->reg.trap_state = (1UL << 31) | (7UL << 16); // issue trap 7 (Store/AMO access fault)
                     fault_data=addr;
                 }

src/main.cpp

@@ -80,7 +80,7 @@ int main(int argc, char *argv[]) {
         po::store(parsed, clim); // can throw
         // --help option
         if (clim.count("help")) {
-            std::cout << "DBT-RISE-RiscV simulator for RISC-V" << std::endl << desc << std::endl;
+            std::cout << "DBT-RISE-TGC simulator for TGC RISC-V cores" << std::endl << desc << std::endl;
             return 0;
         }
         po::notify(clim); // throws on error, so do after help in case