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13 Commits
c28e8fd00c
...
a45fcd28db
Author | SHA1 | Date | |
---|---|---|---|
a45fcd28db | |||
0f15032210 | |||
efc11d87a5 | |||
4a19e27926 | |||
c15cdb0955 | |||
6609d12582 | |||
b5341700aa | |||
0b5062d21c | |||
fbca690b3b | |||
235a7e6e24 | |||
62d21e1156 | |||
9c51d6eade | |||
2878dca6b5 |
@ -38,7 +38,9 @@
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#include <asmjit/asmjit.h>
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#include <asmjit/asmjit.h>
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#include <util/logging.h>
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#include <util/logging.h>
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#include <iss/instruction_decoder.h>
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#include <iss/instruction_decoder.h>
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<%def fcsr = registers.find {it.name=='FCSR'}
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if(fcsr != null) {%>
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#include <vm/fp_functions.h><%}%>
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#ifndef FMT_HEADER_ONLY
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#endif
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#endif
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@ -88,7 +90,6 @@ protected:
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using super::write_reg_to_mem;
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using super::write_reg_to_mem;
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using super::gen_read_mem;
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using super::gen_read_mem;
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using super::gen_write_mem;
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using super::gen_write_mem;
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using super::gen_wait;
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using super::gen_leave;
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using super::gen_leave;
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using super::gen_sync;
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using super::gen_sync;
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@ -100,7 +101,9 @@ protected:
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void gen_block_prologue(jit_holder& jh) override;
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void gen_block_prologue(jit_holder& jh) override;
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void gen_block_epilogue(jit_holder& jh) override;
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void gen_block_epilogue(jit_holder& jh) override;
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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<%if(fcsr != null) {%>
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inline const char *fname(size_t index){return index < 32?name(index+traits::F0):"illegal";}
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<%}%>
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void gen_instr_prologue(jit_holder& jh);
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void gen_instr_prologue(jit_holder& jh);
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void gen_instr_epilogue(jit_holder& jh);
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void gen_instr_epilogue(jit_holder& jh);
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inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause);
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inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause);
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@ -113,6 +116,9 @@ protected:
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auto sign_mask = 1ULL<<(W-1);
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auto sign_mask = 1ULL<<(W-1);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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}
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}
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<%functions.each{ it.eachLine { %>
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${it}<%}%>
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<%}%>
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private:
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private:
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/****************************************************************************
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/****************************************************************************
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* start opcode definitions
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* start opcode definitions
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@ -195,7 +201,7 @@ private:
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, 2);
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gen_sync(jh, POST_SYNC, instr_descr.size());
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gen_sync(jh, POST_SYNC, instr_descr.size());
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gen_instr_epilogue(jh);
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gen_instr_epilogue(jh);
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return BRANCH;
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return ILLEGAL_INSTR;
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}
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}
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};
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};
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@ -224,9 +230,9 @@ continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned
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paddr = this->core.virt2phys(pc);
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paddr = this->core.virt2phys(pc);
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auto res = this->core.read(paddr, 4, data);
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auto res = this->core.read(paddr, 4, data);
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if (res != iss::Ok)
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if (res != iss::Ok)
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throw trap_access(TRAP_ID, pc.val);
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return ILLEGAL_FETCH;
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if (instr == 0x0000006f || (instr&0xffff)==0xa001)
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if (instr == 0x0000006f || (instr&0xffff)==0xa001)
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throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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return JUMP_TO_SELF;
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++inst_cnt;
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++inst_cnt;
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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compile_func f = nullptr;
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compile_func f = nullptr;
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@ -267,7 +267,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
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opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
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if(inst_index <instr_descr.size())
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if(inst_index <instr_descr.size())
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inst_id = instr_descr.at(instr_decoder.decode_instr(instr)).op;
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inst_id = instr_descr[inst_index].op;
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// pre execution stuff
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// pre execution stuff
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this->core.reg.last_branch = 0;
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this->core.reg.last_branch = 0;
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@ -279,6 +279,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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<%}%>if(this->disass_enabled){
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<%}%>if(this->disass_enabled){
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/* generate console output when executing the command */<%instr.disass.eachLine{%>
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/* generate console output when executing the command */<%instr.disass.eachLine{%>
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${it}<%}%>
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${it}<%}%>
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this->core.disass_output(pc.val, mnemonic);
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}
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}
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// used registers<%instr.usedVariables.each{ k,v->
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// used registers<%instr.usedVariables.each{ k,v->
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if(v.isArray) {%>
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if(v.isArray) {%>
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@ -37,7 +37,9 @@
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#include <iss/llvm/vm_base.h>
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#include <iss/llvm/vm_base.h>
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#include <util/logging.h>
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#include <util/logging.h>
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#include <iss/instruction_decoder.h>
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#include <iss/instruction_decoder.h>
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<%def fcsr = registers.find {it.name=='FCSR'}
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if(fcsr != null) {%>
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#include <vm/fp_functions.h><%}%>
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#ifndef FMT_HEADER_ONLY
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#endif
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#endif
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@ -83,7 +85,9 @@ protected:
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using vm_base<ARCH>::get_reg_ptr;
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using vm_base<ARCH>::get_reg_ptr;
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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<%if(fcsr != null) {%>
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inline const char *fname(size_t index){return index < 32?name(index+traits::F0):"illegal";}
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<%}%>
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template <typename T> inline ConstantInt *size(T type) {
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template <typename T> inline ConstantInt *size(T type) {
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return ConstantInt::get(getContext(), APInt(32, type->getType()->getScalarSizeInBits()));
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return ConstantInt::get(getContext(), APInt(32, type->getType()->getScalarSizeInBits()));
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}
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}
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@ -131,7 +135,9 @@ protected:
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auto sign_mask = 1ULL<<(W-1);
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auto sign_mask = 1ULL<<(W-1);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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}
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}
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<%functions.each{ it.eachLine { %>
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${it}<%}%>
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<%}%>
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private:
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private:
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/****************************************************************************
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/****************************************************************************
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* start opcode definitions
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* start opcode definitions
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@ -212,7 +218,7 @@ private:
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bb = this->leave_blk;
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bb = this->leave_blk;
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this->gen_instr_epilogue(bb);
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this->gen_instr_epilogue(bb);
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this->builder.CreateBr(bb);
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this->builder.CreateBr(bb);
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return std::make_tuple(BRANCH, nullptr);
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return std::make_tuple(ILLEGAL_INSTR, nullptr);
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}
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}
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};
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};
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@ -247,19 +253,11 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt,
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auto *const data = (uint8_t *)&instr;
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auto *const data = (uint8_t *)&instr;
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if(this->core.has_mmu())
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if(this->core.has_mmu())
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paddr = this->core.virt2phys(pc);
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paddr = this->core.virt2phys(pc);
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//TODO: re-add page handling
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// if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary
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// auto res = this->core.read(paddr, 2, data);
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// if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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// if ((instr & 0x3) == 0x3) { // this is a 32bit instruction
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// res = this->core.read(this->core.v2p(pc + 2), 2, data + 2);
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// }
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// } else {
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auto res = this->core.read(paddr, 4, data);
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auto res = this->core.read(paddr, 4, data);
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if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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if (res != iss::Ok)
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// }
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return std::make_tuple(ILLEGAL_FETCH, nullptr);
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if (instr == 0x0000006f || (instr&0xffff)==0xa001) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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if (instr == 0x0000006f || (instr&0xffff)==0xa001)
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// curr pc on stack
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return std::make_tuple(JUMP_TO_SELF, nullptr);
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++inst_cnt;
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++inst_cnt;
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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compile_func f = nullptr;
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compile_func f = nullptr;
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@ -38,7 +38,9 @@
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#include <util/logging.h>
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#include <util/logging.h>
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#include <sstream>
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#include <sstream>
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#include <iss/instruction_decoder.h>
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#include <iss/instruction_decoder.h>
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<%def fcsr = registers.find {it.name=='FCSR'}
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if(fcsr != null) {%>
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#include <vm/fp_functions.h><%}%>
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#ifndef FMT_HEADER_ONLY
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#endif
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#endif
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@ -85,7 +87,12 @@ protected:
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using compile_func = compile_ret_t (this_class::*)(virt_addr_t &pc, code_word_t instr, tu_builder&);
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using compile_func = compile_ret_t (this_class::*)(virt_addr_t &pc, code_word_t instr, tu_builder&);
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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<%
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if(fcsr != null) {%>
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inline const char *fname(size_t index){return index < 32?name(index+traits::F0):"illegal";}
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void add_prologue(tu_builder& tu) override;
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<%}%>
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void setup_module(std::string m) override {
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void setup_module(std::string m) override {
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super::setup_module(m);
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super::setup_module(m);
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}
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}
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@ -98,8 +105,6 @@ protected:
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void gen_leave_trap(tu_builder& tu, unsigned lvl);
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void gen_leave_trap(tu_builder& tu, unsigned lvl);
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void gen_wait(tu_builder& tu, unsigned type);
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inline void gen_set_tval(tu_builder& tu, uint64_t new_tval);
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inline void gen_set_tval(tu_builder& tu, uint64_t new_tval);
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inline void gen_set_tval(tu_builder& tu, value new_tval);
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inline void gen_set_tval(tu_builder& tu, value new_tval);
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@ -133,6 +138,9 @@ protected:
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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}
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}
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<%functions.each{ it.eachLine { %>
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${it}<%}%>
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<%}%>
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private:
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private:
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/****************************************************************************
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/****************************************************************************
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* start opcode definitions
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* start opcode definitions
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@ -163,6 +171,7 @@ private:
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<%}%>if(this->disass_enabled){
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<%}%>if(this->disass_enabled){
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/* generate console output when executing the command */<%instr.disass.eachLine{%>
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/* generate console output when executing the command */<%instr.disass.eachLine{%>
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${it}<%}%>
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${it}<%}%>
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tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic);
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}
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}
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auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]);
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auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]);
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pc=pc+ ${instr.length/8};
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pc=pc+ ${instr.length/8};
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@ -187,11 +196,11 @@ private:
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tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, std::string("illegal_instruction"));
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tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, std::string("illegal_instruction"));
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}
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}
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pc = pc + ((instr & 3) == 3 ? 4 : 2);
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pc = pc + ((instr & 3) == 3 ? 4 : 2);
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gen_raise_trap(tu, 0, 2); // illegal instruction trap
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gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
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this->gen_set_tval(tu, instr);
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this->gen_set_tval(tu, instr);
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vm_impl::gen_sync(tu, iss::POST_SYNC, instr_descr.size());
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vm_impl::gen_sync(tu, iss::POST_SYNC, instr_descr.size());
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vm_impl::gen_trap_check(tu);
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vm_impl::gen_trap_check(tu);
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return BRANCH;
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return ILLEGAL_INSTR;
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}
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}
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};
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};
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@ -224,19 +233,11 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt,
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phys_addr_t paddr(pc);
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phys_addr_t paddr(pc);
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if(this->core.has_mmu())
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if(this->core.has_mmu())
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paddr = this->core.virt2phys(pc);
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paddr = this->core.virt2phys(pc);
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//TODO: re-add page handling
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// if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary
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// auto res = this->core.read(paddr, 2, data);
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// if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
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// if ((insn & 0x3) == 0x3) { // this is a 32bit instruction
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// res = this->core.read(this->core.v2p(pc + 2), 2, data + 2);
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// }
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// } else {
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auto res = this->core.read(paddr, 4, reinterpret_cast<uint8_t*>(&instr));
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auto res = this->core.read(paddr, 4, reinterpret_cast<uint8_t*>(&instr));
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if (res != iss::Ok) throw trap_access(TRAP_ID, pc.val);
|
if (res != iss::Ok)
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// }
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return ILLEGAL_FETCH;
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if (instr == 0x0000006f || (instr&0xffff)==0xa001) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
|
if (instr == 0x0000006f || (instr&0xffff)==0xa001)
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// curr pc on stack
|
return JUMP_TO_SELF;
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++inst_cnt;
|
++inst_cnt;
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uint32_t inst_index = instr_decoder.decode_instr(instr);
|
uint32_t inst_index = instr_decoder.decode_instr(instr);
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compile_func f = nullptr;
|
compile_func f = nullptr;
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@ -258,9 +259,6 @@ template <typename ARCH> void vm_impl<ARCH>::gen_leave_trap(tu_builder& tu, unsi
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tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP), 32));
|
tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP), 32));
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}
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}
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|
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template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned type) {
|
|
||||||
}
|
|
||||||
|
|
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template <typename ARCH> void vm_impl<ARCH>::gen_set_tval(tu_builder& tu, uint64_t new_tval) {
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template <typename ARCH> void vm_impl<ARCH>::gen_set_tval(tu_builder& tu, uint64_t new_tval) {
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tu(fmt::format("tval = {};", new_tval));
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tu(fmt::format("tval = {};", new_tval));
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}
|
}
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@ -275,6 +273,39 @@ template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) {
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tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32));
|
tu.store(traits::LAST_BRANCH, tu.constant(static_cast<int>(UNKNOWN_JUMP),32));
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tu("return *next_pc;");
|
tu("return *next_pc;");
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}
|
}
|
||||||
|
<%
|
||||||
|
if(fcsr != null) {%>
|
||||||
|
template <typename ARCH> void vm_impl<ARCH>::add_prologue(tu_builder& tu){
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||||||
|
std::ostringstream os;
|
||||||
|
os << "uint32_t (*fget_flags)()=" << (uintptr_t)&fget_flags << ";\\n";
|
||||||
|
os << "uint32_t (*fadd_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fadd_s << ";\\n";
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||||||
|
os << "uint32_t (*fsub_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fsub_s << ";\\n";
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||||||
|
os << "uint32_t (*fmul_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fmul_s << ";\\n";
|
||||||
|
os << "uint32_t (*fdiv_s)(uint32_t v1, uint32_t v2, uint8_t mode)=" << (uintptr_t)&fdiv_s << ";\\n";
|
||||||
|
os << "uint32_t (*fsqrt_s)(uint32_t v1, uint8_t mode)=" << (uintptr_t)&fsqrt_s << ";\\n";
|
||||||
|
os << "uint32_t (*fcmp_s)(uint32_t v1, uint32_t v2, uint32_t op)=" << (uintptr_t)&fcmp_s << ";\\n";
|
||||||
|
os << "uint32_t (*fcvt_s)(uint32_t v1, uint32_t op, uint8_t mode)=" << (uintptr_t)&fcvt_s << ";\\n";
|
||||||
|
os << "uint32_t (*fmadd_s)(uint32_t v1, uint32_t v2, uint32_t v3, uint32_t op, uint8_t mode)=" << (uintptr_t)&fmadd_s << ";\\n";
|
||||||
|
os << "uint32_t (*fsel_s)(uint32_t v1, uint32_t v2, uint32_t op)=" << (uintptr_t)&fsel_s << ";\\n";
|
||||||
|
os << "uint32_t (*fclass_s)( uint32_t v1 )=" << (uintptr_t)&fclass_s << ";\\n";
|
||||||
|
os << "uint32_t (*fconv_d2f)(uint64_t v1, uint8_t mode)=" << (uintptr_t)&fconv_d2f << ";\\n";
|
||||||
|
os << "uint64_t (*fconv_f2d)(uint32_t v1, uint8_t mode)=" << (uintptr_t)&fconv_f2d << ";\\n";
|
||||||
|
os << "uint64_t (*fadd_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fadd_d << ";\\n";
|
||||||
|
os << "uint64_t (*fsub_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fsub_d << ";\\n";
|
||||||
|
os << "uint64_t (*fmul_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fmul_d << ";\\n";
|
||||||
|
os << "uint64_t (*fdiv_d)(uint64_t v1, uint64_t v2, uint8_t mode)=" << (uintptr_t)&fdiv_d << ";\\n";
|
||||||
|
os << "uint64_t (*fsqrt_d)(uint64_t v1, uint8_t mode)=" << (uintptr_t)&fsqrt_d << ";\\n";
|
||||||
|
os << "uint64_t (*fcmp_d)(uint64_t v1, uint64_t v2, uint32_t op)=" << (uintptr_t)&fcmp_d << ";\\n";
|
||||||
|
os << "uint64_t (*fcvt_d)(uint64_t v1, uint32_t op, uint8_t mode)=" << (uintptr_t)&fcvt_d << ";\\n";
|
||||||
|
os << "uint64_t (*fmadd_d)(uint64_t v1, uint64_t v2, uint64_t v3, uint32_t op, uint8_t mode)=" << (uintptr_t)&fmadd_d << ";\\n";
|
||||||
|
os << "uint64_t (*fsel_d)(uint64_t v1, uint64_t v2, uint32_t op)=" << (uintptr_t)&fsel_d << ";\\n";
|
||||||
|
os << "uint64_t (*fclass_d)(uint64_t v1 )=" << (uintptr_t)&fclass_d << ";\\n";
|
||||||
|
os << "uint64_t (*fcvt_32_64)(uint32_t v1, uint32_t op, uint8_t mode)=" << (uintptr_t)&fcvt_32_64 << ";\\n";
|
||||||
|
os << "uint32_t (*fcvt_64_32)(uint64_t v1, uint32_t op, uint8_t mode)=" << (uintptr_t)&fcvt_64_32 << ";\\n";
|
||||||
|
os << "uint32_t (*unbox_s)(uint64_t v)=" << (uintptr_t)&unbox_s << ";\\n";
|
||||||
|
tu.add_prologue(os.str());
|
||||||
|
}
|
||||||
|
<%}%>
|
||||||
|
|
||||||
} // namespace ${coreDef.name.toLowerCase()}
|
} // namespace ${coreDef.name.toLowerCase()}
|
||||||
|
|
||||||
|
14
src/main.cpp
14
src/main.cpp
@ -69,7 +69,8 @@ int main(int argc, char* argv[]) {
|
|||||||
("logfile,l", po::value<std::string>(), "Sets default log file.")
|
("logfile,l", po::value<std::string>(), "Sets default log file.")
|
||||||
("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
|
("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
|
||||||
("gdb-port,g", po::value<unsigned>()->default_value(0), "enable gdb server and specify port to use")
|
("gdb-port,g", po::value<unsigned>()->default_value(0), "enable gdb server and specify port to use")
|
||||||
("instructions,i", po::value<uint64_t>()->default_value(std::numeric_limits<uint64_t>::max()), "max. number of instructions to simulate")
|
("ilimit,i", po::value<uint64_t>()->default_value(std::numeric_limits<uint64_t>::max()), "max. number of instructions to simulate")
|
||||||
|
("flimit", po::value<uint64_t>()->default_value(std::numeric_limits<uint64_t>::max()), "max. number of fetches to simulate")
|
||||||
("reset,r", po::value<std::string>(), "reset address")
|
("reset,r", po::value<std::string>(), "reset address")
|
||||||
("dump-ir", "dump the intermediate representation")
|
("dump-ir", "dump the intermediate representation")
|
||||||
("elf,f", po::value<std::vector<std::string>>(), "ELF file(s) to load")
|
("elf,f", po::value<std::vector<std::string>>(), "ELF file(s) to load")
|
||||||
@ -215,8 +216,15 @@ int main(int argc, char* argv[]) {
|
|||||||
start_address = str.find("0x") == 0 ? std::stoull(str.substr(2), nullptr, 16) : std::stoull(str, nullptr, 10);
|
start_address = str.find("0x") == 0 ? std::stoull(str.substr(2), nullptr, 16) : std::stoull(str, nullptr, 10);
|
||||||
}
|
}
|
||||||
vm->reset(start_address);
|
vm->reset(start_address);
|
||||||
auto cycles = clim["instructions"].as<uint64_t>();
|
auto limit = clim["ilimit"].as<uint64_t>();
|
||||||
res = vm->start(cycles, dump);
|
auto cond = iss::finish_cond_e::JUMP_TO_SELF;
|
||||||
|
if(clim.count("flimit")) {
|
||||||
|
cond = cond | iss::finish_cond_e::FCOUNT_LIMIT;
|
||||||
|
limit = clim["flimit"].as<uint64_t>();
|
||||||
|
} else {
|
||||||
|
cond = cond | iss::finish_cond_e::ICOUNT_LIMIT;
|
||||||
|
}
|
||||||
|
res = vm->start(limit, dump, cond);
|
||||||
|
|
||||||
auto instr_if = vm->get_arch()->get_instrumentation_if();
|
auto instr_if = vm->get_arch()->get_instrumentation_if();
|
||||||
// this assumes a single input file
|
// this assumes a single input file
|
||||||
|
@ -88,7 +88,6 @@ protected:
|
|||||||
using super::write_reg_to_mem;
|
using super::write_reg_to_mem;
|
||||||
using super::gen_read_mem;
|
using super::gen_read_mem;
|
||||||
using super::gen_write_mem;
|
using super::gen_write_mem;
|
||||||
using super::gen_wait;
|
|
||||||
using super::gen_leave;
|
using super::gen_leave;
|
||||||
using super::gen_sync;
|
using super::gen_sync;
|
||||||
|
|
||||||
@ -113,6 +112,7 @@ protected:
|
|||||||
auto sign_mask = 1ULL<<(W-1);
|
auto sign_mask = 1ULL<<(W-1);
|
||||||
return (from & mask) | ((from & sign_mask) ? ~mask : 0);
|
return (from & mask) | ((from & sign_mask) ? ~mask : 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
private:
|
private:
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* start opcode definitions
|
* start opcode definitions
|
||||||
@ -500,6 +500,7 @@ private:
|
|||||||
(gen_operation(cc, band, (gen_operation(cc, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm))
|
(gen_operation(cc, band, (gen_operation(cc, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm))
|
||||||
), addr_mask)
|
), addr_mask)
|
||||||
), 32, true);
|
), 32, true);
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, urem, new_pc, static_cast<uint32_t>(traits::INSTR_ALIGNMENT))
|
cmp(cc, gen_operation(cc, urem, new_pc, static_cast<uint32_t>(traits::INSTR_ALIGNMENT))
|
||||||
,0);
|
,0);
|
||||||
@ -521,6 +522,7 @@ private:
|
|||||||
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(UNKNOWN_JUMP));
|
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(UNKNOWN_JUMP));
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -566,6 +568,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
cmp(cc, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||||
,0);
|
,0);
|
||||||
@ -583,6 +586,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -628,6 +632,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||||
,0);
|
,0);
|
||||||
@ -645,6 +650,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -690,6 +696,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, lt, gen_ext(cc,
|
cmp(cc, gen_operation(cc, lt, gen_ext(cc,
|
||||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(cc,
|
load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(cc,
|
||||||
@ -709,6 +716,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -754,6 +762,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, gte, gen_ext(cc,
|
cmp(cc, gen_operation(cc, gte, gen_ext(cc,
|
||||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(cc,
|
load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(cc,
|
||||||
@ -773,6 +782,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -818,6 +828,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ltu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
cmp(cc, gen_operation(cc, ltu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||||
,0);
|
,0);
|
||||||
@ -835,6 +846,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -880,6 +892,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, gteu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
cmp(cc, gen_operation(cc, gteu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||||
,0);
|
,0);
|
||||||
@ -897,6 +910,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
@ -2364,7 +2378,7 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "ecall";
|
std::string mnemonic = "ecall";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -2401,7 +2415,7 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "ebreak";
|
std::string mnemonic = "ebreak";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -2438,7 +2452,7 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "mret";
|
std::string mnemonic = "mret";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -2475,7 +2489,7 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "wfi";
|
std::string mnemonic = "wfi";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -2497,7 +2511,10 @@ private:
|
|||||||
gen_instr_prologue(jh);
|
gen_instr_prologue(jh);
|
||||||
cc.comment("//behavior:");
|
cc.comment("//behavior:");
|
||||||
/*generate behavior*/
|
/*generate behavior*/
|
||||||
gen_wait(jh, 1);
|
InvokeNode* call_wait;
|
||||||
|
jh.cc.comment("//call_wait");
|
||||||
|
jh.cc.invoke(&call_wait, &wait, FuncSignature::build<void, int32_t>());
|
||||||
|
setArg(call_wait, 0, 1);
|
||||||
auto returnValue = CONT;
|
auto returnValue = CONT;
|
||||||
|
|
||||||
gen_sync(jh, POST_SYNC, 41);
|
gen_sync(jh, POST_SYNC, 41);
|
||||||
@ -3116,6 +3133,7 @@ private:
|
|||||||
auto divisor = gen_ext(cc,
|
auto divisor = gen_ext(cc,
|
||||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true);
|
load_reg_from_mem(jh, traits::X0 + rs2), 32, true);
|
||||||
if(rd!=0){
|
if(rd!=0){
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, divisor, 0)
|
cmp(cc, gen_operation(cc, ne, divisor, 0)
|
||||||
,0);
|
,0);
|
||||||
@ -3123,6 +3141,7 @@ private:
|
|||||||
cc.je(label_else);
|
cc.je(label_else);
|
||||||
{
|
{
|
||||||
auto MMIN = ((uint32_t)1)<<(static_cast<uint32_t>(traits::XLEN)-1);
|
auto MMIN = ((uint32_t)1)<<(static_cast<uint32_t>(traits::XLEN)-1);
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, land, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN)
|
cmp(cc, gen_operation(cc, land, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN)
|
||||||
, gen_operation(cc, eq, divisor, - 1)
|
, gen_operation(cc, eq, divisor, - 1)
|
||||||
@ -3143,6 +3162,7 @@ private:
|
|||||||
), 32, true));
|
), 32, true));
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
cc.jmp(label_merge);
|
cc.jmp(label_merge);
|
||||||
cc.bind(label_else);
|
cc.bind(label_else);
|
||||||
@ -3151,6 +3171,7 @@ private:
|
|||||||
(uint32_t)- 1);
|
(uint32_t)- 1);
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = CONT;
|
auto returnValue = CONT;
|
||||||
@ -3196,6 +3217,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
||||||
,0);
|
,0);
|
||||||
@ -3217,6 +3239,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = CONT;
|
auto returnValue = CONT;
|
||||||
|
|
||||||
@ -3261,6 +3284,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
||||||
,0);
|
,0);
|
||||||
@ -3268,6 +3292,7 @@ private:
|
|||||||
cc.je(label_else);
|
cc.je(label_else);
|
||||||
{
|
{
|
||||||
auto MMIN = (uint32_t)1<<(static_cast<uint32_t>(traits::XLEN)-1);
|
auto MMIN = (uint32_t)1<<(static_cast<uint32_t>(traits::XLEN)-1);
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, land, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN)
|
cmp(cc, gen_operation(cc, land, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN)
|
||||||
, gen_operation(cc, eq, gen_ext(cc,
|
, gen_operation(cc, eq, gen_ext(cc,
|
||||||
@ -3296,6 +3321,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
cc.jmp(label_merge);
|
cc.jmp(label_merge);
|
||||||
cc.bind(label_else);
|
cc.bind(label_else);
|
||||||
@ -3306,6 +3332,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = CONT;
|
auto returnValue = CONT;
|
||||||
|
|
||||||
@ -3350,6 +3377,7 @@ private:
|
|||||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||||
}
|
}
|
||||||
else{
|
else{
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0)
|
||||||
,0);
|
,0);
|
||||||
@ -3371,6 +3399,7 @@ private:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
auto returnValue = CONT;
|
auto returnValue = CONT;
|
||||||
|
|
||||||
@ -3388,7 +3417,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__addi4spn"),
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c.addi4spn"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("imm", imm));
|
fmt::arg("rd", name(8+rd)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3436,7 +3465,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c__lw"),
|
"{mnemonic:10} {rd}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c.lw"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
fmt::arg("rd", name(8+rd)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3482,7 +3511,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs2}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c__sw"),
|
"{mnemonic:10} {rs2}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c.sw"),
|
||||||
fmt::arg("rs2", name(8+rs2)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
fmt::arg("rs2", name(8+rs2)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3525,7 +3554,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__addi"),
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c.addi"),
|
||||||
fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3572,8 +3601,8 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "c__nop";
|
std::string mnemonic = "c.nop";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
jh.disass_collection.push_back(mnemonic_ptr);
|
jh.disass_collection.push_back(mnemonic_ptr);
|
||||||
@ -3609,7 +3638,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c__jal"),
|
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c.jal"),
|
||||||
fmt::arg("imm", imm));
|
fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3653,7 +3682,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__li"),
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c.li"),
|
||||||
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3700,7 +3729,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__lui"),
|
"{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c.lui"),
|
||||||
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3744,7 +3773,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {nzimm:#05x}", fmt::arg("mnemonic", "c__addi16sp"),
|
"{mnemonic:10} {nzimm:#05x}", fmt::arg("mnemonic", "c.addi16sp"),
|
||||||
fmt::arg("nzimm", nzimm));
|
fmt::arg("nzimm", nzimm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3789,8 +3818,8 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "__reserved_clui";
|
std::string mnemonic = ".reserved_clui";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
jh.disass_collection.push_back(mnemonic_ptr);
|
jh.disass_collection.push_back(mnemonic_ptr);
|
||||||
@ -3828,7 +3857,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c__srli"),
|
"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c.srli"),
|
||||||
fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3869,7 +3898,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c__srai"),
|
"{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c.srai"),
|
||||||
fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3923,7 +3952,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__andi"),
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c.andi"),
|
||||||
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -3965,7 +3994,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__sub"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.sub"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4007,7 +4036,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__xor"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.xor"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4048,7 +4077,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__or"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.or"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4089,7 +4118,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__and"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.and"),
|
||||||
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4129,7 +4158,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c__j"),
|
"{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c.j"),
|
||||||
fmt::arg("imm", imm));
|
fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4171,7 +4200,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__beqz"),
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c.beqz"),
|
||||||
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4194,6 +4223,7 @@ private:
|
|||||||
cc.comment("//behavior:");
|
cc.comment("//behavior:");
|
||||||
/*generate behavior*/
|
/*generate behavior*/
|
||||||
mov(jh.cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(NO_JUMP));
|
mov(jh.cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(NO_JUMP));
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1+8), 0)
|
cmp(cc, gen_operation(cc, eq, load_reg_from_mem(jh, traits::X0 + rs1+8), 0)
|
||||||
,0);
|
,0);
|
||||||
@ -4204,6 +4234,7 @@ private:
|
|||||||
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(KNOWN_JUMP));
|
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(KNOWN_JUMP));
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
gen_sync(jh, POST_SYNC, 75);
|
gen_sync(jh, POST_SYNC, 75);
|
||||||
@ -4220,7 +4251,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__bnez"),
|
"{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c.bnez"),
|
||||||
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4243,6 +4274,7 @@ private:
|
|||||||
cc.comment("//behavior:");
|
cc.comment("//behavior:");
|
||||||
/*generate behavior*/
|
/*generate behavior*/
|
||||||
mov(jh.cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(NO_JUMP));
|
mov(jh.cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(NO_JUMP));
|
||||||
|
{
|
||||||
auto label_merge = cc.newLabel();
|
auto label_merge = cc.newLabel();
|
||||||
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs1+8), 0)
|
cmp(cc, gen_operation(cc, ne, load_reg_from_mem(jh, traits::X0 + rs1+8), 0)
|
||||||
,0);
|
,0);
|
||||||
@ -4253,6 +4285,7 @@ private:
|
|||||||
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(KNOWN_JUMP));
|
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), static_cast<int>(KNOWN_JUMP));
|
||||||
}
|
}
|
||||||
cc.bind(label_merge);
|
cc.bind(label_merge);
|
||||||
|
}
|
||||||
auto returnValue = BRANCH;
|
auto returnValue = BRANCH;
|
||||||
|
|
||||||
gen_sync(jh, POST_SYNC, 76);
|
gen_sync(jh, POST_SYNC, 76);
|
||||||
@ -4269,7 +4302,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {nzuimm}", fmt::arg("mnemonic", "c__slli"),
|
"{mnemonic:10} {rs1}, {nzuimm}", fmt::arg("mnemonic", "c.slli"),
|
||||||
fmt::arg("rs1", name(rs1)), fmt::arg("nzuimm", nzuimm));
|
fmt::arg("rs1", name(rs1)), fmt::arg("nzuimm", nzuimm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4317,7 +4350,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, sp, {uimm:#05x}", fmt::arg("mnemonic", "c__lwsp"),
|
"{mnemonic:10} {rd}, sp, {uimm:#05x}", fmt::arg("mnemonic", "c.lwsp"),
|
||||||
fmt::arg("rd", name(rd)), fmt::arg("uimm", uimm));
|
fmt::arg("rd", name(rd)), fmt::arg("uimm", uimm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4367,7 +4400,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__mv"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.mv"),
|
||||||
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4413,7 +4446,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c__jr"),
|
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c.jr"),
|
||||||
fmt::arg("rs1", name(rs1)));
|
fmt::arg("rs1", name(rs1)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4459,8 +4492,8 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "__reserved_cmv";
|
std::string mnemonic = ".reserved_cmv";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
jh.disass_collection.push_back(mnemonic_ptr);
|
jh.disass_collection.push_back(mnemonic_ptr);
|
||||||
@ -4498,7 +4531,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__add"),
|
"{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c.add"),
|
||||||
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4546,7 +4579,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c__jalr"),
|
"{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c.jalr"),
|
||||||
fmt::arg("rs1", name(rs1)));
|
fmt::arg("rs1", name(rs1)));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4595,8 +4628,8 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "c__ebreak";
|
std::string mnemonic = "c.ebreak";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
jh.disass_collection.push_back(mnemonic_ptr);
|
jh.disass_collection.push_back(mnemonic_ptr);
|
||||||
@ -4634,7 +4667,7 @@ private:
|
|||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs2}, {uimm:#05x}(sp)", fmt::arg("mnemonic", "c__swsp"),
|
"{mnemonic:10} {rs2}, {uimm:#05x}(sp)", fmt::arg("mnemonic", "c.swsp"),
|
||||||
fmt::arg("rs2", name(rs2)), fmt::arg("uimm", uimm));
|
fmt::arg("rs2", name(rs2)), fmt::arg("uimm", uimm));
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4679,7 +4712,7 @@ private:
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate disass */
|
/* generate disass */
|
||||||
|
|
||||||
//This disass is not yet implemented
|
//No disass specified, using instruction name
|
||||||
std::string mnemonic = "dii";
|
std::string mnemonic = "dii";
|
||||||
InvokeNode* call_print_disass;
|
InvokeNode* call_print_disass;
|
||||||
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
char* mnemonic_ptr = strdup(mnemonic.c_str());
|
||||||
@ -4735,7 +4768,7 @@ private:
|
|||||||
gen_raise(jh, 0, 2);
|
gen_raise(jh, 0, 2);
|
||||||
gen_sync(jh, POST_SYNC, instr_descr.size());
|
gen_sync(jh, POST_SYNC, instr_descr.size());
|
||||||
gen_instr_epilogue(jh);
|
gen_instr_epilogue(jh);
|
||||||
return BRANCH;
|
return ILLEGAL_INSTR;
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -4764,9 +4797,9 @@ continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned
|
|||||||
paddr = this->core.virt2phys(pc);
|
paddr = this->core.virt2phys(pc);
|
||||||
auto res = this->core.read(paddr, 4, data);
|
auto res = this->core.read(paddr, 4, data);
|
||||||
if (res != iss::Ok)
|
if (res != iss::Ok)
|
||||||
throw trap_access(TRAP_ID, pc.val);
|
return ILLEGAL_FETCH;
|
||||||
if (instr == 0x0000006f || (instr&0xffff)==0xa001)
|
if (instr == 0x0000006f || (instr&0xffff)==0xa001)
|
||||||
throw simulation_stopped(0); // 'J 0' or 'C.J 0'
|
return JUMP_TO_SELF;
|
||||||
++inst_cnt;
|
++inst_cnt;
|
||||||
uint32_t inst_index = instr_decoder.decode_instr(instr);
|
uint32_t inst_index = instr_decoder.decode_instr(instr);
|
||||||
compile_func f = nullptr;
|
compile_func f = nullptr;
|
||||||
|
@ -343,7 +343,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
uint32_t inst_index = instr_decoder.decode_instr(instr);
|
uint32_t inst_index = instr_decoder.decode_instr(instr);
|
||||||
opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
|
opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
|
||||||
if(inst_index <instr_descr.size())
|
if(inst_index <instr_descr.size())
|
||||||
inst_id = instr_descr.at(instr_decoder.decode_instr(instr)).op;
|
inst_id = instr_descr[inst_index].op;
|
||||||
|
|
||||||
// pre execution stuff
|
// pre execution stuff
|
||||||
this->core.reg.last_branch = 0;
|
this->core.reg.last_branch = 0;
|
||||||
@ -1458,7 +1458,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::ECALL: {
|
case arch::traits<ARCH>::opcode_e::ECALL: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "ecall");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "ecall";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 4;
|
*NEXT_PC = *PC + 4;
|
||||||
@ -1471,7 +1473,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::EBREAK: {
|
case arch::traits<ARCH>::opcode_e::EBREAK: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "ebreak");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "ebreak";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 4;
|
*NEXT_PC = *PC + 4;
|
||||||
@ -1484,7 +1488,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::MRET: {
|
case arch::traits<ARCH>::opcode_e::MRET: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "mret");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "mret";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 4;
|
*NEXT_PC = *PC + 4;
|
||||||
@ -1497,7 +1503,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::WFI: {
|
case arch::traits<ARCH>::opcode_e::WFI: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "wfi");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "wfi";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 4;
|
*NEXT_PC = *PC + 4;
|
||||||
@ -1721,7 +1729,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
auto mnemonic = fmt::format(
|
auto mnemonic = fmt::format(
|
||||||
"{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence.i"),
|
"{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"),
|
||||||
fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
|
||||||
this->core.disass_output(pc.val, mnemonic);
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
@ -2095,7 +2103,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
|
uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "c.nop");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "c.nop";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 2;
|
*NEXT_PC = *PC + 2;
|
||||||
@ -2201,7 +2211,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
uint8_t rd = ((bit_sub<7,5>(instr)));
|
uint8_t rd = ((bit_sub<7,5>(instr)));
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, ".reserved_clui");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = ".reserved_clui";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 2;
|
*NEXT_PC = *PC + 2;
|
||||||
@ -2520,7 +2532,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::__reserved_cmv: {
|
case arch::traits<ARCH>::opcode_e::__reserved_cmv: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, ".reserved_cmv");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = ".reserved_cmv";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 2;
|
*NEXT_PC = *PC + 2;
|
||||||
@ -2586,7 +2600,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::C__EBREAK: {
|
case arch::traits<ARCH>::opcode_e::C__EBREAK: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "c.ebreak");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "c.ebreak";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 2;
|
*NEXT_PC = *PC + 2;
|
||||||
@ -2625,7 +2641,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||||||
case arch::traits<ARCH>::opcode_e::DII: {
|
case arch::traits<ARCH>::opcode_e::DII: {
|
||||||
if(this->disass_enabled){
|
if(this->disass_enabled){
|
||||||
/* generate console output when executing the command */
|
/* generate console output when executing the command */
|
||||||
this->core.disass_output(pc.val, "dii");
|
//No disass specified, using instruction name
|
||||||
|
std::string mnemonic = "dii";
|
||||||
|
this->core.disass_output(pc.val, mnemonic);
|
||||||
}
|
}
|
||||||
// used registers// calculate next pc value
|
// used registers// calculate next pc value
|
||||||
*NEXT_PC = *PC + 2;
|
*NEXT_PC = *PC + 2;
|
||||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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Reference in New Issue
Block a user