update vm_tgc_c due reworked CoreDSL generator

2022-05-11 18:52:15 +02:00
1 changed files with 1 additions and 1 deletions
--- a/src/vm/interp/vm_tgc_c.cpp
+++ b/src/vm/interp/vm_tgc_c.cpp
@@ -1921,7 +1921,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            if((rd % traits::RFS) !=  0) *(X+rd) = (uint32_t)(int32_t)sext<6>(imm);
+		            if((rd % traits::RFS) !=  0) *(X+rd % traits::RFS) = (int8_t)sext<6>(imm);
 		        }
 		        } catch(...){}
 	    	}