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70839bbbf2
| Author | SHA1 | Date |
|---|---|---|
 Eyck-Alexander Jentzsch
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70839bbbf2 | |
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Eyck-Alexander Jentzsch
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8db0cc5d05 |
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@ -1,86 +0,0 @@
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#include "${coreDef.name.toLowerCase()}.h"
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#include <vector>
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#include <array>
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#include <cstdlib>
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#include <algorithm>
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namespace iss {
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namespace arch {
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namespace {
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// according to
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// https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation
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#ifdef __GCC__
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constexpr size_t bit_count(uint32_t u) { return __builtin_popcount(u); }
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#elif __cplusplus < 201402L
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constexpr size_t uCount(uint32_t u) { return u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111); }
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constexpr size_t bit_count(uint32_t u) { return ((uCount(u) + (uCount(u) >> 3)) & 030707070707) % 63; }
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#else
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constexpr size_t bit_count(uint32_t u) {
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size_t uCount = u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111);
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return ((uCount + (uCount >> 3)) & 030707070707) % 63;
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}
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#endif
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using opcode_e = traits<${coreDef.name.toLowerCase()}>::opcode_e;
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/****************************************************************************
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* start opcode definitions
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****************************************************************************/
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struct instruction_desriptor {
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size_t length;
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uint32_t value;
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uint32_t mask;
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opcode_e op;
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};
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const std::array<instruction_desriptor, ${instructions.size}> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */<%instructions.each{instr -> %>
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{${instr.length}, ${instr.encoding}, ${instr.mask}, opcode_e::${instr.instruction.name}},<%}%>
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}};
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}
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template<>
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struct instruction_decoder<${coreDef.name.toLowerCase()}> {
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using opcode_e = traits<${coreDef.name.toLowerCase()}>::opcode_e;
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using code_word_t=traits<${coreDef.name.toLowerCase()}>::code_word_t;
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struct instruction_pattern {
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uint32_t value;
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uint32_t mask;
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opcode_e id;
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};
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std::array<std::vector<instruction_pattern>, 4> qlut;
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template<typename T>
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unsigned decode_instruction(T);
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instruction_decoder() {
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for (auto instr : instr_descr) {
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auto quadrant = instr.value & 0x3;
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qlut[quadrant].push_back(instruction_pattern{instr.value, instr.mask, instr.op});
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}
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for(auto& lut: qlut){
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std::sort(std::begin(lut), std::end(lut), [](instruction_pattern const& a, instruction_pattern const& b){
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return bit_count(a.mask) < bit_count(b.mask);
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});
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}
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}
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};
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template<>
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unsigned instruction_decoder<${coreDef.name.toLowerCase()}>::decode_instruction<traits<${coreDef.name.toLowerCase()}>::code_word_t>(traits<${coreDef.name.toLowerCase()}>::code_word_t instr){
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auto res = std::find_if(std::begin(qlut[instr&0x3]), std::end(qlut[instr&0x3]), [instr](instruction_pattern const& e){
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return !((instr&e.mask) ^ e.value );
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});
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return static_cast<unsigned>(res!=std::end(qlut[instr&0x3])? res->id : opcode_e::MAX_OPCODE);
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}
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std::unique_ptr<instruction_decoder<${coreDef.name.toLowerCase()}>> traits<${coreDef.name.toLowerCase()}>::get_decoder(){
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return std::make_unique<instruction_decoder<${coreDef.name.toLowerCase()}>>();
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}
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}
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}
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@ -305,6 +305,8 @@ template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned t
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}
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template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) {
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tu("trap_entry_plugin:");
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this->gen_sync(tu, POST_SYNC, -1);
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tu("trap_entry:");
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tu("enter_trap(core_ptr, *trap_state, *pc, 0);");
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tu.store(traits::LAST_BRANCH, tu.constant(std::numeric_limits<uint32_t>::max(),32));
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@ -1,175 +0,0 @@
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#include "tgc_c.h"
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#include <vector>
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#include <array>
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#include <cstdlib>
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#include <algorithm>
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namespace iss {
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namespace arch {
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namespace {
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// according to
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// https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation
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#ifdef __GCC__
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constexpr size_t bit_count(uint32_t u) { return __builtin_popcount(u); }
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#elif __cplusplus < 201402L
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constexpr size_t uCount(uint32_t u) { return u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111); }
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constexpr size_t bit_count(uint32_t u) { return ((uCount(u) + (uCount(u) >> 3)) & 030707070707) % 63; }
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#else
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constexpr size_t bit_count(uint32_t u) {
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size_t uCount = u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111);
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return ((uCount + (uCount >> 3)) & 030707070707) % 63;
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}
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#endif
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using opcode_e = traits<tgc_c>::opcode_e;
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/****************************************************************************
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* start opcode definitions
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****************************************************************************/
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struct instruction_desriptor {
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size_t length;
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uint32_t value;
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uint32_t mask;
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opcode_e op;
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};
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const std::array<instruction_desriptor, 90> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */
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{32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, opcode_e::LUI},
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{32, 0b00000000000000000000000000010111, 0b00000000000000000000000001111111, opcode_e::AUIPC},
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{32, 0b00000000000000000000000001101111, 0b00000000000000000000000001111111, opcode_e::JAL},
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{32, 0b00000000000000000000000001100111, 0b00000000000000000111000001111111, opcode_e::JALR},
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{32, 0b00000000000000000000000001100011, 0b00000000000000000111000001111111, opcode_e::BEQ},
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{32, 0b00000000000000000001000001100011, 0b00000000000000000111000001111111, opcode_e::BNE},
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{32, 0b00000000000000000100000001100011, 0b00000000000000000111000001111111, opcode_e::BLT},
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{32, 0b00000000000000000101000001100011, 0b00000000000000000111000001111111, opcode_e::BGE},
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{32, 0b00000000000000000110000001100011, 0b00000000000000000111000001111111, opcode_e::BLTU},
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{32, 0b00000000000000000111000001100011, 0b00000000000000000111000001111111, opcode_e::BGEU},
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{32, 0b00000000000000000000000000000011, 0b00000000000000000111000001111111, opcode_e::LB},
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{32, 0b00000000000000000001000000000011, 0b00000000000000000111000001111111, opcode_e::LH},
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{32, 0b00000000000000000010000000000011, 0b00000000000000000111000001111111, opcode_e::LW},
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{32, 0b00000000000000000100000000000011, 0b00000000000000000111000001111111, opcode_e::LBU},
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{32, 0b00000000000000000101000000000011, 0b00000000000000000111000001111111, opcode_e::LHU},
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{32, 0b00000000000000000000000000100011, 0b00000000000000000111000001111111, opcode_e::SB},
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{32, 0b00000000000000000001000000100011, 0b00000000000000000111000001111111, opcode_e::SH},
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{32, 0b00000000000000000010000000100011, 0b00000000000000000111000001111111, opcode_e::SW},
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{32, 0b00000000000000000000000000010011, 0b00000000000000000111000001111111, opcode_e::ADDI},
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{32, 0b00000000000000000010000000010011, 0b00000000000000000111000001111111, opcode_e::SLTI},
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{32, 0b00000000000000000011000000010011, 0b00000000000000000111000001111111, opcode_e::SLTIU},
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{32, 0b00000000000000000100000000010011, 0b00000000000000000111000001111111, opcode_e::XORI},
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{32, 0b00000000000000000110000000010011, 0b00000000000000000111000001111111, opcode_e::ORI},
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{32, 0b00000000000000000111000000010011, 0b00000000000000000111000001111111, opcode_e::ANDI},
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{32, 0b00000000000000000001000000010011, 0b11111110000000000111000001111111, opcode_e::SLLI},
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{32, 0b00000000000000000101000000010011, 0b11111110000000000111000001111111, opcode_e::SRLI},
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{32, 0b01000000000000000101000000010011, 0b11111110000000000111000001111111, opcode_e::SRAI},
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{32, 0b00000000000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::ADD},
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{32, 0b01000000000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::SUB},
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{32, 0b00000000000000000001000000110011, 0b11111110000000000111000001111111, opcode_e::SLL},
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{32, 0b00000000000000000010000000110011, 0b11111110000000000111000001111111, opcode_e::SLT},
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{32, 0b00000000000000000011000000110011, 0b11111110000000000111000001111111, opcode_e::SLTU},
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{32, 0b00000000000000000100000000110011, 0b11111110000000000111000001111111, opcode_e::XOR},
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{32, 0b00000000000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::SRL},
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{32, 0b01000000000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::SRA},
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{32, 0b00000000000000000110000000110011, 0b11111110000000000111000001111111, opcode_e::OR},
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{32, 0b00000000000000000111000000110011, 0b11111110000000000111000001111111, opcode_e::AND},
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{32, 0b00000000000000000000000000001111, 0b00000000000000000111000001111111, opcode_e::FENCE},
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{32, 0b00000000000000000000000001110011, 0b11111111111111111111111111111111, opcode_e::ECALL},
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{32, 0b00000000000100000000000001110011, 0b11111111111111111111111111111111, opcode_e::EBREAK},
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{32, 0b00000000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::URET},
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{32, 0b00010000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::SRET},
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{32, 0b00110000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::MRET},
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{32, 0b00010000010100000000000001110011, 0b11111111111111111111111111111111, opcode_e::WFI},
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{32, 0b01111011001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::DRET},
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{32, 0b00000000000000000001000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRW},
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{32, 0b00000000000000000010000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRS},
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{32, 0b00000000000000000011000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRC},
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{32, 0b00000000000000000101000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRWI},
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{32, 0b00000000000000000110000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRSI},
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{32, 0b00000000000000000111000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRCI},
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{32, 0b00000000000000000001000000001111, 0b00000000000000000111000001111111, opcode_e::FENCE_I},
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{32, 0b00000010000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::MUL},
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{32, 0b00000010000000000001000000110011, 0b11111110000000000111000001111111, opcode_e::MULH},
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{32, 0b00000010000000000010000000110011, 0b11111110000000000111000001111111, opcode_e::MULHSU},
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{32, 0b00000010000000000011000000110011, 0b11111110000000000111000001111111, opcode_e::MULHU},
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{32, 0b00000010000000000100000000110011, 0b11111110000000000111000001111111, opcode_e::DIV},
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{32, 0b00000010000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::DIVU},
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{32, 0b00000010000000000110000000110011, 0b11111110000000000111000001111111, opcode_e::REM},
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{32, 0b00000010000000000111000000110011, 0b11111110000000000111000001111111, opcode_e::REMU},
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{16, 0b0000000000000000, 0b1110000000000011, opcode_e::CADDI4SPN},
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{16, 0b0100000000000000, 0b1110000000000011, opcode_e::CLW},
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{16, 0b1100000000000000, 0b1110000000000011, opcode_e::CSW},
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{16, 0b0000000000000001, 0b1110000000000011, opcode_e::CADDI},
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{16, 0b0000000000000001, 0b1110111110000011, opcode_e::CNOP},
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{16, 0b0010000000000001, 0b1110000000000011, opcode_e::CJAL},
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{16, 0b0100000000000001, 0b1110000000000011, opcode_e::CLI},
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{16, 0b0110000000000001, 0b1110000000000011, opcode_e::CLUI},
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{16, 0b0110000100000001, 0b1110111110000011, opcode_e::CADDI16SP},
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{16, 0b0110000000000001, 0b1111000001111111, opcode_e::__reserved_clui},
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{16, 0b1000000000000001, 0b1111110000000011, opcode_e::CSRLI},
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{16, 0b1000010000000001, 0b1111110000000011, opcode_e::CSRAI},
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{16, 0b1000100000000001, 0b1110110000000011, opcode_e::CANDI},
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{16, 0b1000110000000001, 0b1111110001100011, opcode_e::CSUB},
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{16, 0b1000110000100001, 0b1111110001100011, opcode_e::CXOR},
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{16, 0b1000110001000001, 0b1111110001100011, opcode_e::COR},
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{16, 0b1000110001100001, 0b1111110001100011, opcode_e::CAND},
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{16, 0b1010000000000001, 0b1110000000000011, opcode_e::CJ},
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{16, 0b1100000000000001, 0b1110000000000011, opcode_e::CBEQZ},
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{16, 0b1110000000000001, 0b1110000000000011, opcode_e::CBNEZ},
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{16, 0b0000000000000010, 0b1111000000000011, opcode_e::CSLLI},
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{16, 0b0100000000000010, 0b1110000000000011, opcode_e::CLWSP},
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{16, 0b1000000000000010, 0b1111000000000011, opcode_e::CMV},
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{16, 0b1000000000000010, 0b1111000001111111, opcode_e::CJR},
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{16, 0b1000000000000010, 0b1111111111111111, opcode_e::__reserved_cmv},
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{16, 0b1001000000000010, 0b1111000000000011, opcode_e::CADD},
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{16, 0b1001000000000010, 0b1111000001111111, opcode_e::CJALR},
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{16, 0b1001000000000010, 0b1111111111111111, opcode_e::CEBREAK},
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{16, 0b1100000000000010, 0b1110000000000011, opcode_e::CSWSP},
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{16, 0b0000000000000000, 0b1111111111111111, opcode_e::DII},
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}};
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}
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template<>
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struct instruction_decoder<tgc_c> {
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using opcode_e = traits<tgc_c>::opcode_e;
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using code_word_t=traits<tgc_c>::code_word_t;
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struct instruction_pattern {
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uint32_t value;
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uint32_t mask;
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opcode_e id;
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};
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std::array<std::vector<instruction_pattern>, 4> qlut;
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template<typename T>
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unsigned decode_instruction(T);
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instruction_decoder() {
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for (auto instr : instr_descr) {
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auto quadrant = instr.value & 0x3;
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qlut[quadrant].push_back(instruction_pattern{instr.value, instr.mask, instr.op});
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}
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for(auto& lut: qlut){
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std::sort(std::begin(lut), std::end(lut), [](instruction_pattern const& a, instruction_pattern const& b){
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return bit_count(a.mask) > bit_count(b.mask);
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});
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}
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}
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};
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template<>
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unsigned instruction_decoder<tgc_c>::decode_instruction<traits<tgc_c>::code_word_t>(traits<tgc_c>::code_word_t instr){
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auto res = std::find_if(std::begin(qlut[instr&0x3]), std::end(qlut[instr&0x3]), [instr](instruction_pattern const& e){
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return !((instr&e.mask) ^ e.value );
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});
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return static_cast<unsigned>(res!=std::end(qlut[instr&0x3])? res->id : opcode_e::MAX_OPCODE);
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}
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std::unique_ptr<instruction_decoder<tgc_c>> traits<tgc_c>::get_decoder(){
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return std::make_unique<instruction_decoder<tgc_c>>();
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}
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}
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}
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@ -462,12 +462,11 @@ private:
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this->gen_raise_trap(tu, 0, 2);
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}
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else{
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auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
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auto new_pc = tu.assignment(tu.ext((tu.bitwise_and(
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(tu.add(
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tu.load(rs1+ traits::X0, 0),
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tu.constant((int16_t)sext<12>(imm),16))),
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addr_mask)),32,false),32);
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tu.constant(~ 0x1,8))),32,false),32);
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tu.open_if(tu.urem(
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new_pc,
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tu.constant(static_cast<uint32_t>(traits:: INSTR_ALIGNMENT),32)));
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@ -477,7 +476,9 @@ private:
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tu.store(rd + traits::X0,
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tu.constant((uint32_t)(PC+ 4),32));
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}
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auto PC_val_v = tu.assignment("PC_val", new_pc,32);
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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new_pc,
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tu.constant(~ 0x1,8)),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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tu.close_scope();
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@ -2472,7 +2473,7 @@ private:
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tu.open_if(tu.icmp(ICmpInst::ICMP_NE,
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tu.load(rs2+ traits::X0, 0),
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tu.constant( 0,8)));
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auto MMIN = tu.assignment(tu.constant((uint32_t)1<<(static_cast<uint32_t>(traits:: XLEN)-1),32),32);
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auto MMIN = tu.assignment(tu.constant( 1<<(static_cast<uint32_t>(traits:: XLEN)-1),8),32);
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tu.open_if(tu.logical_and(
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tu.icmp(ICmpInst::ICMP_EQ,
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tu.load(rs1+ traits::X0, 0),
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@ -3303,12 +3304,12 @@ private:
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pc=pc+ 2;
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gen_set_pc(tu, pc, traits::NEXT_PC);
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tu.open_scope();
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if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)){ auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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tu.load(rs1%static_cast<uint32_t>(traits:: RFS)+ traits::X0, 0),
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addr_mask),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)) {
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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tu.load(rs1%static_cast<uint32_t>(traits:: RFS)+ traits::X0, 0),
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tu.constant(~ 0x1,8)),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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}
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else{
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this->gen_raise_trap(tu, 0, 2);
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@ -3401,13 +3402,12 @@ private:
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this->gen_raise_trap(tu, 0, 2);
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}
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else{
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||||
auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
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||||
auto new_pc = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
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||||
tu.store(1 + traits::X0,
|
||||
tu.constant((uint32_t)(PC+ 2),32));
|
||||
auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
|
||||
new_pc,
|
||||
addr_mask),32);
|
||||
tu.constant(~ 0x1,8)),32);
|
||||
tu.store(traits::NEXT_PC, PC_val_v);
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||||
tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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||||
}
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||||
|
|
@ -3626,6 +3626,8 @@ template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned t
|
|||
}
|
||||
|
||||
template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) {
|
||||
tu("trap_entry_plugin:");
|
||||
this->gen_sync(tu, POST_SYNC, -1);
|
||||
tu("trap_entry:");
|
||||
tu("enter_trap(core_ptr, *trap_state, *pc, 0);");
|
||||
tu.store(traits::LAST_BRANCH, tu.constant(std::numeric_limits<uint32_t>::max(),32));
|
||||
|
|
|
|||
Loading…
Reference in New Issue