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adaptes to changes in dbt-rise-core

This commit is contained in:
Eyck Jentzsch 2022-08-06 09:49:32 +02:00
parent 8407f6287f
commit e60fa3d5e6
1 changed files with 91 additions and 79 deletions
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20
src/iss/debugger/riscv_target_adapter.h
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@ -120,9 +120,9 @@ public:
status packetsize_query(std::string &out_buf) override; status packetsize_query(std::string &out_buf) override;
status add_break(int type, uint64_t addr, unsigned int length) override; status add_break(break_type type, uint64_t addr, unsigned int length) override;
status remove_break(int type, uint64_t addr, unsigned int length) override; status remove_break(break_type type, uint64_t addr, unsigned int length) override;
status resume_from_addr(bool step, int sig, uint64_t addr, rp_thread_ref thread, status resume_from_addr(bool step, int sig, uint64_t addr, rp_thread_ref thread,
std::function<void(unsigned)> stop_callback) override; std::function<void(unsigned)> stop_callback) override;
@ -331,7 +331,11 @@ template <typename ARCH> status riscv_target_adapter<ARCH>::packetsize_query(std
return Ok; return Ok;
} }
template <typename ARCH> status riscv_target_adapter<ARCH>::add_break(int type, uint64_t addr, unsigned int length) { template <typename ARCH> status riscv_target_adapter<ARCH>::add_break(break_type type, uint64_t addr, unsigned int length) {
switch(type) {
default:
return Err;
case HW_EXEC: {
auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr}); auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr});
auto eaddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr + length}); auto eaddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr + length});
target_adapter_base::bp_lut.addEntry(++target_adapter_base::bp_count, saddr.val, eaddr.val - saddr.val); target_adapter_base::bp_lut.addEntry(++target_adapter_base::bp_count, saddr.val, eaddr.val - saddr.val);
@ -340,8 +344,14 @@ template <typename ARCH> status riscv_target_adapter<ARCH>::add_break(int type,
LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints";
return Ok; return Ok;
} }
}
}
template <typename ARCH> status riscv_target_adapter<ARCH>::remove_break(int type, uint64_t addr, unsigned int length) { template <typename ARCH> status riscv_target_adapter<ARCH>::remove_break(break_type type, uint64_t addr, unsigned int length) {
switch(type) {
default:
return Err;
case HW_EXEC: {
auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr}); auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr});
unsigned handle = target_adapter_base::bp_lut.getEntry(saddr.val); unsigned handle = target_adapter_base::bp_lut.getEntry(saddr.val);
if (handle) { if (handle) {
@ -355,6 +365,8 @@ template <typename ARCH> status riscv_target_adapter<ARCH>::remove_break(int typ
LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints";
return Err; return Err;
} }
}
}
template <typename ARCH> template <typename ARCH>
status riscv_target_adapter<ARCH>::resume_from_addr(bool step, int sig, uint64_t addr, rp_thread_ref thread, status riscv_target_adapter<ARCH>::resume_from_addr(bool step, int sig, uint64_t addr, rp_thread_ref thread,