DBT-RISE/DBT-RISE-TGC
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update missing XLEN

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eyck committed 2021-03-09 11:03:37 +00:00
1 parent a6691bcd3c
commit bea0dcc387
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gen_input/CoreDSL-Instruction-Set-Description
+1 -1
Submodule gen_input/CoreDSL-Instruction-Set-Description updated: e7f694c726...32a985dfdf.
src/vm/interp/vm_tgf_c.cpp
+1 -1
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@@ -3341,7 +3341,7 @@ private:
*NEXT_PC = *PC + 2; *NEXT_PC = *PC + 2;
// execute instruction // execute instruction
{ {
uint8_t offs = *(X+2) + uimm; uint32_t offs = *(X+2) + uimm;
writeSpace4(traits::MEM, offs, (uint32_t)*(X+rs2)); writeSpace4(traits::MEM, offs, (uint32_t)*(X+rs2));
} }
// post execution stuff // post execution stuff