Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop

CMakeLists.txt

@@ -83,6 +83,10 @@ elseif(TARGET elfio::elfio)
 else()
     message(FATAL_ERROR "No elfio library found, maybe a find_package() call is missing")
 endif()
+if(TARGET lz4::lz4)
+    target_compile_definitions(${PROJECT_NAME} PUBLIC WITH_LZ4)
+    target_link_libraries(${PROJECT_NAME} PUBLIC lz4::lz4)
+endif()
 if(TARGET RapidJSON)
     target_link_libraries(${PROJECT_NAME} PUBLIC RapidJSON)
 endif()

gen_input/templates/CORENAME.h.gtl

@@ -163,13 +163,13 @@ struct ${coreDef.name.toLowerCase()}: public arch_if {
         uint${byteSize(reg.size)}_t ${reg.name} = 0;<%
         }}%>
     } reg;
+#pragma pack(pop)
     uint32_t trap_state = 0, pending_trap = 0;
     uint64_t icount = 0;
     uint64_t cycle = 0;
     uint64_t instret = 0;
     uint32_t instruction = 0;
     uint32_t last_branch = 0;
-#pragma pack(pop)
     std::array<address_type, 4> addr_mode;
     
     uint64_t interrupt_sim=0;

incl/iss/arch/riscv_hart_m_p.h

@@ -241,7 +241,9 @@ protected:
 
         uint64_t get_instr_word() override { return arch.instruction; }
 
-        uint64_t get_instr_count() { return arch.icount; }
+        uint64_t get_instr_count() override { return arch.icount; }
+
+        uint64_t get_pendig_traps() override { return arch.trap_state; }
 
         uint64_t get_total_cycles() override { return arch.icount + arch.cycle_offset; }
 

incl/iss/arch/riscv_hart_msu_vp.h

@@ -340,9 +340,13 @@ protected:
 
         virtual uint64_t get_next_pc() { return arch.get_next_pc(); };
 
-        uint64_t get_instr_count() { return arch.reg.icount; }
+        uint64_t get_instr_word() override { return arch.instruction; }
 
-        uint64_t get_total_cycles() override { return arch.reg.icount + arch.cycle_offset; }
+        uint64_t get_instr_count() { return arch.icount; }
+
+        uint64_t get_pendig_traps() override { return arch.trap_state; }
+
+        uint64_t get_total_cycles() override { return arch.icount + arch.cycle_offset; }
 
         virtual void set_curr_instr_cycles(unsigned cycles) { arch.cycle_offset += cycles - 1; };
 

incl/iss/arch/riscv_hart_mu_p.h

@@ -254,9 +254,13 @@ protected:
 
         virtual uint64_t get_next_pc() { return arch.get_next_pc(); };
 
-        uint64_t get_instr_count() { return arch.reg.icount; }
+        uint64_t get_instr_word() override { return arch.instruction; }
 
-        uint64_t get_total_cycles() override { return arch.reg.icount + arch.cycle_offset; }
+        uint64_t get_instr_count() { return arch.icount; }
+
+        uint64_t get_pendig_traps() override { return arch.trap_state; }
+
+        uint64_t get_total_cycles() override { return arch.icount + arch.cycle_offset; }
 
         virtual void set_curr_instr_cycles(unsigned cycles) { arch.cycle_offset += cycles - 1; };
 

incl/iss/arch/tgc_c.h

@@ -53,7 +53,7 @@ template <> struct traits<tgc_c> {
     static constexpr std::array<const char*, 36> reg_aliases{
         {"ZERO", "RA", "SP", "GP", "TP", "T0", "T1", "T2", "S0", "S1", "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "S2", "S3", "S4", "S5", "S6", "S7", "S8", "S9", "S10", "S11", "T3", "T4", "T5", "T6", "PC", "NEXT_PC", "PRIV", "DPC"}};
 
-    enum constants {MISA_VAL=0b01000000000000000001000100000100, MARCHID_VAL=0x80000003, RFS=32, XLEN=32, CSR_SIZE=4096, INSTR_ALIGNMENT=2, fence=0, fencei=1, fencevmal=2, fencevmau=3, MUL_LEN=64};
+    enum constants {MISA_VAL=0b01000000000000000001000100000100, MARCHID_VAL=0x80000003, RFS=32, INSTR_ALIGNMENT=2, XLEN=32, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3, MUL_LEN=64};
 
     constexpr static unsigned FP_REGS_SIZE = 0;
 
@@ -252,13 +252,13 @@ struct tgc_c: public arch_if {
         uint8_t PRIV = 0; 
         uint32_t DPC = 0;
     } reg;
+#pragma pack(pop)
     uint32_t trap_state = 0, pending_trap = 0;
     uint64_t icount = 0;
     uint64_t cycle = 0;
     uint64_t instret = 0;
     uint32_t instruction = 0;
     uint32_t last_branch = 0;
-#pragma pack(pop)
     std::array<address_type, 4> addr_mode;
     
     uint64_t interrupt_sim=0;

incl/iss/plugin/pctrace.h

@@ -44,7 +44,7 @@
 
 namespace iss {
 namespace plugin {
-
+class lz4compress_steambuf;
 class cov : public iss::vm_plugin {
     struct instr_delay {
         std::string instr_name;
@@ -88,10 +88,13 @@ public:
 private:
     iss::instrumentation_if *instr_if  {nullptr};
     std::ofstream output;
+#ifdef WITH_LZ4
+    std::unique_ptr<lz4compress_steambuf> strbuf;
+    std::ostream ostr;
+#endif
     std::string filename;
     std::vector<instr_desc> delays;
-    bool jumped, first;
+    bool jumped{false}, first{true};
-
 };
 }
 }

src/main.cpp

@@ -60,13 +60,13 @@ int main(int argc, char *argv[]) {
     desc.add_options()
         ("help,h", "Print help message")
         ("verbose,v", po::value<int>()->implicit_value(0), "Sets logging verbosity")
-        ("logfile,f", po::value<std::string>(), "Sets default log file.")
+        ("logfile,l", po::value<std::string>(), "Sets default log file.")
         ("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
         ("gdb-port,g", po::value<unsigned>()->default_value(0), "enable gdb server and specify port to use")
         ("instructions,i", po::value<uint64_t>()->default_value(std::numeric_limits<uint64_t>::max()), "max. number of instructions to simulate")
         ("reset,r", po::value<std::string>(), "reset address")
         ("dump-ir", "dump the intermediate representation")
-        ("elf", po::value<std::vector<std::string>>(), "ELF file(s) to load")
+        ("elf,f", po::value<std::vector<std::string>>(), "ELF file(s) to load")
         ("mem,m", po::value<std::string>(), "the memory input file")
         ("plugin,p", po::value<std::vector<std::string>>(), "plugin to activate")
         ("backend", po::value<std::string>()->default_value("interp"), "the memory input file")

src/plugin/pctrace.cpp

@@ -9,27 +9,100 @@
 #include <rapidjson/ostreamwrapper.h>
 #include <rapidjson/error/en.h>
 #include <fstream>
-
 #include <iostream>
+#ifdef WITH_LZ4
+#include <lz4frame.h>
+#endif
 
+namespace iss {
+namespace plugin {
 
 using namespace rapidjson;
 using namespace std;
 
-iss::plugin::cov::cov(std::string const &filename)
+#ifdef WITH_LZ4
-    : instr_if(nullptr)
+class lz4compress_steambuf: public std::streambuf {
-    , filename(filename)
+public:
-{
+    lz4compress_steambuf(const lz4compress_steambuf&) = delete;
-    output.open("output.trc");
+    lz4compress_steambuf& operator=(const lz4compress_steambuf&) = delete;
-    jumped = false;
+    lz4compress_steambuf(std::ostream &sink, size_t buf_size)
-    first = true;
+    : sink(sink)
-}
+    , src_buf(buf_size)
+    , dest_buf(LZ4F_compressBound(buf_size, nullptr))
+    {
+        auto errCode = LZ4F_createCompressionContext(&ctx, LZ4F_VERSION);
+        if (LZ4F_isError(errCode) != 0)
+            throw std::runtime_error(std::string("Failed to create LZ4 context: ") + LZ4F_getErrorName(errCode));
+        size_t ret = LZ4F_compressBegin(ctx, &dest_buf.front(), dest_buf.capacity(), nullptr);
+        if (LZ4F_isError(ret) != 0)
+            throw std::runtime_error(std::string("Failed to start LZ4 compression: ") + LZ4F_getErrorName(ret));
+        setp(src_buf.data(), src_buf.data() + src_buf.size() - 1);
+        sink.write(dest_buf.data(), ret);
+    }
 
-iss::plugin::cov::~cov() {
+    ~lz4compress_steambuf() {
-    output.close();
+        close();
-}
+    }
 
-bool iss::plugin::cov::registration(const char *const version, vm_if& vm) {
+    void close() {
+        if (closed)
+            return;
+        sync();
+        auto ret = LZ4F_compressEnd(ctx, dest_buf.data(), dest_buf.capacity(), nullptr);
+        if (LZ4F_isError(ret) != 0)
+            throw std::runtime_error(std::string("Failed to finish LZ4 compression: ") + LZ4F_getErrorName(ret));
+        sink.write(dest_buf.data(), ret);
+        LZ4F_freeCompressionContext(ctx);
+        closed = true;
+    }
+
+private:
+    int_type overflow(int_type ch) override {
+        assert(pptr() <= epptr());
+        *pptr() = static_cast<char_type>(ch);
+        pbump(1);
+        compress_and_write();
+        return ch;
+    }
+
+    int_type sync() override {
+        compress_and_write();
+        return 0;
+    }
+
+    void compress_and_write() {
+        if (closed)
+            throw std::runtime_error("Cannot write to closed stream");
+        if(auto orig_size = pptr() - pbase()){
+            auto ret = LZ4F_compressUpdate(ctx, dest_buf.data(), dest_buf.capacity(), pbase(), orig_size, nullptr);
+            if (LZ4F_isError(ret) != 0)
+                throw std::runtime_error(std::string("LZ4 compression failed: ") + LZ4F_getErrorName(ret));
+            if(ret) sink.write(dest_buf.data(), ret);
+            pbump(-orig_size);
+        }
+    }
+
+    std::ostream &sink;
+    std::vector<char> src_buf;
+    std::vector<char> dest_buf;
+    LZ4F_compressionContext_t ctx{ nullptr };
+    bool closed{ false };
+};
+#endif
+
+cov::cov(std::string const &filename)
+: instr_if(nullptr)
+, filename(filename)
+, output("output.trc")
+#ifdef WITH_LZ4
+, strbuf(new lz4compress_steambuf(output, 4096))
+, ostr(strbuf.get())
+#endif
+{ }
+
+cov::~cov() { }
+
+bool cov::registration(const char *const version, vm_if& vm) {
     instr_if = vm.get_arch()->get_instrumentation_if();
     if(!instr_if) return false;
     const string  core_name = instr_if->core_type_name();
@@ -63,11 +136,11 @@ bool iss::plugin::cov::registration(const char *const version, vm_if& vm) {
                     } else {
                         LOG(ERR)<<"plugin cycle_estimate: could not find an entry for "<<core_name<<" in JSON file"<<endl;
                         return false;
-                   }
+                    }
                 } else {
                     LOG(ERR)<<"plugin cycle_estimate: could not parse in JSON file at "<< ok.Offset()<<": "<<GetParseError_En(ok.Code())<<endl;
                     return false;
-               }
+                }
             } catch (runtime_error &e) {
                 LOG(ERR) << "Could not parse input file " << filename << ", reason: " << e.what();
                 return false;
@@ -78,51 +151,9 @@ bool iss::plugin::cov::registration(const char *const version, vm_if& vm) {
         }
     }
     return true;
-
-
-
 }
 
-inline string formatPC(uint64_t pc) {
+void cov::callback(instr_info_t iinfo, const exec_info& einfo) {
-    stringstream stream;
-    stream << "0x" << std::hex << pc;
-    return stream.str();
-}
-
-void iss::plugin::cov::callback(instr_info_t iinfo, const exec_info& einfo) {
-//    auto delay = 0;
-//    auto entry = delays[iinfo.instr_id];
-//    bool taken = einfo.branch_taken;
-//    if (einfo.branch_taken)
-//        delay = entry.taken;
-//    else
-//        delay = entry.not_taken;
-//
-//    if (first){
-//        output << formatPC(instr_if->get_pc()) << "," << delay;
-//        first = false;
-//    }
-//    if(instr_if->get_next_pc()-instr_if->get_pc() != delays[iinfo.instr_id].size/8){
-//        //The goal is to keep the output in start-target pairs, so after a jump the target address needs to get written
-//        //to the output. If the target happens to also be a start, we keep the pairing by adding a 0-delay entry.
-//        if (jumped)
-//            output <<"\n" <<formatPC(instr_if->get_pc()) << "," << 0;
-//        output <<"\n" << formatPC(instr_if->get_pc()) << "," << delay;
-//        jumped = true;
-//    }
-//    else{
-//        if (jumped){
-//            output <<"\n" << formatPC(instr_if->get_pc()) << "," << delay;
-//            jumped = false;
-//        }
-//        else if(delay!=1){
-//            output <<"\n" << formatPC(instr_if->get_pc()) << "," << delay;
-//            output <<"\n" << formatPC(instr_if->get_pc()) << "," << 0;
-//        }
-//
-//    }
-
-//source code for the full output
     auto delay = 0;
     size_t id = iinfo.instr_id;
     auto entry = delays[id];
@@ -132,6 +163,13 @@ void iss::plugin::cov::callback(instr_info_t iinfo, const exec_info& einfo) {
     if (einfo.branch_taken)
         delay = entry.taken;
     else
-       delay = entry.not_taken;
+        delay = entry.not_taken;
+#ifndef WITH_LZ4
     output<<std::hex <<"0x" << instr_if->get_pc() <<"," << delay <<"," << call<< "\n";
+#else
+    auto rdbuf=ostr.rdbuf();
+    ostr<<std::hex <<"0x" << instr_if->get_pc() <<"," << delay <<"," << call<< "\n";
+#endif
+}
+}
 }

src/vm/interp/vm_tgc_c.cpp

@@ -2001,7 +2001,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rs1_idx = rs1 + 8;
+		            uint8_t rs1_idx = rs1 + 8;
 		            *(X+rs1_idx) = *(X+rs1_idx) >> shamt;
 		        }
 		        } catch(...){}
@@ -2024,11 +2024,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        if(shamt) {
-		            uint32_t rs1_idx = rs1 + 8;
+		            uint8_t rs1_idx = rs1 + 8;
 		            *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> shamt;
 		        }
 		        else if(traits::XLEN == 128) {
-		            uint32_t rs1_idx = rs1 + 8;
+		            uint8_t rs1_idx = rs1 + 8;
 		            *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >>  64;
 		        }
 		        } catch(...){}
@@ -2051,7 +2051,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rs1_idx = rs1 +  8;
+		            uint8_t rs1_idx = rs1 +  8;
 		            *(X+rs1_idx) = *(X+rs1_idx) & (int8_t)sext<6>(imm);
 		        }
 		        } catch(...){}
@@ -2074,7 +2074,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rd_idx = rd +  8;
+		            uint8_t rd_idx = rd +  8;
 		            *(X+rd_idx) = *(X+rd_idx) - *(X+rs2 +  8);
 		        }
 		        } catch(...){}
@@ -2097,7 +2097,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rd_idx = rd +  8;
+		            uint8_t rd_idx = rd +  8;
 		            *(X+rd_idx) = *(X+rd_idx) ^ *(X+rs2 +  8);
 		        }
 		        } catch(...){}
@@ -2120,7 +2120,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rd_idx = rd +  8;
+		            uint8_t rd_idx = rd +  8;
 		            *(X+rd_idx) = *(X+rd_idx) | *(X+rs2 +  8);
 		        }
 		        } catch(...){}
@@ -2143,7 +2143,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
 		        // execute instruction
 		        try {
 		        {
-		            uint32_t rd_idx = rd +  8;
+		            uint8_t rd_idx = rd +  8;
 		            *(X+rd_idx) = *(X+rd_idx) & *(X+rs2 +  8);
 		        }
 		        } catch(...){}