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DBT-RISE-TGC
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getting rid of the error: reference to 'wait' is ambiguous

This commit is contained in:
Stanislaw Kaushanski 2021-06-25 13:35:42 +02:00
parent e432dd8208
commit a249aea703
1 changed files with 3 additions and 3 deletions
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6
src/sysc/core_complex.cpp
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@ -155,7 +155,7 @@ public:
void wait_until(uint64_t flags) override { void wait_until(uint64_t flags) override {
SCCDEBUG(owner->name()) << "Sleeping until interrupt"; SCCDEBUG(owner->name()) << "Sleeping until interrupt";
do { do {
wait(wfi_evt); sc_core::wait(wfi_evt);
} while (this->reg.pending_trap == 0); } while (this->reg.pending_trap == 0);
PLAT::wait_until(flags); PLAT::wait_until(flags);
} }
@ -263,7 +263,7 @@ public:
void create_cpu(std::string const& type, std::string const& backend, unsigned gdb_port, uint32_t hart_id){ void create_cpu(std::string const& type, std::string const& backend, unsigned gdb_port, uint32_t hart_id){
CREATE_CORE(tgc_c) CREATE_CORE(tgc_c)
#ifdef CORE_TGC_B #ifdef CORE_TGC_B
CREATE_CORE(tgc_c) CREATE_CORE(tgc_b)
#endif #endif
#ifdef CORE_TGC_D #ifdef CORE_TGC_D
CREATE_CORE(tgc_d) CREATE_CORE(tgc_d)
@ -335,7 +335,7 @@ void core_complex::before_end_of_elaboration() {
#ifdef WITH_SCV #ifdef WITH_SCV
cpu->vm->setDisassEnabled(enable_disass.get_value() || m_db != nullptr); cpu->vm->setDisassEnabled(enable_disass.get_value() || m_db != nullptr);
#else #else
vm->setDisassEnabled(enable_disass.get_value()); cpu->vm->setDisassEnabled(enable_disass.get_value());
#endif #endif
} }