DBT-RISE/DBT-RISE-TGC
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regenerated sources and and add opcode enum to headers

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Conflicts:
	gen_input/CoreDSL-Instruction-Set-Description
This commit is contained in:
Eyck Jentzsch
2021-03-01 06:26:33 +00:00
parent 1668df0531
commit 9534d58d01
17 changed files with 361 additions and 609 deletions
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4
src/iss/tgf_b.cpp
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@ -41,8 +41,8 @@ using namespace iss::arch;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_names;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_aliases;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_b>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_b>::reg_byte_offsets;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_bit_widths;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_byte_offsets;
tgf_b::tgf_b() {
reg.icount = 0;

4
src/iss/tgf_c.cpp
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@ -41,8 +41,8 @@ using namespace iss::arch;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_c>::reg_names;
constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_c>::reg_aliases;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_c>::reg_bit_widths;
constexpr std::array<const uint32_t, 40> iss::arch::traits<iss::arch::tgf_c>::reg_byte_offsets;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_c>::reg_bit_widths;
constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_c>::reg_byte_offsets;
tgf_c::tgf_c() {
reg.icount = 0;

2
src/plugin/cycle_estimate.cpp
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@ -83,7 +83,7 @@ bool iss::plugin::cycle_estimate::registration(const char* const version, vm_if&
}
void iss::plugin::cycle_estimate::callback(instr_info_t instr_info) {
void iss::plugin::cycle_estimate::callback(instr_info_t instr_info, exec_info const&) {
assert(arch_instr && "No instrumentation interface available but callback executed");
auto entry = delays[instr_info.instr_id];
bool taken = (arch_instr->get_next_pc()-arch_instr->get_pc()) != (entry.size/8);

2
src/plugin/instruction_count.cpp
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@ -90,6 +90,6 @@ bool iss::plugin::instruction_count::registration(const char* const version, vm_
return true;
}
void iss::plugin::instruction_count::callback(instr_info_t instr_info) {
void iss::plugin::instruction_count::callback(instr_info_t instr_info, exec_info const&) {
rep_counts[instr_info.instr_id]++;
}

281
src/vm/interp/vm_tgf_b.cpp
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File diff suppressed because it is too large Load Diff

473
src/vm/interp/vm_tgf_c.cpp
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File diff suppressed because it is too large Load Diff

12
src/vm/tcc/vm_tgf_b.cpp
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@ -377,7 +377,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 2);
gen_trap_check(tu);
@ -424,7 +423,6 @@ private:
new_pc_val,
tu.l_not(tu.constant(0x1, 32U))), 32);
tu.store(PC_val_v, traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32U), traits<ARCH>::LAST_BRANCH);
tu.close_scope();
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 3);
@ -466,7 +464,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 4);
gen_trap_check(tu);
@ -507,7 +504,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 5);
gen_trap_check(tu);
@ -552,7 +548,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 6);
gen_trap_check(tu);
@ -597,7 +592,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 7);
gen_trap_check(tu);
@ -638,7 +632,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 8);
gen_trap_check(tu);
@ -679,7 +672,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 9);
gen_trap_check(tu);
@ -1621,7 +1613,6 @@ private:
tu.constant(1, 64U),
tu.trunc(tu.constant(imm, 32U), 32));
tu.close_scope();
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
gen_set_pc(tu, pc, traits<ARCH>::NEXT_PC);
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 38);
gen_trap_check(tu);
@ -2055,13 +2046,11 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt,
template <typename ARCH> void vm_impl<ARCH>::gen_raise_trap(tu_builder& tu, uint16_t trap_id, uint16_t cause) {
tu(" *trap_state = {:#x};", 0x80 << 24 | (cause << 16) | trap_id);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
}
template <typename ARCH> void vm_impl<ARCH>::gen_leave_trap(tu_builder& tu, unsigned lvl) {
tu("leave_trap(core_ptr, {});", lvl);
tu.store(tu.read_mem(traits<ARCH>::CSR, (lvl << 8) + 0x41, traits<ARCH>::XLEN),traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
}
template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned type) {
@ -2070,7 +2059,6 @@ template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned t
template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) {
tu("trap_entry:");
tu("enter_trap(core_ptr, *trap_state, *pc);");
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(),32),traits<ARCH>::LAST_BRANCH);
tu("return *next_pc;");
}

18
src/vm/tcc/vm_tgf_c.cpp
View File

@ -449,7 +449,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 2);
gen_trap_check(tu);
@ -487,7 +486,6 @@ private:
new_pc_val,
tu.l_not(tu.constant(0x1, 32U))), 32);
tu.store(PC_val_v, traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32U), traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 3);
gen_trap_check(tu);
@ -528,7 +526,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 4);
gen_trap_check(tu);
@ -569,7 +566,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 5);
gen_trap_check(tu);
@ -614,7 +610,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 6);
gen_trap_check(tu);
@ -659,7 +654,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 7);
gen_trap_check(tu);
@ -700,7 +694,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 8);
gen_trap_check(tu);
@ -741,7 +734,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 9);
gen_trap_check(tu);
@ -1683,7 +1675,6 @@ private:
tu.constant(1, 64U),
tu.trunc(tu.constant(imm, 32U), 32));
tu.close_scope();
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
gen_set_pc(tu, pc, traits<ARCH>::NEXT_PC);
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 38);
gen_trap_check(tu);
@ -2562,7 +2553,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 65);
gen_trap_check(tu);
@ -2868,7 +2858,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 76);
gen_trap_check(tu);
@ -2908,7 +2897,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 77);
gen_trap_check(tu);
@ -2948,7 +2936,6 @@ private:
auto is_cont_v = tu.choose(
tu.icmp(ICmpInst::ICMP_NE, tu.ext(PC_val_v, 32U, true), tu.constant(pc.val, 32U)),
tu.constant(0U, 32), tu.constant(1U, 32));
tu.store(is_cont_v, traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 78);
gen_trap_check(tu);
@ -3055,7 +3042,6 @@ private:
tu.open_scope();
auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits<ARCH>::X0, 0), 32);
tu.store(PC_val_v, traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32U), traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 82);
gen_trap_check(tu);
@ -3108,7 +3094,6 @@ private:
tu.constant(2, 32U)), 1 + traits<ARCH>::X0);
auto PC_val_v = tu.assignment("PC_val", tu.load(rs1 + traits<ARCH>::X0, 0), 32);
tu.store(PC_val_v, traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32U), traits<ARCH>::LAST_BRANCH);
tu.close_scope();
vm_base<ARCH>::gen_sync(tu, POST_SYNC, 84);
gen_trap_check(tu);
@ -3247,13 +3232,11 @@ vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt,
template <typename ARCH> void vm_impl<ARCH>::gen_raise_trap(tu_builder& tu, uint16_t trap_id, uint16_t cause) {
tu(" *trap_state = {:#x};", 0x80 << 24 | (cause << 16) | trap_id);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
}
template <typename ARCH> void vm_impl<ARCH>::gen_leave_trap(tu_builder& tu, unsigned lvl) {
tu("leave_trap(core_ptr, {});", lvl);
tu.store(tu.read_mem(traits<ARCH>::CSR, (lvl << 8) + 0x41, traits<ARCH>::XLEN),traits<ARCH>::NEXT_PC);
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(), 32),traits<ARCH>::LAST_BRANCH);
}
template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned type) {
@ -3262,7 +3245,6 @@ template <typename ARCH> void vm_impl<ARCH>::gen_wait(tu_builder& tu, unsigned t
template <typename ARCH> void vm_impl<ARCH>::gen_trap_behavior(tu_builder& tu) {
tu("trap_entry:");
tu("enter_trap(core_ptr, *trap_state, *pc);");
tu.store(tu.constant(std::numeric_limits<uint32_t>::max(),32),traits<ARCH>::LAST_BRANCH);
tu("return *next_pc;");
}