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fixes use of icount vs. cycle

This commit is contained in:
Eyck Jentzsch 2024-08-17 19:36:40 +02:00
parent 9de0aed84d
commit 64329cf0f6
3 changed files with 15 additions and 15 deletions
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10
src/iss/arch/riscv_hart_m_p.h
View File

@ -278,7 +278,7 @@ public:
void disass_output(uint64_t pc, const std::string instr) override { void disass_output(uint64_t pc, const std::string instr) override {
NSCLOG(INFO, LOGCAT) << fmt::format("0x{:016x} {:40} [s:0x{:x};c:{}]", pc, instr, (reg_t)state.mstatus, NSCLOG(INFO, LOGCAT) << fmt::format("0x{:016x} {:40} [s:0x{:x};c:{}]", pc, instr, (reg_t)state.mstatus,
this->reg.icount + cycle_offset); this->reg.cycle + cycle_offset);
}; };
iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; } iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; }
@ -311,7 +311,7 @@ protected:
uint64_t get_pendig_traps() override { return arch.reg.trap_state; } uint64_t get_pendig_traps() override { return arch.reg.trap_state; }
uint64_t get_total_cycles() override { return arch.reg.icount + arch.cycle_offset; } uint64_t get_total_cycles() override { return arch.reg.cycle + arch.cycle_offset; }
void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; } void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; }
@ -908,7 +908,7 @@ iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::write_plain(unsigned addr, reg_t
template <typename BASE, features_e FEAT, typename LOGCAT> template <typename BASE, features_e FEAT, typename LOGCAT>
iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::read_cycle(unsigned addr, reg_t& val) { iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::read_cycle(unsigned addr, reg_t& val) {
auto cycle_val = this->reg.icount + cycle_offset; auto cycle_val = this->reg.cycle + cycle_offset;
if(addr == mcycle) { if(addr == mcycle) {
val = static_cast<reg_t>(cycle_val); val = static_cast<reg_t>(cycle_val);
} else if(addr == mcycleh) { } else if(addr == mcycleh) {
@ -928,7 +928,7 @@ iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::write_cycle(unsigned addr, reg_t
mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff); mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff);
} }
} }
cycle_offset = mcycle_csr - this->reg.icount; // TODO: relying on wrap-around cycle_offset = mcycle_csr - this->reg.cycle; // TODO: relying on wrap-around
return iss::Ok; return iss::Ok;
} }
@ -959,7 +959,7 @@ iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::write_instret(unsigned addr, reg
template <typename BASE, features_e FEAT, typename LOGCAT> template <typename BASE, features_e FEAT, typename LOGCAT>
iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::read_time(unsigned addr, reg_t& val) { iss::status riscv_hart_m_p<BASE, FEAT, LOGCAT>::read_time(unsigned addr, reg_t& val) {
uint64_t time_val = this->reg.icount / (100000000 / 32768 - 1); //-> ~3052; uint64_t time_val = this->reg.cycle / (100000000 / 32768 - 1); //-> ~3052;
if(addr == time) { if(addr == time) {
val = static_cast<reg_t>(time_val); val = static_cast<reg_t>(time_val);
} else if(addr == timeh) { } else if(addr == timeh) {

10
src/iss/arch/riscv_hart_msu_vp.h
View File

@ -328,7 +328,7 @@ public:
void disass_output(uint64_t pc, const std::string instr) override { void disass_output(uint64_t pc, const std::string instr) override {
CLOG(INFO, disass) << fmt::format("0x{:016x} {:40} [p:{};s:0x{:x};c:{}]", pc, instr, lvl[this->reg.PRIV], (reg_t)state.mstatus, CLOG(INFO, disass) << fmt::format("0x{:016x} {:40} [p:{};s:0x{:x};c:{}]", pc, instr, lvl[this->reg.PRIV], (reg_t)state.mstatus,
this->reg.icount + cycle_offset); this->reg.cycle + cycle_offset);
}; };
iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; } iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; }
@ -361,7 +361,7 @@ protected:
uint64_t get_pendig_traps() override { return arch.reg.trap_state; } uint64_t get_pendig_traps() override { return arch.reg.trap_state; }
uint64_t get_total_cycles() override { return arch.reg.icount + arch.cycle_offset; } uint64_t get_total_cycles() override { return arch.reg.cycle + arch.cycle_offset; }
void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; } void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; }
@ -895,7 +895,7 @@ template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::write_reg(unsigned
} }
template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::read_cycle(unsigned addr, reg_t& val) { template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::read_cycle(unsigned addr, reg_t& val) {
auto cycle_val = this->reg.icount + cycle_offset; auto cycle_val = this->reg.cycle + cycle_offset;
if(addr == mcycle) { if(addr == mcycle) {
val = static_cast<reg_t>(cycle_val); val = static_cast<reg_t>(cycle_val);
} else if(addr == mcycleh) { } else if(addr == mcycleh) {
@ -916,7 +916,7 @@ template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::write_cycle(unsign
mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff); mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff);
} }
} }
cycle_offset = mcycle_csr - this->reg.icount; // TODO: relying on wrap-around cycle_offset = mcycle_csr - this->reg.cycle; // TODO: relying on wrap-around
return iss::Ok; return iss::Ok;
} }
@ -944,7 +944,7 @@ template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::write_instret(unsi
} }
template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::read_time(unsigned addr, reg_t& val) { template <typename BASE> iss::status riscv_hart_msu_vp<BASE>::read_time(unsigned addr, reg_t& val) {
uint64_t time_val = this->reg.icount / (100000000 / 32768 - 1); //-> ~3052; uint64_t time_val = this->reg.cycle / (100000000 / 32768 - 1); //-> ~3052;
if(addr == time) { if(addr == time) {
val = static_cast<reg_t>(time_val); val = static_cast<reg_t>(time_val);
} else if(addr == timeh) { } else if(addr == timeh) {

10
src/iss/arch/riscv_hart_mu_p.h
View File

@ -305,7 +305,7 @@ public:
void disass_output(uint64_t pc, const std::string instr) override { void disass_output(uint64_t pc, const std::string instr) override {
NSCLOG(INFO, LOGCAT) << fmt::format("0x{:016x} {:40} [p:{};s:0x{:x};c:{}]", pc, instr, lvl[this->reg.PRIV], (reg_t)state.mstatus, NSCLOG(INFO, LOGCAT) << fmt::format("0x{:016x} {:40} [p:{};s:0x{:x};c:{}]", pc, instr, lvl[this->reg.PRIV], (reg_t)state.mstatus,
this->reg.icount + cycle_offset); this->reg.cycle + cycle_offset);
}; };
iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; } iss::instrumentation_if* get_instrumentation_if() override { return &instr_if; }
@ -338,7 +338,7 @@ protected:
uint64_t get_pendig_traps() override { return arch.reg.trap_state; } uint64_t get_pendig_traps() override { return arch.reg.trap_state; }
uint64_t get_total_cycles() override { return arch.reg.icount + arch.cycle_offset; } uint64_t get_total_cycles() override { return arch.reg.cycle + arch.cycle_offset; }
void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; } void update_last_instr_cycles(unsigned cycles) override { arch.cycle_offset += cycles - 1; }
@ -1105,7 +1105,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::write_plain(unsigned addr, reg_
template <typename BASE, features_e FEAT, typename LOGCAT> template <typename BASE, features_e FEAT, typename LOGCAT>
iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::read_cycle(unsigned addr, reg_t& val) { iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::read_cycle(unsigned addr, reg_t& val) {
auto cycle_val = this->reg.icount + cycle_offset; auto cycle_val = this->reg.cycle + cycle_offset;
if(addr == mcycle) { if(addr == mcycle) {
val = static_cast<reg_t>(cycle_val); val = static_cast<reg_t>(cycle_val);
} else if(addr == mcycleh) { } else if(addr == mcycleh) {
@ -1125,7 +1125,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::write_cycle(unsigned addr, reg_
mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff); mcycle_csr = (static_cast<uint64_t>(val) << 32) + (mcycle_csr & 0xffffffff);
} }
} }
cycle_offset = mcycle_csr - this->reg.icount; // TODO: relying on wrap-around cycle_offset = mcycle_csr - this->reg.cycle; // TODO: relying on wrap-around
return iss::Ok; return iss::Ok;
} }
@ -1156,7 +1156,7 @@ iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::write_instret(unsigned addr, re
template <typename BASE, features_e FEAT, typename LOGCAT> template <typename BASE, features_e FEAT, typename LOGCAT>
iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::read_time(unsigned addr, reg_t& val) { iss::status riscv_hart_mu_p<BASE, FEAT, LOGCAT>::read_time(unsigned addr, reg_t& val) {
uint64_t time_val = this->reg.icount / (100000000 / 32768 - 1); //-> ~3052; uint64_t time_val = this->reg.cycle / (100000000 / 32768 - 1); //-> ~3052;
if(addr == time) { if(addr == time) {
val = static_cast<reg_t>(time_val); val = static_cast<reg_t>(time_val);
} else if(addr == timeh) { } else if(addr == timeh) {